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* MIPS: Netlogic: Optimize and fix write_c0_eimr()Jayachandran C2013-05-081-8/+5
| | | | | | | | | | | | | Remove the irq save/restore from write_c0_eimr(), as it is always called with interrupts off. This allows us to remove workaround in write_c0_eimr() to fix up the flags used by local_irq_save. This fixup worked on XLR, but will break when 32-bit support is added to r2 cpus like XLP. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/5022/ Acked-by: John Crispin <blogic@openwrt.org>
* MIPS: BCM63XX: merge bcm63xx_clk.h into bcm63xx/clk.cJonas Gorski2013-05-082-12/+7
| | | | | | | | | | All the header file does is provide the internal structure of clk, which shouldn't be used by anyone except clk.c itself anyway. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Patchwork: http://patchwork.linux-mips.org/patch/5055/ Acked-by: John Crispin <blogic@openwrt.org>
* MIPS: BCM63XX: add flash detection for BCM6362Jonas Gorski2013-05-082-0/+7
| | | | | | | | BCM6362 support booting from SPI flash and NAND. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5012/ Acked-by: John Crispin <blogic@openwrt.org>
* MIPS: BCM63XX: enable pcie for BCM6362Jonas Gorski2013-05-082-3/+11
| | | | | | | | | The PCIe controller is almost the same as the BCM6328 one, with only the SERDES register being at a different location. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5011/ Acked-by: John Crispin <blogic@openwrt.org>
* MIPS: BCM63XX: enable SPI controller for BCM6362Jonas Gorski2013-05-083-3/+6
| | | | | | | | The SPI controller shares the same register layout as the 6358 one. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5010/ Acked-by: John Crispin <blogic@openwrt.org>
* MIPS: BCM63XX: add basic BCM6362 supportJonas Gorski2013-05-0811-5/+314
| | | | | | | | Add basic support for detecting and booting the BCM6362. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5009/ Acked-by: John Crispin <blogic@openwrt.org>
* MIPS: BCM63XX: rework chip detectionJonas Gorski2013-05-081-45/+42
| | | | | | | | | | Instead of trying to use a correlation of cpu prid and chip id and hoping they will always be unique, use the cpu prid to determine the chip id register location and just read out the chip id. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5008/ Acked-by: John Crispin <blogic@openwrt.org>
* MIPS: BCM63XX: fix revision ID widthJonas Gorski2013-05-084-5/+5
| | | | | | | | The REVID is only 8 bit wide. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5007/ Acked-by: John Crispin <blogic@openwrt.org>
* MIPS: BCM63XX: remove duplicate spi register definitionsJonas Gorski2013-05-083-64/+10
| | | | | | | | | | | BCM6338 and BCM6348, and BCM6358 and everything after that share the same register layout. To not have to redefine them for each new chip and keep the code size small, only use the definitions for the first chip with the certain layout. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5006/ Acked-by: John Crispin <blogic@openwrt.org>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2013-04-059-24/+28
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS fixes from Ralf Baechle: "Fixes for a number of small glitches in various corners of the MIPS tree. No particular areas is standing out. With this applied all MIPS defconfigs are building fine. No merge conflicts are expected." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: Delete definition of SA_RESTORER. MIPS: Fix ISA level which causes secondary cache init bypassing and more MIPS: Fix build error cavium-octeon without CONFIG_SMP MIPS: Kconfig: Rename SNIPROM too MIPS: Alchemy: Fix typo "CONFIG_DEBUG_PCI" MIPS: Unbreak function tracer for 64-bit kernel.
| * MIPS: Delete definition of SA_RESTORER.Ralf Baechle2013-04-051-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SA_RESTORER used to be defined as 0x04000000 but only the O32 ABI ever supported its use and no libc was using it, so the entire sa-restorer functionality was removed with lmo commit 39bffc12c3580ab [Zap sa_restorer.] for 2.5.48 retaining only the SA_RESTORER definition as a reminder to avoid accidental reuse of the mask bit. Upstream cdef9602fbf1871a43f0f1b5cea10dd0f275167d [signal: always clear sa_restorer on execve] adds code that assumes sa_sigaction has an sa_restorer field, if SA_RESTORER is defined which would break MIPS. So remove the SA_RESTORER definition before the v3.8.4 merge. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> (cherry picked from commit 17da8d63add23830892ac4dc2cbb3b5d4ffb79a8)
| * MIPS: Fix ISA level which causes secondary cache init bypassing and moreDeng-Cheng Zhu2013-04-054-13/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit a96102be70 introduced set_isa() where compatible ISA info is also set aside from the one gets passed in. It means, for example, 1004K will have MIPS_CPU_ISA_M32R2/M32R1/II/I flags. This leads to things like the following inappropriate: if (c->isa_level == MIPS_CPU_ISA_M32R1 || c->isa_level == MIPS_CPU_ISA_M32R2 || c->isa_level == MIPS_CPU_ISA_M64R1 || c->isa_level == MIPS_CPU_ISA_M64R2) This patch fixes it. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Fix build error cavium-octeon without CONFIG_SMPEunBong Song2013-04-051-1/+4
| | | | | | | | | | | | | | Singed-off-by: EunBong Song <eunb.song@samsung.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Kconfig: Rename SNIPROM tooPaul Bolle2013-04-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | CONFIG_SNIPROM was renamed to CONFIG_FW_SNIPROM in v3.8. Let's rename SNIPROM itself too. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Cc: linux-mips@linux-mips.org; Cc: linux-kernel@vger.kernel.org Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Fix typo "CONFIG_DEBUG_PCI"Paul Bolle2013-04-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 7517de348663b08a808aff44b5300e817157a568 ("MIPS: Alchemy: Redo PCI as platform driver") added a reference to CONFIG_DEBUG_PCI. Change it to CONFIG_PCI_DEBUG, as that is a valid Kconfig macro. Also add a newline to a debugging printk that this fix enables. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Unbreak function tracer for 64-bit kernel.David Daney2013-04-051-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 58b69401c797 [MIPS: Function tracer: Fix broken function tracing] completely broke the function tracer for 64-bit kernels. The symptom is a system hang very early in the boot process. The fix: Remove/fix $sp adjustments for 64-bit case. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: Al Cooper <alcooperx@gmail.com> Cc: viric@viric.name Cc: stable@vger.kernel.org # 3.8.x Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2013-04-0214-72/+220
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS fixes from Ralf Baechle: "A collection of fixes pretty much across the MIPS code. Even the change to include/linux/signal.h by David Howells' 2a1486981c13 ("Fix breakage in MIPS siginfo handling") should be considered MIPS-specific as it touches an ifdefed segment that is only relevant to MIPS and which unfortunately can't be made to go away entirely." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: Fix breakage in MIPS siginfo handling Revert "MIPS: BCM63XX: Call board_register_device from device_initcall()" MIPS: BCM63XX: Make nvram checksum failure non fatal MIPS: Fix code generation for non-DSP capable CPUs MIPS: Fix inconsistent formatting inside /proc/cpuinfo MIPS: SEAD3: Enable LL/SC. MIPS: Get rid of CONFIG_CPU_HAS_LLSC again MIPS: Add dependencies for HAVE_ARCH_TRANSPARENT_HUGEPAGE MIPS: VR4133: Fix probe for LL/SC. MIPS: Fix logic errors in bitops.c MIPS: Use CONFIG_CPU_MIPSR2 in csum_partial.S MIPS: compat: Return same error ENOSYS as native for invalid operation.
| * Fix breakage in MIPS siginfo handlingDavid Howells2013-03-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MIPS's siginfo handling has been broken since this commit: commit 574c4866e33d648520a8bd5bf6f573ea6e554e88 Author: Al Viro <viro@zeniv.linux.org.uk> Date: Sun Nov 25 22:24:19 2012 -0500 consolidate kernel-side struct sigaction declarations for 64-bit BE MIPS CPUs. The UAPI variant looks like this: struct sigaction { unsigned int sa_flags; __sighandler_t sa_handler; sigset_t sa_mask; }; but the core kernel's variant looks like this: struct sigaction { #ifndef __ARCH_HAS_ODD_SIGACTION __sighandler_t sa_handler; unsigned long sa_flags; #else unsigned long sa_flags; __sighandler_t sa_handler; #endif #ifdef __ARCH_HAS_SA_RESTORER __sigrestore_t sa_restorer; #endif sigset_t sa_mask; }; The problem is that sa_flags has been changed from an unsigned int to an unsigned long. Fix this by making sa_flags unsigned int if __ARCH_HAS_ODD_SIGACTION is defined. Whilst we're at it, rename __ARCH_HAS_ODD_SIGACTION to __ARCH_HAS_IRIX_SIGACTION. Signed-off-by: David Howells <dhowells@redhat.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: stable@vger.kernel.org Acked-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * Revert "MIPS: BCM63XX: Call board_register_device from device_initcall()"Jonas Gorski2013-03-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit causes a race between PCI scan and SSB fallback SPROM handler registration, causing the wifi to not work on slower systems. The only subsystem touched from board_register_devices is platform device registration, which is safe as an arch init call. This reverts commit d64ed7ada2f689d2c62af1892ca55e47d3653e36 [MIPS: BCM63XX: Call board_register_device from device_initcall()]. Signed-off-by: Jonas Gorski <jogo@openwrt.org> To: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: BCM63XX: Make nvram checksum failure non fatalJonas Gorski2013-03-193-11/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some vendors modify the nvram layout moving the checksum to a different place or dropping entirely, so reduce the checksum failure to a warning. Reported-by: Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Fix code generation for non-DSP capable CPUsFlorian Fainelli2013-03-192-38/+196
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 32a7ede (MIPS: dsp: Add assembler support for DSP ASEs) has enabled the use of DSP ASE specific instructions such as rddsp and wrdsp under the idea that all code path that will make use of these two instructions are properly checking for cpu_has_dsp to ensure that the particular CPU we are running on *actually* supports DSP ASE. This commit actually causes the following oops on QEMU Malta emulating a MIPS 24Kc without the DSP ASE implemented: [ 7.960000] Reserved instruction in kernel [ 7.960000] Cpu 0 [ 7.960000] $ 0 : 00000000 00000000 00000014 00000005 [ 7.960000] $ 4 : 8fc2de48 00000001 00000000 8f59ddb0 [ 7.960000] $ 8 : 8f5ceec4 00000018 00000c00 00800000 [ 7.960000] $12 : 00000100 00000200 00000000 00457b84 [ 7.960000] $16 : 00000000 8fc2ba78 8f4ec980 00000001 [ 7.960000] $20 : 80418f90 00000000 00000000 000002dd [ 7.960000] $24 : 0000009c 7730d7b8 [ 7.960000] $28 : 8f59c000 8f59dd38 00000001 80104248 [ 7.960000] Hi : 0000001d [ 7.960000] Lo : 0000000b [ 7.960000] epc : 801041ec thread_saved_pc+0x2c/0x38 [ 7.960000] Not tainted [ 7.960000] ra : 80104248 get_wchan+0x48/0xac [ 7.960000] Status: 1000b703 KERNEL EXL IE [ 7.960000] Cause : 10800028 [ 7.960000] PrId : 00019300 (MIPS 24Kc) [ 7.960000] Modules linked in: [ 7.960000] Process killall (pid: 1574, threadinfo=8f59c000, task=8fd14558, tls=773aa440) [ 7.960000] Stack : 8fc2ba78 8012b008 0000000c 0000001d 00000000 00000000 8f58a380 8f58a380 8fc2ba78 80202668 8f59de78 8f468600 8f59de28 801b2a3c 8f59df00 8f98ba20 74696e69 8f468600 8f59de28 801b7308 0081c007 00000000 00000000 00000000 00000000 00000000 00000000 00000000 8fc2bbb4 00000001 0000001d 0000000b 77f038cc 7fe80648 ffffffff ffffffff 00000000 00000001 0016e000 00000000 ... [ 7.960000] Call Trace: [ 7.960000] [<801041ec>] thread_saved_pc+0x2c/0x38 [ 7.960000] [<80104248>] get_wchan+0x48/0xac The disassembly of thread_saved_pc points to the following: 000006d0 <thread_saved_pc>: 6d0: 8c820208 lw v0,520(a0) 6d4: 3c030000 lui v1,0x0 6d8: 24630000 addiu v1,v1,0 6dc: 10430008 beq v0,v1,700 <thread_saved_pc+0x30> 6e0: 00000000 nop 6e4: 3c020000 lui v0,0x0 6e8: 8c43000c lw v1,12(v0) 6ec: 04620004 bltzl v1,700 <thread_saved_pc+0x30> 6f0: 00001021 move v0,zero 6f4: 8c840200 lw a0,512(a0) 6f8: 00031080 sll v0,v1,0x2 6fc: 7c44100a lwx v0,a0(v0) <------------ 700: 03e00008 jr ra 704: 00000000 nop If we specifically disable -mdsp/-mdspr2 for arch/mips/kernel/process.o, we get the following (non-crashing) assembly: 00000708 <thread_saved_pc>: 708: 8c820208 lw v0,520(a0) 70c: 3c030000 lui v1,0x0 710: 24630000 addiu v1,v1,0 714: 10430009 beq v0,v1,73c <thread_saved_pc+0x34> 718: 00000000 nop 71c: 3c020000 lui v0,0x0 720: 8c42000c lw v0,12(v0) 724: 04420005 bltzl v0,73c <thread_saved_pc+0x34> 728: 00001021 move v0,zero 72c: 8c830200 lw v1,512(a0) 730: 00021080 sll v0,v0,0x2 734: 00431021 addu v0,v0,v1 738: 8c420000 lw v0,0(v0) 73c: 03e00008 jr ra 740: 00000000 nop The specific line that leads a different assembly being produced is: unsigned long thread_saved_pc(struct task_struct *tsk) ... return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset]; <--- The problem here is that the compiler was given the right to use DSP instructions with the -mdsp / -mdspr2 command-line switches and performed some optimization for us and used DSP ASE instructions where we are not checking that the running CPU actually supports DSP ASE. This patch fixes the issue by partially reverting commit 32a7ede for arch/mips/kernel/Makefile in order to remove the -mdsp / -mdspr2 compiler command-line switches such that we are now guaranteed that the compiler will not optimize using DSP ASE reserved instructions. We also need to fixup the rddsp/wrdsp and m{t,h}{hi,lo}{0,1,2,3} macros in arch/mips/include/asm/mipsregs.h to tell the assembler that we are going to explicitely use DSP ASE reserved instructions. The comment in arch/mips/kernel/Makefile is also updated to reflect that. Signed-off-by: Florian Fainelli <florian@openwrt.org> Acked-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: blogic@openwrt.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Fix inconsistent formatting inside /proc/cpuinfoJohn Crispin2013-03-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a missing " " inside /proc/cpuinfo. The bad commit was: commit a96102be700f87283f168942cd09a2b30f86f324 Author: Steven J. Hill <sjhill@mips.com> Date: Fri Dec 7 04:31:36 2012 +0000 MIPS: Add printing of ISA version in cpuinfo. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4988/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: SEAD3: Enable LL/SC.Ralf Baechle2013-03-121-1/+1
| | | | | | | | | | | | | | All synthesizable CPU cores that could be loaded into a SEAD3's FPGA are MIPS32 or MIPS64 CPUs that have ll/sc. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Get rid of CONFIG_CPU_HAS_LLSC againPaul Bolle2013-03-122-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Commit f7ade3c168e4f437c11f57be012992bbb0e3075c ("MIPS: Get rid of CONFIG_CPU_HAS_LLSC") did what it promised to do. But since then that macro and its Kconfig symbol popped up again. Get rid of those again. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Cc: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/4978/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Add dependencies for HAVE_ARCH_TRANSPARENT_HUGEPAGEBen Hutchings2013-03-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The MIPS implementation of transparent huge-pages (THP) is 64-bit only, and of course also requires that the CPU supports huge-pages. Currently it's entirely possible to enable THP in other configurations, which then fail to build due to pfn_pmd() not being defined. Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Cc: linux-mips@linux-mips.org Acked-by: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/4972/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: VR4133: Fix probe for LL/SC.Yoichi Yuasa2013-03-121-3/+4
| | | | | | | | | | | | | | Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4963/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Fix logic errors in bitops.cDavid Daney2013-03-121-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 92d11594f6 (MIPS: Remove irqflags.h dependency from bitops.h) factored some of the bitops code out into a separate file (arch/mips/lib/bitops.c). Unfortunately the logic converting a bit mask into a boolean result was lost in some of the functions. We had: int res; unsigned long shifted_result_bit; . . . res = shifted_result_bit; return res; Which truncates off the high 32 bits (thus yielding an incorrect value) on 64-bit systems. The manifestation of this is that a non-SMP 64-bit kernel will not boot as the bitmap operations in bootmem.c are all screwed up. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: Jim Quinlan <jim2101024@gmail.com> Cc: stable@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/4965/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Use CONFIG_CPU_MIPSR2 in csum_partial.SGabor Juhos2013-03-121-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | The csum_partial implementation contain optimalizations for the MIPS R2 instruction set. This optimization is never enabled however because the if directive uses the CPU_MIPSR2 constant which is not defined anywhere. Use the CONFIG_CPU_MIPSR2 constant instead. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4971/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: compat: Return same error ENOSYS as native for invalid operation.Ralf Baechle2013-03-111-1/+1
| | | | | | | | | | | | | | | | The pains for multiplexed syscalls. Noticed by Al Viro <viro@zeniv.linux.org.uk>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | Select VIRT_TO_BUS directly where neededStephen Rothwell2013-03-121-1/+1
|/ | | | | | | | | | In commit 887cbce0adea ("arch Kconfig: centralise ARCH_NO_VIRT_TO_BUS") I introduced the config sybmol HAVE_VIRT_TO_BUS and selected that where needed. I am not sure what I was thinking. Instead, just directly select VIRT_TO_BUS where it is needed. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge git://www.linux-watchdog.org/linux-watchdogLinus Torvalds2013-03-031-6/+9
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull watchdog updates from Wim Van Sebroeck: "This contains: - fixes and improvements - devicetree bindings - conversion to watchdog generic framework of the following drivers: - booke_wdt - bcm47xx_wdt.c - at91sam9_wdt - Removal of old STMP3xxx driver - Addition of following new drivers: - new driver for STMP3xxx and i.MX23/28 - Retu watchdog driver" * git://www.linux-watchdog.org/linux-watchdog: (30 commits) watchdog: sp805_wdt depends on ARM watchdog: davinci_wdt: update to devm_* API watchdog: davinci_wdt: use devm managed clk get watchdog: at91rm9200: add DT support watchdog: add timeout-sec property binding watchdog: at91sam9_wdt: Convert to use the watchdog framework watchdog: omap_wdt: Add option nowayout watchdog: core: dt: add support for the timeout-sec dt property watchdog: bcm47xx_wdt.c: add hard timer watchdog: bcm47xx_wdt.c: rename wdt_time to timeout watchdog: bcm47xx_wdt.c: rename ops methods watchdog: bcm47xx_wdt.c: use platform device watchdog: bcm47xx_wdt.c: convert to watchdog core api watchdog: Convert BookE watchdog driver to watchdog infrastructure watchdog: s3c2410_wdt: Use devm_* functions watchdog: remove old STMP3xxx driver watchdog: add new driver for STMP3xxx and i.MX23/28 rtc: stmp3xxx: add wdt-accessor function watchdog: introduce retu_wdt driver watchdog: intel_scu_watchdog: fix Kconfig dependency ...
| * watchdog: ath79_wdt: get register base from platform device's resourcesGabor Juhos2013-03-011-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ath79_wdt driver uses a fixed memory address currently. Although this is working with each currently supported SoCs, but this may change in the future. Additionally, the driver includes platform specific header files in order to be able to get the memory base of the watchdog device. The patch adds a memory resource to the platform device, and converts the driver to get the base address of the watchdog device from that. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
| * MIPS: ath79: use dynamically allocated watchdog deviceGabor Juhos2013-03-011-6/+1
| | | | | | | | | | | | | | | | | | | | | | Remove the static watchdog device variable and use the 'platform_device_register_simple' helper to allocate and register the device in one step. This allows us to save a few bytes in the kernel image. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* | Merge branch 'for-linus' of ↵Linus Torvalds2013-03-021-2/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal Pull signal/compat fixes from Al Viro: "Fixes for several regressions introduced in the last signal.git pile, along with fixing bugs in truncate and ftruncate compat (on just about anything biarch at least one of those two had been done wrong)." * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal: compat: restore timerfd settime and gettime compat syscalls [regression] braino in "sparc: convert to ksignal" fix compat truncate/ftruncate switch lseek to COMPAT_SYSCALL_DEFINE lseek() and truncate() on sparc really need sign extension
| * | fix compat truncate/ftruncateAl Viro2013-02-251-2/+2
| | | | | | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* | | Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2013-03-02877-15913/+16059
|\ \ \ | |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS updates from Ralf Baechle: o Add basic support for the Mediatek/Ralink Wireless SoC family. o The Qualcomm Atheros platform is extended by support for the new QCA955X SoC series as well as a bunch of patches that get the code ready for OF support. o Lantiq and BCM47XX platform have a few improvements and bug fixes. o MIPS has sent a few patches that get the kernel ready for the upcoming microMIPS support. o The rest of the series is made up of small bug fixes and cleanups that relate to various parts of the MIPS code. The biggy in there is a whitespace cleanup. After I was sent another set of whitespace cleanup patches I decided it was the time to clean the whitespace "issues" for once and and that touches many files below arch/mips/. Fix up silly conflicts, mostly due to whitespace cleanups. * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (105 commits) MIPS: Quit exporting kernel internel break codes to uapi/asm/break.h MIPS: remove broken conditional inside vpe loader code MIPS: SMTC: fix implicit declaration of set_vi_handler MIPS: early_printk: drop __init annotations MIPS: Probe for and report hardware virtualization support. MIPS: ath79: add support for the Qualcomm Atheros AP136-010 board MIPS: ath79: add USB controller registration code for the QCA955X SoCs MIPS: ath79: add PCI controller registration code for the QCA955X SoCs MIPS: ath79: add WMAC registration code for the QCA955X SoCs MIPS: ath79: register UART for the QCA955X SoCs MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear} MIPS: ath79: add GPIO setup code for the QCA955X SoCs MIPS: ath79: add IRQ handling code for the QCA955X SoCs MIPS: ath79: add clock setup code for the QCA955X SoCs MIPS: ath79: add SoC detection code for the QCA955X SoCs MIPS: ath79: add early printk support for the QCA955X SoCs MIPS: ath79: fix WMAC IRQ resource assignment mips: reserve elfcorehdr mips: Make sure kernel memory is in iomem MIPS: ath79: use dynamically allocated USB platform devices ...
| * | Merge branch 'master' of ↵Ralf Baechle2013-02-223-6/+3
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into mips-for-linux-next Conflicts: include/linux/ssb/ssb_driver_gige.h Also resolves a logical merge conflict in drivers/net/ethernet/broadcom/- bgmac.c due to change of an API.
| * \ \ Merge branch 'mips-next-3.9' of ↵Ralf Baechle2013-02-2196-861/+3661
| |\ \ \ | | | | | | | | | | | | | | | git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next
| | * | | MIPS: remove broken conditional inside vpe loader codeJohn Crispin2013-02-191-12/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit [1] breaks builds and results in the following error arch/mips/kernel/vpe.c: In function 'vpe_run': arch/mips/kernel/vpe.c:708:16: error: invalid type argument of '->' (have 'struct list_head') Taking a closer look at the conditional we notice that list_first_entry wont ever return NULL. The easiest fix is to just drop the dead code. [1] commit 3d2d03247632920aa21b42a0b032a4ffd44ce15e MIPS: vpe.c: Fix null pointer dereference in print arguments. Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: SMTC: fix implicit declaration of set_vi_handlerFlorian Fainelli2013-02-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the following implicit declaration while building with MIPS SMTC support enabled: arch/mips/kernel/smtc.c: In function 'setup_cross_vpe_interrupts': arch/mips/kernel/smtc.c:1205:2: error: implicit declaration of function 'set_vi_handler' [-Werror=implicit-function-declaration] cc1: all warnings being treated as errors Signed-off-by: Florian Fainelli <florian@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4931/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: early_printk: drop __init annotationsAaro Koskinen2013-02-195-11/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We cannot use __init for earlyprintk code or data, since the kernel parameter "keep_bootcon" allows leaving the boot console enabled. Currently MIPS will crash/hang/die if you use keep_bootcon. The patch fixes it at least on Lemote FuLoong mini-PC. Changes for other boards were done based on what I could find with grep... Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Patchwork: http://patchwork.linux-mips.org/patch/4935/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: Probe for and report hardware virtualization support.David Daney2013-02-195-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The presence of the MIPS Virtualization Application-Specific Extension is indicated by CP0_Config3[23]. Probe for this and report it in /proc/cpuinfo. Signed-off-by: David Daney <david.daney@cavium.com> Patchwork: http://patchwork.linux-mips.org/patch/4904/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: add support for the Qualcomm Atheros AP136-010 boardGabor Juhos2013-02-195-0/+171
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also enable the board in the default configuration. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4953/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: add USB controller registration code for the QCA955X SoCsGabor Juhos2013-02-192-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Register platfom devices for the built-in USB controllers of the SoCs. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4952/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: add PCI controller registration code for the QCA955X SoCsGabor Juhos2013-02-193-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add SoC specific PCI IRQ map, and register platform devices for the two built-in PCIe RCs. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4951/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: add WMAC registration code for the QCA955X SoCsGabor Juhos2013-02-193-1/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SoC has a built-in wireless MAC. Register a platform device for that to make it usable with the ath9k driver. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4956/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: register UART for the QCA955X SoCsGabor Juhos2013-02-191-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Similarly to the preceding SoCs, the QCA955X SoCs also have a built-in NS16650 compatible UART. Register the platform device for that to make it usable. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4949/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear}Gabor Juhos2013-02-192-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ath79_device_reset_* are causing BUG when those are used on the QCA955x SoCs. The patch adds the required code to avoid that. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4948/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: add GPIO setup code for the QCA955X SoCsGabor Juhos2013-02-192-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The existing code can handle the GPIO controller of the QCA955x SoCs. Add a minimal glue code to make it working. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4947/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: add IRQ handling code for the QCA955X SoCsGabor Juhos2013-02-193-8/+140
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IRQ routing in the QCA955x SoCs is slightly different from the routing implemented in the already supported SoCs. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4955/ Signed-off-by: John Crispin <blogic@openwrt.org>
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