summaryrefslogtreecommitdiffstats
path: root/arch/mips/sibyte/sb1250
Commit message (Collapse)AuthorAgeFilesLines
* [MIPS] SMP: Call platform methods via ops structure.Ralf Baechle2008-01-291-7/+93
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sibyte: Split and move clock code.Ralf Baechle2007-11-021-173/+3
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sibyte: Fixes for oneshot timer mode.Ralf Baechle2007-11-021-37/+29
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Swarm: Fix build failureThiemo Seufer2007-11-021-1/+1
| | | | | Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] SB1250: Use the right irqaction for the timer interrupt.Ralf Baechle2007-11-021-7/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] SB1250: Remove stray assignment of cpumask.Ralf Baechle2007-11-021-1/+0
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sibyte: Fix names of the clockevent devices.Ralf Baechle2007-11-021-1/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sibyte: Build fixes / dead code removal.Ralf Baechle2007-11-021-14/+0
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] time: Fix cut'n'paste bug in Sibyte clockevent driver.Ralf Baechle2007-10-291-1/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sibyte: Delete {sb1250,bcm1480}_steal_irq().Ralf Baechle2007-10-292-27/+0
| | | | | | | | | They break the timer interrupt initialization and only seem to be a kludge for initialization happening in the wrong order. Further testing done by Thiemo confirms the suspicion that the other invocations also seem to have useless. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] time: SMP-proofing of Sibyte clockevent/clocksource code.Ralf Baechle2007-10-223-62/+65
| | | | | | | | | | | The BCM148 has 4 cores but there are also just 4 generic timers available so use the ZBbus cycle counter instead of it. In addition the ZBbus counter also offers a much higher resolution and 64-bit counting so I'm considering a later complete conversion to it once I figure out if all members of the Sibyte SOC family support it - the docs seem to agree but the headers files seem to disagree ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sibyte: Finish conversion to modern time APIs.Ralf Baechle2007-10-193-115/+30
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sibyte: Fix typos in sibyte clockevent driversAtsushi Nemoto2007-10-171-4/+4
| | | | | | | Fix some typo introduced on clockevent conversion. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] checkfiles: Fix "need space after that ','" errors.Ralf Baechle2007-10-112-5/+5
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Clockevent driver for BCM1250Ralf Baechle2007-10-111-21/+160
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Implement clockevents for R4000-style cp0 count/compare interruptRalf Baechle2007-10-112-25/+37
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Consolidate all variants of MIPS cp0 timer interrupt handlers.Ralf Baechle2007-10-111-12/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] ARC: Get rid of mips_machgroupRalf Baechle2007-10-111-1/+0
| | | | | | | This has not been any serious user of this ill conceived thing since the original invention in like '95. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sibyte: cleanup static inline forward declarations.Ralf Baechle2007-10-111-37/+37
| | | | | | | In fact there are no foward declarations at all needed when moving things into the right order. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sibyte: CONFIG_SIBYTE_SB1250_DUART -> CONFIG_SERIAL_SB1250_DUARTRalf Baechle2007-08-271-2/+2
| | | | | | | | This is needed since the Sibyte serial driver was exchanged. Issue report by Imre Kaloz <kaloz@openwrt.org>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Use -Werror on subdirectories which build cleanly.Ralf Baechle2007-07-311-0/+2
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* sb1250-duart.c: SB1250 DUART serial supportMaciej W. Rozycki2007-07-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is a driver for the SB1250 DUART, a dual serial port implementation included in the Broadcom family of SOCs descending from the SiByte SB1250 MIPS64 chip multiprocessor. It is a new implementation replacing the old-fashioned driver currently present in the linux-mips.org tree. It supports all the usual features one would expect from a(n asynchronous) serial driver, including modem line control (as far as hardware supports it -- there is edge detection logic missing from the DCD and RI lines and the driver does not implement polling of these lines at the moment), the serial console, BREAK transmission and reception, including the magic SysRq. The receive FIFO threshold is not maintained though. The driver was tested with a SWARM board which uses a BCM1250 SOC (which is dual MIPS64 CMP) and has both ports of the single DUART implemented wired externally. Both were tested. Testing included using the ports as terminal lines at 1200bps (which is the ports minimum), 115200bps and a couple of random speeds inbetween. The modem lines were verified to operate correctly. No testing was performed with a use as a network interface, like with SLIP or PPP. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Acked-by: Ralf Baechle <ralf@linux-mips.org> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [MIPS] Add bcm1480 ZBus trace support, fix wait related bugsMark Mason2007-04-272-572/+0
| | | | | | | | | Make ZBus tracing generic - moving it to a common direcotry under arch/mips/sibyte, add bcm1480 support and fix some wait related bugs (thanks to Ralf for assistance on that). Signed-off-by: Mark Mason <mason@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Add missing silicon revisions for BCM112xMark Mason2007-04-201-0/+12
| | | | | | | | | Recent versions of the BCM112X processors aren't recognized by Linux (preventing Linux from booting on those processors). This patch adds support for those that are missing. Signed-off-by: Mark Mason <mason@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Misc fixes for plat_irq_dispatch functionsThiemo Seufer2007-03-191-1/+1
| | | | | | | | | | | | o adds missing ST0_IM masks, which caused the logging of valid interrupts as spurious o stops pnx8550 to log every interrupt as spurious o adds cause register masks for ip22/ip32, which caused handling of masked interrupts o removes some superfluous parentheses in the SNI interrupt code Signed-Off-By: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sibyte: Fix ZBbus profilerRalf Baechle2007-03-092-106/+273
| | | | | | | | | | | o Fix build error. o Handle error returns. o Deal with signals received while sleeping. o Don't allow to be selected when we're not building the directory with the driver anyway. o Coding style cleanups. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix and cleanup the mess that a dozen prom_printf variants are.Ralf Baechle2007-03-041-12/+12
| | | | | | early_printk is a so much saner thing. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Kill redundant EXTRA_AFLAGSAtsushi Nemoto2007-02-261-2/+0
| | | | | | | | | | Many Makefiles in arch/mips have EXTRA_AFLAGS := $(CFLAGS) line. This is redundant while AFLAGS contains $(cflags-y) and any options only listed in CFLAGS (not in cflags-y) should be unnecessary for asm sources. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [PATCH] mark struct file_operations const 2Arjan van de Ven2007-02-121-1/+1
| | | | | | | | | | | | Many struct file_operations in the kernel can be "const". Marking them const moves these to the .rodata section, which avoids false sharing with potential dirty data. In addition it'll catch accidental writes at compile time to these shared resources. [akpm@osdl.org: sparc64 fix] Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [MIPS] use name instead of typename for each irq_chipAtsushi Nemoto2007-02-061-1/+1
| | | | | | | The "typename" field was obsoleted by the "name" field. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] prom_free_prom_memory cleanupAtsushi Nemoto2007-02-061-2/+1
| | | | | | | | | Current prom_free_prom_memory() implementations are almost same as free_init_pages(), or no-op. Make free_init_pages() extern (again) and make prom_free_prom_memory() use it. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] mips HPT cleanup: make clocksource_mips publicAtsushi Nemoto2006-11-301-4/+4
| | | | | | | | Make clocksource_mips public and get rid of mips_hpt_read, mips_hpt_mask. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] IRQ cleanupsAtsushi Nemoto2006-11-301-24/+6
| | | | | | | | | | | | | | | | | | | | | This is a big irq cleanup patch. * Use set_irq_chip() to register irq_chip. * Initialize .mask, .unmask, .mask_ack field. Functions for these method are already exist in most case. * Do not initialize .startup, .shutdown, .enable, .disable fields if default routines provided by irq_chip_set_defaults() were suitable. * Remove redundant irq_desc initializations. * Remove unnecessary local_irq_save/local_irq_restore, spin_lock. With this cleanup, it would be easy to switch to slightly lightwait irq flow handlers (handle_level_irq(), etc.) instead of __do_IRQ(). Though whole this patch is quite large, changes in each irq_chip are not quite simple. Please review and test on your platform. Thanks. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fixup migration to GENERIC_TIMEAtsushi Nemoto2006-10-311-24/+4
| | | | | | | | | | | | | | | | | | | | | Since we already moved to GENERIC_TIME, we should implement alternatives of old do_gettimeoffset routines to get sub-jiffies resolution from gettimeofday(). This patch includes: * MIPS clocksource support (based on works by Manish Lachwani). * remove unused gettimeoffset routines and related codes. * remove unised 64bit do_div64_32(). * simplify mips_hpt_init. (no argument needed, __init tag) * simplify c0_hpt_timer_init. (no need to write to c0_count) * remove some hpt_init routines. * mips_hpt_mask variable to specify bitmask of hpt value. * convert jmr3927_do_gettimeoffset to jmr3927_hpt_read. * convert ip27_do_gettimeoffset to ip27_hpt_read. * convert bcm1480_do_gettimeoffset to bcm1480_hpt_read. * simplify sb1250 hpt functions. (no need to subtract and shift) Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] A few more pt_regs fixups.Ralf Baechle2006-10-192-3/+3
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Cleanup unnecessary <asm/ptrace.h> inclusions.Ralf Baechle2006-10-092-2/+0
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Complete fixes after removal of pt_regs argument to int handlers.Ralf Baechle2006-10-083-19/+17
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] SB1250: Interrupt handler fixesMaciej W. Rozycki2006-10-031-2/+5
| | | | | | | | Mask cp0.status against cp0.cause. Additionally, spurious interrupts are not recorded. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix 32-bit kernel by replacing 64-bit-only code.Ralf Baechle2006-09-271-16/+1
| | | | | | | dclz() expects its 64-bit argument being passed as a single register but on 32-bit kernels it'll actually be in a register pair. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sibyte: Improve interrupt latency again for sb1250/bcm1480Thiemo Seufer2006-07-131-5/+5
| | | | | | | | | this patch restores the behaviour of the old (assembly-written) interrupt handler, the handler is left as soon as a single interrupt cause is handled. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Eleminate interrupt migration helper use.Ralf Baechle2006-07-131-4/+4
| | | | | | | | | > #define hw_interrupt_type irq_chip > typedef struct irq_chip hw_irq_controller; > #define no_irq_type no_irq_chip > typedef struct irq_desc irq_desc_t; Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Remove obsolete #include <linux/config.h>Jörn Engel2006-06-305-5/+0
| | | | | Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
* [PATCH] genirq: rename desc->handler to desc->chipIngo Molnar2006-06-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch-queue improves the generic IRQ layer to be truly generic, by adding various abstractions and features to it, without impacting existing functionality. While the queue can be best described as "fix and improve everything in the generic IRQ layer that we could think of", and thus it consists of many smaller features and lots of cleanups, the one feature that stands out most is the new 'irq chip' abstraction. The irq-chip abstraction is about describing and coding and IRQ controller driver by mapping its raw hardware capabilities [and quirks, if needed] in a straightforward way, without having to think about "IRQ flow" (level/edge/etc.) type of details. This stands in contrast with the current 'irq-type' model of genirq architectures, which 'mixes' raw hardware capabilities with 'flow' details. The patchset supports both types of irq controller designs at once, and converts i386 and x86_64 to the new irq-chip design. As a bonus side-effect of the irq-chip approach, chained interrupt controllers (master/slave PIC constructs, etc.) are now supported by design as well. The end result of this patchset intends to be simpler architecture-level code and more consolidation between architectures. We reused many bits of code and many concepts from Russell King's ARM IRQ layer, the merging of which was one of the motivations for this patchset. This patch: rename desc->handler to desc->chip. Originally i did not want to do this, because it's a big patch. But having both "desc->handler", "desc->handle_irq" and "action->handler" caused a large degree of confusion and made the code appear alot less clean than it truly is. I have also attempted a dual approach as well by introducing a desc->chip alias - but that just wasnt robust enough and broke frequently. So lets get over with this quickly. The conversion was done automatically via scripts and converts all the code in the kernel. This renaming patch is the first one amongst the patches, so that the remaining patches can stay flexible and can be merged and split up without having some big monolithic patch act as a merge barrier. [akpm@osdl.org: build fix] [akpm@osdl.org: another build fix] Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [MIPS] Random fixes for sb1250Thiemo Seufer2006-06-191-2/+6
| | | | | | | | Random improvements for sb1250: Silence compiler warnings, a bugfix for the profiling code, and a comment typo. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Rewrite all the assembler interrupt handlers to C.Ralf Baechle2006-04-193-154/+73
| | | | | | | | | | | | Saves like 1,600 lines of code, is way easier to debug, compilers frequently do a better job than the cut and paste type of handlers many boards had. And finally having all the stuff done in a single place also means alot of bug potencial for the MT ASE is gone. The only surviving handler in assembler is the DECstation one; I hope Maciej will rewrite it. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sibyte: Fix race in sb1250_gettimeoffset().Ralf Baechle2006-03-181-17/+56
| | | | | | | | | | | | | | | | | | | | | | | From Dave Johnson <djohnson+linuxmips@sw.starentnetworks.com>: sb1250_gettimeoffset() simply reads the current cpu 0 timer remaining value, however once this counter reaches 0 and the interrupt is raised, it immediately resets and begins to count down again. If sb1250_gettimeoffset() is called on cpu 1 via do_gettimeofday() after the timer has reset but prior to cpu 0 processing the interrupt and taking write_seqlock() in timer_interrupt() it will return a full value (or close to it) causing time to jump backwards 1ms. Once cpu 0 handles the interrupt and timer_interrupt() gets far enough along it will jump forward 1ms. Fix this problem by implementing mips_hpt_*() on sb1250 using a spare timer unrelated to the existing periodic interrupt timers. It runs at 1Mhz with a full 23bit counter. This eliminated the custom do_gettimeoffset() for sb1250 and allowed use of the generic fixed_rate_gettimeoffset() using mips_hpt_*() and timerhi/timerlo. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sibyte: Fix interrupt timer off by one bug.Ralf Baechle2006-03-181-2/+2
| | | | | | | | | From Dave Johnson <djohnson+linuxmips@sw.starentnetworks.com>: The timers need to be loaded with 1 less than the desired interval not the interval itself. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Reformat to 80 columns.Ralf Baechle2006-02-071-8/+19
| | | | | | Patch courtesy of Emily Postnews ;-) Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sibyte: Make all setup functions __init.Ralf Baechle2006-02-071-4/+5
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Rename _machine_power_off to pm_power_off so the kernel builds again.Ralf Baechle2006-02-071-1/+2
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
OpenPOWER on IntegriCloud