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path: root/arch/mips/mm/c-tx39.c
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* [MIPS] TX39xx: Add missing local_flush_icache_range initializationAtsushi Nemoto2008-09-051-0/+1
* [MIPS] Fix WARNING: at kernel/smp.c:290Thomas Bogendoerfer2008-09-051-0/+1
* [MIPS] Handle aliases in vmalloc correctly.Ralf Baechle2008-04-071-0/+15
* [MIPS] Fix loads of section missmatchesRalf Baechle2008-03-121-1/+1
* [MIPS] Allow hardwiring of the CPU type to a single type for optimization.Ralf Baechle2007-10-111-3/+3
* [MIPS] TX39: Remove redundant tx39_blast_icache() callsAtsushi Nemoto2007-03-071-12/+6
* [MIPS] Remove __flush_icache_pageAtsushi Nemoto2006-10-011-29/+0
* [MIPS] Retire flush_icache_page from mm use.Ralf Baechle2006-09-271-2/+2
* [MIPS] Handle IDE PIO cache aliases on SMP.Ralf Baechle2006-04-191-0/+7
* [MIPS] local_r4k_flush_cache_page fixAtsushi Nemoto2006-03-181-1/+0
* [MIPS] Add protected_blast_icache_range, blast_icache_range, etc.Atsushi Nemoto2006-02-141-61/+9
* Cleanup the mess in cpu_cache_init.Ralf Baechle2005-10-291-1/+1
* Sync c-tx39.c with c-r4k.c.Atsushi Nemoto2005-10-291-4/+5
* Avoid SMP cacheflushes. This is a minor optimization of startup butRalf Baechle2005-10-291-0/+1
* Update MIPS to use the 4-level pagetable code thereby getting rid ofRalf Baechle2005-10-291-1/+3
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-161-0/+493
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