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path: root/arch/mips/kernel/cpu-probe.c
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* [MIPS] Get rid of CONFIG_SB1_PASS_1_WORKAROUNDS #ifdef crapola.Ralf Baechle2006-02-071-4/+3
* MIPS: Introduce machinery for testing for MIPSxxR1/2.Ralf Baechle2006-01-101-5/+30
* MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1.Ralf Baechle2006-01-101-6/+6
* [MIPS] R10000 and R12000 need to set MIPS_CPU_4K_CACHE ...Ralf Baechle2005-12-011-2/+2
* Add support for SB1A CPU.Andrew Isaacson2005-10-291-0/+3
* Sibyte fixesAndrew Isaacson2005-10-291-1/+1
* Detect 4KSD and treat it like 4KSc.Ralf Baechle2005-10-291-0/+1
* Cleanup the mess in cpu_cache_init.Ralf Baechle2005-10-291-7/+18
* R4600 has 32 FPRs.Thiemo Seufer2005-10-291-1/+2
* Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it.Pete Popov2005-10-291-0/+19
* Detect the MIPS R2 vectored interrupt, external interrupt controllerRalf Baechle2005-10-291-0/+6
* New kernel option nowait allows disabling the use of the wait instruction.Ralf Baechle2005-10-291-0/+16
* Detect the 34K.Ralf Baechle2005-10-291-0/+5
* For MIPS32/MIPS64 cp0.config.mt == 1 implies a standard (R4k-style)Maciej W. Rozycki2005-10-291-5/+1
* Support the MIPS32 / MIPS64 DSP ASE.Ralf Baechle2005-10-291-0/+3
* 64-bit fixes for Alchemy code ;)Ralf Baechle2005-10-291-6/+5
* No point in checking cpu_has_tlb before we've computed the CPU options.Ralf Baechle2005-10-291-4/+4
* Cleanup decoding of MIPSxx config registers.Ralf Baechle2005-10-291-43/+98
* Fix BogoMIPS display on UP and some minor cosmetical things.Ralf Baechle2005-10-291-1/+0
* Detect the 4KEcR2 and for now detect handle it like the 4KEc.Ralf Baechle2005-10-291-0/+4
* Fixed buglet with previous patch that broke non au1x builds.Pete Popov2005-10-291-9/+7
* Remove CONFIG_PM dependency from au1x wait in cpu_probe.Pete Popov2005-10-291-24/+19
* Base Au1200 2.6 support.Pete Popov2005-10-291-0/+5
* [PATCH] more vr4181 removalAdrian Bunk2005-09-051-6/+0
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-161-0/+598
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