Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | MIPS: Allow kernel use of LL/SC to be separate from the presence of LL/SC. | David Daney | 2009-09-17 | 1 | -0/+3 |
* | MIPS: Allow CPU specific overriding of CP0 hwrena impl bits. | David Daney | 2009-06-17 | 1 | -0/+4 |
* | MIPS: Allow R2 CPUs to turn off generation of 'ehb' instructions. | David Daney | 2009-06-17 | 1 | -0/+4 |
* | MIPS: Enable CLO / CLZ instructions via separate CPU property | Ralf Baechle | 2009-05-14 | 1 | -0/+9 |
* | MIPS: Hook Cavium OCTEON cache init into cache.c | David Daney | 2009-01-11 | 1 | -0/+3 |
* | MIPS: New feature test macro cpu_has_mips_r | Ralf Baechle | 2008-10-30 | 1 | -0/+2 |
* | MIPS: Move headfiles to new location below arch/mips/include | Ralf Baechle | 2008-10-11 | 1 | -0/+219 |