| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
delete mode 100644 arch/mips/configs/ocelot_c_defconfig
delete mode 100644 arch/mips/momentum/ocelot_c/Makefile
delete mode 100644 arch/mips/momentum/ocelot_c/cpci-irq.c
delete mode 100644 arch/mips/momentum/ocelot_c/dbg_io.c
delete mode 100644 arch/mips/momentum/ocelot_c/irq.c
delete mode 100644 arch/mips/momentum/ocelot_c/ocelot_c_fpga.h
delete mode 100644 arch/mips/momentum/ocelot_c/platform.c
delete mode 100644 arch/mips/momentum/ocelot_c/prom.c
delete mode 100644 arch/mips/momentum/ocelot_c/reset.c
delete mode 100644 arch/mips/momentum/ocelot_c/setup.c
delete mode 100644 arch/mips/momentum/ocelot_c/uart-irq.c
delete mode 100644 arch/mips/pci/fixup-ocelot-c.c
delete mode 100644 arch/mips/pci/pci-ocelot-c.c
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Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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A defconfig file and the 10 lines of code (including comments ...) that
are rotting since lmo commit 6516a42dc8b40c6c00010346dd51496125b16644
don't quite make proper support, so let's trash it.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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This patch adds trivial support for SMARTMIPS extension. This extension
is currently implemented by 4KS[CD] CPUs.
Basically it saves/restores ACX register, which is part of the SMARTMIPS
ASE, when needed. This patch does *not* add any support for Smartmips MMU
features.
Futhermore this patch does not add explicit support for 4KS[CD] CPUs since
they are respectively mips32 and mips32r2 compliant. So with the current
processor configuration, a platform that has such CPUs needs to select
both configs:
CPU_HAS_SMARTMIPS
SYS_HAS_CPU_MIPS32_R[12]
This is due to the processor configuration which is mixing up all the
architecture variants and the processor types.
The drawback of this, is that we currently pass '-march=mips32' option to
gcc when building a kernel instead of '-march=4ksc' for 4KSC case. This
can lead to a kernel image a little bit bigger than required.
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Vitaly Wool <vitalywool@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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