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* MIPS: Alchemy: Clean up GPIO registers and accessorsManuel Lauss2011-05-192-3/+3
| | | | | | | | | | | | | | | | | | | | | | remove au_readl/au_writel, remove the predefined GPIO1/2 KSEG1 register addresses and fix the fallout in all boards and drivers. This also fixes a bug in the mtx-1_wdt driver which was introduced by commit 6ea8115bb6f359df4f45152f2b40e1d4d1891392 ("Convert mtx1 wdt to be a platform device and use generic GPIO API") before this patch mtx-1_wdt only modified GPIO215, the patch then used the gpio resource information as bit index into the GPIO2 register but the conversion to the GPIO API didn't realize that. With this patch the drivers original behaviour is restored and GPIO15 is left alone. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: Florian Fainelli <florian@openwrt.org> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: linux-watchdog@vger.kernel.org Cc: Wim Van Sebroeck <wim@iguana.be> Patchwork: https://patchwork.linux-mips.org/patch/2381/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
* MIPS: Alchemy: Rewrite UART setup and constants.Manuel Lauss2011-05-191-1/+1
| | | | | | | | | | | | Detect CPU type at runtime and setup uarts accordingly; also clean up the uart base address mess in the process as far as possible. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2352/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
* MIPS: Convert the irq functions to the new namesThomas Gleixner2011-03-291-5/+5
| | | | | | Scripted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* MIPS: Alchemy: Fix reset for MTX-1 and XXS1500Florian Fainelli2011-03-141-2/+2
| | | | | | | | | | | | | | | | | | Since commit 32fd6901 (MIPS: Alchemy: get rid of common/reset.c) Alchemy-based boards use their own reset function. For MTX-1 and XXS1500, the reset function pokes at the BCSR.SYSTEM_RESET register, but this does not work. According to Bruno Randolf, this was not tested when written. Previously, the generic au1000_restart() routine called the board specific reset function, which for MTX-1 and XXS1500 did not work, but finally made a jump to the reset vector, which really triggers a system restart. Fix reboot for both targets by jumping to the reset vector. Signed-off-by: Florian Fainelli <florian@openwrt.org> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2093/ Acked-by: Bruno Randolf <br1@einfach.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MTX-1: Make au1000_eth probe all PHY addressesFlorian Fainelli2011-03-141-0/+9
| | | | | | | | | | | | | | When au1000_eth probes the MII bus for PHY address, if we do not set au1000_eth platform data's phy_search_highest_address, the MII probing logic will exit early and will assume a valid PHY is found at address 0. For MTX-1, the PHY is at address 31, and without this patch, the link detection/speed/duplex would not work correctly. CC: stable@kernel.org Signed-off-by: Florian Fainelli <florian@openwrt.org> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2111/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Ritually kill stupid printk.Ralf Baechle2010-08-051-1/+0
| | | | | | This belongs into userland. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MTX-1: cleanup and commentsBruno Randolf2010-08-051-8/+4
| | | | | | | | | | | Add some comments about mtx1_pci_idsel() and remove a dead block of old code. Signed-off-by: Bruno Randolf <br1@einfach.org> To: linux-mips@linux-mips.org To: manuel.lauss@googlemail.com Cc: florian@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/1449/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Move Alchemy Makefile parts to their own Platform file.Manuel Lauss2010-08-051-2/+0
| | | | | | | | | | | [Ralf: Remove a forgotten -Werror in Pb1200 Makefile.] Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Manuel Lauss <manuel.lauss@googlemail.com> Patchwork: https://patchwork.linux-mips.org/patch/1319/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: move boards over to obj-yManuel Lauss2010-08-051-2/+1
| | | | | | | | | | Preparatory step for moving Alchemy over to new MIPS Platform build system support. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/1318/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MTX1: Fix build.Ralf Baechle2010-08-051-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | CC arch/mips/alchemy/mtx-1/board_setup.o {standard input}: Assembler messages: {standard input}:263: Error: opcode not supported on this processor: mips1 (mips1) `sync' {standard input}:274: Error: opcode not supported on this processor: mips1 (mips1) `sync' {standard input}:296: Error: opcode not supported on this processor: mips1 (mips1) `sync' [...] Any .set mipsX statement other than .set mips0 at the end of inline assembler is a big fat bug. Introduced by 9482eabeca315c0276ffb50026b7482481b7097b (linux-mips.org) rsp. 32fd6901a6d8d19f94e4de6be4e4b552ab078620 (kernel.org). While at it, fix the same issue in arch/mips/alchemy/devboards/pb1000/board_setup.c arch/mips/alchemy/xxs1500/board_setup.c as well. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MTX-1: Fix PCI on the MeshCube and related boardsBruno Randolf2010-07-261-5/+3
| | | | | | | | | | | | | | | | | | | | | This patch fixes a regression introduced by commit "MIPS: Alchemy: MTX-1: Use linux gpio api." (bb706b28bbd647c2fd7f22d6bf03a18b9552be05) which broke PCI bus operation. The problem is caused by alchemy_gpio2_enable() which resets the GPIO2 block. Two PCI signals (PCI_SERR and PCI_RST) are connected to GPIO2 and they obviously do not to like the reset. Since GPIO2 is correctly initialized by the boot monitor (YAMON) it is not necessary to call this function, so just remove it. Also replace gpio_set_value() with alchemy_gpio_set_value() to avoid problems in case gpiolib gets initialized after PCI. And since alchemy gpio_set_value() calls au_sync() we don't have to au_sync() again later. Signed-off-by: Bruno Randolf <br1@einfach.org> To: linux-mips@linux-mips.org To: manuel.lauss@googlemail.com Patchwork: https://patchwork.linux-mips.org/patch/1448/ Tested-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Remove forced command line settingYoichi Yuasa2010-02-271-10/+0
| | | | | | | | | It is not always used, even if it is available. Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/893/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: get rid of common/reset.cManuel Lauss2010-02-271-1/+14
| | | | | | | | | | | | | Implement reset / poweroff in the board code instead. The peripheral reset code is gone too since YAMON which all in-tree boards use does the same work when it boots. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/783/ Patchwork: http://patchwork.linux-mips.org/patch/882/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: prom_putchar is board dependentManuel Lauss2010-02-271-0/+6
| | | | | | | | | | | | | | | This patch replaces the general alchemy prom_putchar() implementation in favor of board-specific versions: The UART where the output of prom_putchar is directed to really depends on the board, the current implementation hardcodes this on a per-SoC basis which is just wrong. So a generic uart tx function is provided in the alchemy headers, and the boards can provide their own prom_putchar with custom destination uart, and all in-kernel alchemy boards support early printk. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Stop IRQ name sharingManuel Lauss2010-02-271-13/+13
| | | | | | | | | | | | | | | | | | | | Eliminate the sharing of IRQ names among the differenct Alchemy variants. IRQ numbers need no longer be hidden behind a CONFIG_SOC_AU1XXX symbol: step 1 in my quest to make the Alchemy code less reliant on a hardcoded subtype. This patch also renames the GPIO irq number constants. It's really an interrupt line, NOT a GPIO number! Code which relied on certain irq numbers to have the same name across all supported cpu subtypes is changed to determine current cpu subtype at runtime; in some places this isn't possible so a "compat" symbol is used. Run-tested on DB1200. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: remove board_init_irq() function.Manuel Lauss2010-02-273-57/+25
| | | | | | | | | | | | | remove board_init_irq(): On all in-kernel boards it is sufficient to initialize board interrupts in an arch_initcall by using the default linux irq functions. Some small irqmap.c files have been folded into board_setup files. Run-tested on DB1200; compile-tested on all other affected boards. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MTX-1: Fix build if CONFIG_PCI is disabled.Ralf Baechle2009-11-021-2/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MTX-1: Request button GPIO before setting its directionFlorian Fainelli2009-08-031-2/+12
| | | | | | | | | | | | | | | | | | | This patch fixes the following warning at boot time: WARNING: at drivers/gpio/gpiolib.c:83 0x8021d5e0() autorequest GPIO-207 Modules linked in: Call Trace:[<8011e0ec>] 0x8011e0ec [<80110a28>] 0x80110a28 [<80110a28>] 0x80110a28 [..snip..] The current code does not request the GPIO and attempts to set its direction, which is a violation of the GPIO API. This patch also unhardcode the GPIO we request and use the one we defined in the button driver. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: MTX-1: Use linux gpio api.Manuel Lauss2009-06-171-11/+13
| | | | | | | | Replace a few GPIO register accesses in the board init code with calls to the gpio api. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: update core interrupt code.Manuel Lauss2009-01-111-7/+11
| | | | | | | | | | | | | | | | | | | | | | | This patch attempts to modernize core Alchemy interrupt handling code. - add irq_chips for irq controllers instead of irq type, - add a set_type() hook to change irq trigger type during runtime, - add a set_wake() hook to control GPIO0..7 based wakeup, - use linux' IRQF_TRIGGER_ constants instead of homebrew ones, - enable GENERIC_HARDIRQS_NO__DO_IRQ. - simplify plat_irq_dispatch - merge au1xxx_irqmap into irq.c file, the only place where its contents are referenced. - board_init_irq() is now mandatory for every board; use it to register the remaining (gpio-based) interrupt sources; update all boards accordingly. Run-tested on Db1200 and other Au1200 based platforms. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> delete mode 100644 arch/mips/alchemy/common/au1xxx_irqmap.c
* MIPS: Alchemy: move commandline mangling out of common codeManuel Lauss2009-01-111-0/+12
| | | | | | | | | | | Not every alchemy-based board might want these options forced on it, and most of this stuff seems to be intended for devboard code anyway. Remove commandline mangling code out of common chip code and instead add relevant sections to all in-tree boards to not change existing behaviour. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Change strict_strtol to strict_strtoulJulia Lawall2009-01-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since memsize is unsigned, it would seem better to use strict_strtoul that strict_strtol. A simplified version of the semantic patch that makes this change is as follows: (http://www.emn.fr/x-info/coccinelle/) // <smpl> @s2@ long e; position p; @@ strict_strtol@p(...,&e) @@ position p != s2.p; type T; T e; @@ - strict_strtol@p + strict_strtoul (...,&e) // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: rename directoryRalf Baechle2008-10-115-0/+371
It's more than the au1000 these days. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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