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* Blackfin arch: cleanup cache lock codeMike Frysinger2008-08-141-1/+2
| | | | | | | | | | | - remove cheesy read_iloc() function - move invalidate_entire_icache function to lock.S - export proper prototypes for functions in lock.S - only build lock.S when BFIN_ICACHE_LOCK is enabled Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: unify the duplicated _real_start functionsMike Frysinger2008-08-061-1/+1
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: remove support for Anomaly 05000125 as it doesnt exist on any ↵Mike Frysinger2008-08-061-1/+1
| | | | | | | | supported processor/silicon Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: Functional power management support: Add CPU and platform ↵Michael Hennerich2008-05-071-2/+3
| | | | | | | | voltage scaling support Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: Functional power management support: Add support for cpu ↵Michael Hennerich2008-04-251-1/+2
| | | | | | | | frequency scaling Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: Merge BF561 support into ints-priorityMichael Hennerich2008-02-091-3/+1
| | | | | | | | | Merge single core ints-priority-sc.c and dual core ints-priority-dc.c into one common code ints-priority.c Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* [Blackfin] arch: move all code related to CPLB handling into a new ↵Bernd Schmidt2008-01-111-2/+1
| | | | | | | | subdirectory under kernel/ Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: Fix CCLK and SCLK checksRobin Getz2007-08-031-1/+1
| | | | | | | | | | Fix CCLK and SCLK checks, combine all arch checks into one file for maintance. Checkins that remove more lines than they add are always good. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: initial supporting for BF548-EZKITRoy Huang2007-07-121-2/+2
| | | | | | | | | | | | | | | | | The ADSP-BF54x was specifically designed to meet the needs of convergent multimedia applications where system performance and cost are essential ingredients. The integration of multimedia, human interface, and connectivity peripherals combined with increased system bandwidth and on-chip memory provides customers a platform to design the most demanding applications. Since now, ADSP-BF54x will be supported in the Linux kernel and bunch of related drivers such as USB OTG, ATAPI, NAND flash controller, LCD framebuffer, sound, touch screen will be submitted later. Please enjoy the show. Signed-off-by: Roy Huang <roy.huang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* blackfin architectureBryan Wu2007-05-071-0/+12
This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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