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's3c2410', 'sa1100' and 'vfp' into devel
* at91: (24 commits)
[ARM] 4615/4: sam926[13]ek buttons updated
[ARM] 4765/1: [AT91] AT91CAP9A-DK board support
[ARM] 4764/1: [AT91] AT91CAP9 core support
[ARM] 4738/1: at91sam9261: Remove udc pullup enabling in board initialisation
[ARM] 4761/1: [AT91] Board-support for NEW_LEDs
[ARM] 4760/1: [AT91] SPI CS0 errata on AT91RM9200
[ARM] 4759/1: [AT91] Buttons on CSB300
[ARM] 4758/1: [AT91] LEDs
[ARM] 4757/1: [AT91] UART initialization
[ARM] 4756/1: [AT91] Makefile cleanup
[ARM] 4755/1: [AT91] NAND update
[ARM] 4754/1: [AT91] SSC library support
[ARM] 4753/1: [AT91] Use DMA_BIT_MASK
[ARM] 4752/1: [AT91] RTT, RTC and WDT peripherals on SAM9
[ARM] 4751/1: [AT91] ISI peripheral on SAM9263
[ARM] 4750/1: [AT91] STN LCD displays on SAM9261
[ARM] 4734/1: at91sam9263ek: include IRQ for Ethernet PHY
[ARM] 4646/1: AT91: configurable HZ, default to 128
[ARM] 4688/1: at91: speed-up irq processing
[ARM] 4657/1: AT91: Header definition update
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* ep93xx:
[ARM] 4671/1: ep93xx: remove obsolete gpio_line_* operations
[ARM] 4670/1: ep93xx: implement IRQT_BOTHEDGE gpio irq sense type
[ARM] 4669/1: ep93xx: simplify GPIO code and cleanups
[ARM] 4668/1: ep93xx: implement new GPIO API
* iop:
[ARM] 4770/1: GLAN Tank: correct physmap_flash_data width field
[ARM] 4732/1: GLAN Tank: register rtc-rs5c372 i2c device
[ARM] 4708/1: iop: update defconfigs for 2.6.24
* kprobes:
ARM kprobes: let's enable it
ARM kprobes: special hook for the kprobes breakpoint handler
ARM kprobes: prevent some functions involved with kprobes from being probed
ARM kprobes: don't let a single-stepped stmdb corrupt the exception stack
ARM kprobes: add the kprobes hook to the page fault handler
ARM kprobes: core code
ARM kprobes: instruction single-stepping support
* ks8695:
[ARM] 4603/1: KS8695: debugfs interface to view pin state
[ARM] 4601/1: KS8695: PCI support
* misc:
[ARM] remove duplicate includes
[ARM] CONFIG_DEBUG_STACK_USAGE
[ARM] 4689/1: small comment wrap fix
[ARM] 4687/1: Trivial arch/arm/kernel/entry-common.S comment fix
[ARM] 4666/1: ixp4xx: fix sparse warnings in include/asm-arm/arch-ixp4xx/io.h
[ARM] remove reference to non-existent MTD_OBSOLETE_CHIPS
[SERIAL] 21285: Report baud rate back via termios
[ARM] Remove pointless casts from void pointers,
[ARM] Misc minor interrupt handler cleanups
[ARM] Remove at91_lcdc.h
[ARM] ARRAY_SIZE() cleanup
[ARM] Update mach-types
* msm:
[ARM] msm: dma support for MSM7X00A
[ARM] msm: board file for MACH_HALIBUT (QCT MSM7200A)
[ARM] msm: irq and timer support for ARCH_MSM7X00A
[ARM] msm: core platform support for ARCH_MSM7X00A
* s3c2410: (33 commits)
[ARM] 4795/1: S3C244X: Add armclk and setparent call
[ARM] 4794/1: S3C24XX: Comonise S3C2440 and S3C2442 clock code
[ARM] 4793/1: S3C24XX: Add IRQ->GPIO pin mapping function
[ARM] 4792/1: S3C24XX: Remove warnings from debug-macro.S
[ARM] 4791/1: S3C2412: Make fclk a parent of msysclk
[ARM] 4790/1: S3C2412: Fix parent selection for msysclk.
[ARM] 4789/1: S3C2412: Add missing CLKDIVN register values
[ARM] 4788/1: S3C24XX: Fix paramet to s3c2410_dma_ctrl if S3C2410_DMAF_AUTOSTART used.
[ARM] 4787/1: S3C24XX: s3c2410_dma_request() should return the allocated channel number
[ARM] 4786/1: S3C2412: Add SPI FIFO controll constants
[ARM] 4785/1: S3C24XX: Add _SHIFT definitions for S3C2410_BANKCON registers
[ARM] 4784/1: S3C24XX: Fix GPIO restore glitches
[ARM] 4783/1: S3C24XX: Add s3c2410_gpio_getpull()
[ARM] 4782/1: S3C24XX: Define FIQ_START for any FIQ users
[ARM] 4781/1: S3C24XX: DMA suspend and resume support
[ARM] 4780/1: S3C2412: Allow for seperate DMA channels for TX and RX
[ARM] 4779/1: S3C2412: Add s3c2412_gpio_set_sleepcfg() call
[ARM] 4778/1: S3C2412: Add armclk and init from DVS state
[ARM] 4777/1: S3C24XX: Ensure clk_set_rate() checks the set_rate method for the clk
[ARM] 4775/1: s3c2410: fix compilation error if only s3c2442 cpu is selected
...
* sa1100:
[ARM] sa1100: add clock source support
* vfp:
[ARM] 4584/2: ARMv7: Add Advanced SIMD (NEON) extension support
[ARM] 4583/1: ARMv7: Add VFPv3 support
[ARM] 4582/2: Add support for the common VFP subarchitecture
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This patch enables the use of the Advanced SIMD (NEON) extension on
ARMv7. The NEON technology is a 64/128-bit hybrid SIMD architecture
for accelerating the performance of multimedia and signal processing
applications. The extension shares the registers with the VFP unit and
enabling/disabling and saving/restoring follow the same rules. In
addition, there are instructions that do not have the appropriate CP
number encoded, the checks being made in the call_fpe function.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch adds the support for VFPv3 (the kernel currently supports
VFPv2). The main difference is 32 double registers (compared to 16).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch allows the VFP support code to run correctly on CPUs
compatible with the common VFP subarchitecture specification (Appendix
B in the ARM ARM v7-A and v7-R edition). It implements support for VFP
subarchitecture 2 while being backwards compatible with
subarchitecture 1.
On VFP subarchitecture 1, the arithmetic exceptions are asynchronous
(or imprecise as described in the old ARM ARM) unless the FPSCR.IXE
bit is 1. The exceptional instructions can be read from FPINST and
FPINST2 registers. With VFP subarchitecture 2, the arithmetic
exceptions can also be synchronous and marked by the FPEXC.DEX bit
(the FPEXC.EX bit is cleared). CPUs implementing the synchronous
arithmetic exceptions don't have the FPINST and FPINST2 registers and
accessing them would trigger and undefined exception.
Note that FPEXC.EX bit has an additional meaning on subarchitecture 1
- if it isn't set, there is no additional information in FPINST and
FPINST2 that needs to be saved at context switch or when lazy-loading
the VFP state of a different thread.
The patch also removes the clearing of the cumulative exception flags in
FPSCR when additional exceptions were raised. It is up to the user
application to clear these bits.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Add generic clock source support for SA11x0 platforms.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Add armclk to the supported clocks on the S3C2440 and S3C2442 to
better represent the DVS state which controls whether FCLK or HCLK
is fed to the ARM core.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Merge together the bits of the S3C2440 and S3C2442 clock code
that can be.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Add the reverse of s3c2410_gpio_getirq to convert
a IRQ number into a GPIO pin number.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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In the S3C2412 fclk is derived from msysclk, not straight from
the MPLL output. Set clk_f.parent appropriately.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The msysclk clock was checking for the wrong PLL for the
parent in s3c2412_setparent_msysclk(), trying the UPLL instead
of the MPLL output.
Also ensure the mpll and fclks are at the same rate at init time.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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S3C2410_DMAF_AUTOSTART used.
Fix the channel parameter to s3c2410_dma_ctrl() in s3c2410_dma_enqueue()
if the S3C2410_DMAF_AUTOSTART is set on the channel.
Spotted by Steven Ryu at Samsung.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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channel number
The s3c2410_dma_request() function should return the channel allocated
instead of zero for success.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The core resume code may have caused glitches in the GPIO when
restoring the GPIO state due to the order in which the GPIO registers
were being written.
Change the restore process take into account the state of the
GPIOs on resume and the state the system wants to restore them to.
See the code comments in the patch for more details of the process.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Add the call s3c2410_gpio_getpull() to return the
current state of the pin's pull-up.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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If an DMA channel was active at suspend, then ensure that
it is correctly reconfigured when the system resumes.
Note, the previous policy was for each driver to handle their
own reconfiguration on resume. The policy has been changed to
make the individual driver's job easier.
Signed-off-by: Ben Dooks <ben-linux@flfuf.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The current S3C24XX DMA code does not allow for an peripheral
that has one channel for RX and another for TX.
This patch adds a per-cpu dma operation to select the transmit
or receive channel, and adds support to the S3C2412 for the
seperate DMA channels for TX and RX.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Add s3c2412_gpio_set_sleepcfg() to allow the setting of the sleep
configuration of the GPIO blocks.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Add armclk to the S3C2412 to indicate the current clock connected to
the ARM core.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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the clk
Add checks for clk_set_rate() and ensure that we do not allow set_rate
to be called for a clock that does not have it defined. Add default
methods for fclk, hclk, pclk and mpll.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Check if the sleep command returns due to a pending interrupt
in the standby unit. If this happens, try and ack the IRQ
before re-trying the resume.
It is currently unclear whether the resume can be backed out
of at this stage as this could cause a problem with level
based interrupts.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Ensure that if the RTC IRQ is not selected for wake in the
base configuration, then the PWRCFG has the same value set
in it.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The IIS device is being registered by the Simtec Audio
driver, and thus registering here causes an error due
to device tree naming collision.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The IIS device is being registered by the Simtec Audio
driver, and thus registering here causes an error due
to device tree naming collision.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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S3C2412_GPESLPCON does not exist in the register
mappings, so remove it.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The IIS and SDI register hw_addr definitions are
incorrect in the DMA map for the S3C2412.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The S3C2412 GPIO is similar enough to the S3C2410 that
it can use it as a base for GPIO functionality.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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We have a default display set to 4, when we only have
three registered displays. Fix this argument (a seperate
patch has been generated to ensure that the LCD driver
takes notice of this bug)
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: Brian Swetland <swetland@google.com>
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Add support for the Qualcomm MSM7200A eval board.
Common devices are defined in common.c, to avoid excessive
cut'n'pasting them into other board files.
Signed-off-by: Brian Swetland <swetland@google.com>
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- Vectored Interrupt Controller support
- Timer support using the GPT and DGT timers
Signed-off-by: Brian Swetland <swetland@google.com>
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- core header files for arch-msm
- Kconfig and Makefiles to enable ARCH_MSM7X00A builds
- MSM7X00A specific arch_idle
- peripheral iomap and irq number definitions
Signed-off-by: Brian Swetland <swetland@google.com>
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Signed-off-by: Lucas Woods <woodzy@gmail.com>
Acked-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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In early 2.6 days stack utilization instrumentation was made
configurable. Seems that arm misses the DEBUG_STACK_USAGE option.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Make the comment match the code
Signed-off-by: George G. Davis <gdavis@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The CONFIG variable MTD_OBSOLETE_CHIPS was deleted in commit
ba7cc09c9c9e29a57045dc5bbf843ac1cfad3283.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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mostly in and around irq handlers.
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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mach-integrator/pci_v3.c: no need to reference 'irq' arg, its constant
mach-omap1/pm.c: remove extra whitespace
arch/arm/mach-sa1100/ssp.c: remove braces around single C stmt
arch/arm/plat-omap/mcbsp.c:
- remove pointless casts from void*
- make longer lines more readable
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Acked-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: Alejandro Martinez Ruiz <alex@flawedcode.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch adds a debug interface (if CONFIG_DEBUG_FS is selected) to
display the basic configuration and current state of the GPIO pins on
the Kendin/Micrel KS8695 processor.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch adds support for the PCI Host controller integrated in the
Kendin/Micrel KS8695 processor.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: Nicolas Pitre <nico@marvell.com>
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The kprobes code is already able to cope with reentrant probes, so its
handler must be called outside of the region protected by undef_lock.
If ever this lock is released when handlers are called then this commit
could be reverted.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
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Signed-off-by: Nicolas Pitre <nico@marvell.com>
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If kprobes installs a breakpoint on a "stmdb sp!, {...}" instruction,
and then single-step it by simulation from the exception context, it will
corrupt the saved regs on the stack from the previous context.
To avoid this, let's add an optional parameter to the svc_entry macro
allowing for a hole to be created on the stack before saving the
interrupted context, and use it in the undef_svc handler when kprobes
is enabled.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
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Signed-off-by: Nicolas Pitre <nico@marvell.com>
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This is a full implementation of Kprobes including Jprobes and
Kretprobes support.
This ARM implementation does not follow the usual kprobes double-
exception model. The traditional model is where the initial kprobes
breakpoint calls kprobe_handler(), which returns from exception to
execute the instruction in its original context, then immediately
re-enters after a second breakpoint (or single-stepping exception)
into post_kprobe_handler(), each time the probe is hit.. The ARM
implementation only executes one kprobes exception per hit, so no
post_kprobe_handler() phase. All side-effects from the kprobe'd
instruction are resolved before returning from the initial exception.
As a result, all instructions are _always_ effectively boosted
regardless of the type of instruction, and even regardless of whether
or not there is a post-handler for the probe.
Signed-off-by: Abhishek Sagar <sagar.abhishek@gmail.com>
Signed-off-by: Quentin Barnes <qbarnes@gmail.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
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This is the code implementing instruction single-stepping for kprobes
on ARM.
To get around the limitation of no Next-PC and no hardware single-
stepping, all kprobe'd instructions are split into three camps:
simulation, emulation, and rejected. "Simulated" instructions are
those instructions which behavior is reproduced by straight C code.
"Emulated" instructions are ones that are copied, slightly altered
and executed directly in the instruction slot to reproduce their
behavior. "Rejected" instructions are ones that could be simulated,
but work hasn't been put into simulating them. These instructions
should be very rare, if not unencountered, in the kernel. If ever
needed, code could be added to simulate them.
One might wonder why this and the ptrace singlestep facility are not
sharing some code. Both approaches are fundamentally different because
the ptrace code regains control after the stepped instruction by installing
a breakpoint after the instruction itself, and possibly at the location
where the instruction might be branching to, instead of simulating or
emulating the target instruction.
The ptrace approach isn't suitable for kprobes because the breakpoints
would have to be moved back, and the icache flushed, everytime the
probe is hit to let normal code execution resume, which would have a
significant performance impact. It is also racy on SMP since another
CPU could, with the right timing, sail through the probe point without
being caught. Because ptrace single-stepping always result in a
different process to be scheduled, the concern for performance is much
less significant.
On the other hand, the kprobes approach isn't (currently) suitable for
ptrace because it has no provision for proper user space memory
protection and translation, and even if that was implemented, the gain
wouldn't be worth the added complexity in the ptrace path compared to
the current approach.
So, until kprobes does support user space, both kprobes and ptrace are
best kept independent and separate.
Signed-off-by: Quentin Barnes <qbarnes@gmail.com>
Signed-off-by: Abhishek Sagar <sagar.abhishek@gmail.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
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This patch is required, in conjunction with the patch submitted to
linux-mtd [1], to access the flash memory device in the GLAN Tank.
Without the patches, the boot log shows
physmap platform flash device: 00080000 at f0000000
...
physmap-flash physmap-flash.0: map_probe failed
whereas with the patches, the boot log shows
physmap platform flash device: 00080000 at f0000000
Found: ST M29W400DB
physmap-flash.0: Found 1 x16 devices at 0x0 in 16-bit bank
number of JEDEC chips: 1
cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness.
...
cmdlinepart partition parsing not available
Searching for RedBoot partition table in physmap-flash.0 at offset 0x70000
No RedBoot partition table detected in physmap-flash.0
The change made by this patch is required because the ST M29W400DB
flash memory chip in the GLAN Tank is used in 16 bit bus mode (~BYTE
pin is high when the board is powered on).
[1] http://lists.infradead.org/pipermail/linux-mtd/2008-January/020291.html
Signed-off-by: Gordon Farquharson <gordonfarquharson@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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