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* ARM: orion: remove no longer needed gpio DT codeThomas Petazzoni2014-04-262-49/+0
| | | | | | | | | | | Following the move to pure DT-based probing of the GPIO controllers on Orion5x, some code in plat-orion/orion-gpio.c can be removed as it is no longer used. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lkml.kernel.org/r/1398202002-28530-39-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: orion: remove no longer needed DT IRQ codeThomas Petazzoni2014-04-262-33/+0
| | | | | | | | | | | | Following the move of the Orion5x Device Tree support to use irqchip_init() for the interrupt controller probing, the plat-orion/irq.c code for DT-probing of the interrupt controller is no longer necessary, so we can get rid of it. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lkml.kernel.org/r/1398202002-28530-38-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: orion: switch to a per-platform handle_irq() functionThomas Petazzoni2014-04-261-45/+0
| | | | | | | | | | | | | | | | | | | | | | | | Moving to the Device Tree implies having CONFIG_MULTI_IRQ_HANDLER enabled, even for non-DT platforms (if we want both DT and non-DT platforms to be supported in a single kernel). However, the common CONFIG_MULTI_IRQ_HANDLER handler for non-DT platforms in plat-orion/irq.c doesn't match the needs of Orion5x. Also, it doesn't make much sense for orion_irq_init() to register the multi-IRQ handler: orion_irq_init() is called once for each IRQ cause/mask tuple, while the multi-IRQ handler only needs to be registered once. To solve this problem, we move the multi-IRQ handle in per-platform code: mach-kirkwood/irq.c and mach-dove/irq.c. The Orion5x variant will be introduced in a followup commit. Of course, this code will ultimately be completely removed once all boards are converted to the Device Tree. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lkml.kernel.org/r/1398202002-28530-23-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* Merge tag 'drivers-3.15' of ↵Linus Torvalds2014-04-051-4/+6
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver changes from Arnd Bergmann: "These changes are mostly for ARM specific device drivers that either don't have an upstream maintainer, or that had the maintainer ask us to pick up the changes to avoid conflicts. A large chunk of this are clock drivers (bcm281xx, exynos, versatile, shmobile), aside from that, reset controllers for STi as well as a large rework of the Marvell Orion/EBU watchdog driver are notable" * tag 'drivers-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (99 commits) Revert "dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac." Revert "net: stmmac: Add SOCFPGA glue driver" ARM: shmobile: r8a7791: Fix SCIFA3-5 clocks ARM: STi: Add reset controller support to mach-sti Kconfig drivers: reset: stih416: add softreset controller drivers: reset: stih415: add softreset controller drivers: reset: Reset controller driver for STiH416 drivers: reset: Reset controller driver for STiH415 drivers: reset: STi SoC system configuration reset controller support dts: socfpga: Add sysmgr node so the gmac can use to reference dts: socfpga: Add support for SD/MMC on the SOCFPGA platform reset: Add optional resets and stubs ARM: shmobile: r7s72100: fix bus clock calculation Power: Reset: Generalize qnap-poweroff to work on Synology devices. dts: socfpga: Update clock entry to support multiple parents ARM: socfpga: Update socfpga_defconfig dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac. net: stmmac: Add SOCFPGA glue driver watchdog: orion_wdt: Use %pa to print 'phys_addr_t' drivers: cci: Export CCI PMU revision ...
| * watchdog: orion: Make RSTOUT register a separate resourceEzequiel Garcia2014-02-221-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to support other SoC, it's required to distinguish the 'control' timer register, from the 'rstout' register that enables system reset on watchdog expiration. To prevent a compatibility break, this commit adds a fallback to a hardcoded RSTOUT address. Reviewed-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Wim Van Sebroeck <wim@iguana.be> Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | ARM: orion: Move cache-feroceon-l2.h out of plat-orionAndrew Lunn2014-02-221-11/+0
|/ | | | | | | | | | | With the gradual move to DT, kirkwood has become a lot less dependent on plat-orion. cache-feroceon-l2.h is the last dependency. Move it out so we can drop plat-orion when building DT only kirkwood boards. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* Merge tag 'mvebu-fixes-3.13-2' of git://git.infradead.org/linux-mvebu into fixesOlof Johansson2014-01-311-0/+47
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mvebu fixes for v3.13 (incremental #2) - allow building and booting DT and non-DT plat-orion SoCs - catch proper return value for kirkwood_pm_init() - properly check return of of_iomap to solve boot hangs (mirabox, others) - remove a compile warning on Armada 370 with non-SMP. * tag 'mvebu-fixes-3.13-2' of git://git.infradead.org/linux-mvebu: ARM: mvebu: fix compilation warning on Armada 370 (i.e. non-SMP) ARM: mvebu: Fix kernel hang in mvebu_soc_id_init() when of_iomap failed ARM: kirkwood: kirkwood_pm_init() should return void ARM: orion: provide C-style interrupt handler for MULTI_IRQ_HANDLER Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: orion: provide C-style interrupt handler for MULTI_IRQ_HANDLERSebastian Hesselbarth2014-01-161-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DT-enabled Marvell Kirkwood and Dove SoCs make use of an irqchip driver. As expected for irqchip drivers, it uses a C-style interrupt handler and therefore selects MULTI_IRQ_HANDLER. Now, compiling a kernel with both non-DT and DT support enabled, selecting MULTI_IRQ_HANDLER will break ASM irq handler used by non-DT boards. Therefore, we provide a C-style irq handler even for non-DT boards, if MULTI_IRQ_HANDLER is set. By installing the C-style irq handler in orion_irq_init this is transparent to all non-DT board files. While the regression report was filed on Marvell Kirkwood, also Marvell Dove non-DT boards are affected and fixed by this patch. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Reported-by: Ian Campbell <ijc@hellion.org.uk> Cc: <stable@vger.kernel.org> # v3.12+ Fixes: 2326f04321a9 ("ARM: kirkwood: convert to DT irqchip and clocksource") Fixes: f07d73e33d0e ("ARM: dove: convert to DT irqchip and clocksource") Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | Merge tag 'soc-for-linus' of ↵Linus Torvalds2014-01-231-2/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform changes from Olof Johansson: "New core SoC-specific changes. New platforms: * Introduction of a vendor, Hisilicon, and one of their SoCs with some random numerical product name. * Introduction of EFM32, embedded platform from Silicon Labs (ARMv7m, i.e. !MMU). * Marvell Berlin series of SoCs, which include the one in Chromecast. * MOXA platform support, ARM9-based platform used mostly in industrial products * Support for Freescale's i.MX50 SoC. Other work: * Renesas work for new platforms and drivers, and conversion over to more multiplatform-friendly device registration schemes. * SMP support for Allwinner sunxi platforms. * ... plus a bunch of other stuff across various platforms" * tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (201 commits) ARM: tegra: fix tegra_powergate_sequence_power_up() inline ARM: msm_defconfig: Update for multi-platform ARM: msm: Move MSM's DT based hardware to multi-platform support ARM: msm: Only build timer.c if required ARM: msm: Only build clock.c on proc_comm based platforms ARM: ux500: Enable system suspend with WFI support ARM: ux500: turn on PRINTK_TIME in u8500_defconfig ARM: shmobile: r8a7790: Fix I2C controller names ARM: msm: Simplify ARCH_MSM_DT config ARM: msm: Add support for MSM8974 SoC ARM: sunxi: select ARM_PSCI MAINTAINERS: Update Allwinner sunXi maintainer files ARM: sunxi: Select RESET_CONTROLLER ARM: imx: improve the comment of CCM lpm SW workaround ARM: imx: improve status check of clock gate ARM: imx: add necessary interface for pfd ARM: imx_v6_v7_defconfig: Select CONFIG_REGULATOR_PFUZE100 ARM: imx_v6_v7_defconfig: Select MX35 and MX50 device tree support ARM: imx: Add cpu frequency scaling support ARM i.MX35: Add devicetree support. ...
| * | ARM: orion: Switch to sched_clock_register()Stephen Boyd2013-11-211-2/+2
| |/ | | | | | | | | | | | | | | | | | | | | The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Cc: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Kevin Hilman <khilman@linaro.org>
* | ARM: Orion: Add missing includesAndrew Lunn2013-11-242-4/+6
| | | | | | | | | | | | | | | | Building with C=1 generates warnings because of missing includes and static keywords. Add them. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | arm: plat-orion: remove deprecated IRQF_DISABLEDMichael Opdenacker2013-11-231-1/+1
|/ | | | | | | | | This patch proposes to remove the use of the IRQF_DISABLED flag It's a NOOP since 2.6.35 and it will be removed one day. Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: plat-orion: add reg offset to DT irq driver stubSebastian Hesselbarth2013-07-251-1/+1
| | | | | | | | | | With irqchip driver for Orion SoCs, reg layout of orion-intc has changed. This updates irq driver stub implemented before to the new reg layout by adding an offset to the base address passed by DT node. As orion5x still uses this stub, it cannot be removed yet. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* Merge branch 'timers-core-for-linus' of ↵Linus Torvalds2013-07-061-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer core updates from Thomas Gleixner: "The timer changes contain: - posix timer code consolidation and fixes for odd corner cases - sched_clock implementation moved from ARM to core code to avoid duplication by other architectures - alarm timer updates - clocksource and clockevents unregistration facilities - clocksource/events support for new hardware - precise nanoseconds RTC readout (Xen feature) - generic support for Xen suspend/resume oddities - the usual lot of fixes and cleanups all over the place The parts which touch other areas (ARM/XEN) have been coordinated with the relevant maintainers. Though this results in an handful of trivial to solve merge conflicts, which we preferred over nasty cross tree merge dependencies. The patches which have been committed in the last few days are bug fixes plus the posix timer lot. The latter was in akpms queue and next for quite some time; they just got forgotten and Frederic collected them last minute." * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (59 commits) hrtimer: Remove unused variable hrtimers: Move SMP function call to thread context clocksource: Reselect clocksource when watchdog validated high-res capability posix-cpu-timers: don't account cpu timer after stopped thread runtime accounting posix_timers: fix racy timer delta caching on task exit posix-timers: correctly get dying task time sample in posix_cpu_timer_schedule() selftests: add basic posix timers selftests posix_cpu_timers: consolidate expired timers check posix_cpu_timers: consolidate timer list cleanups posix_cpu_timer: consolidate expiry time type tick: Sanitize broadcast control logic tick: Prevent uncontrolled switch to oneshot mode tick: Make oneshot broadcast robust vs. CPU offlining x86: xen: Sync the CMOS RTC as well as the Xen wallclock x86: xen: Sync the wallclock when the system time is set timekeeping: Indicate that clock was set in the pvclock gtod notifier timekeeping: Pass flags instead of multiple bools to timekeeping_update() xen: Remove clock_was_set() call in the resume path hrtimers: Support resuming with two or more CPUs online (but stopped) timer: Fix jiffies wrap behavior of round_jiffies_common() ...
| * Merge branch 'timers/posix-cpu-timers-for-tglx' ofThomas Gleixner2013-07-042-6/+7
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/frederic/linux-dynticks into timers/core Frederic sayed: "Most of these patches have been hanging around for several month now, in -mmotm for a significant chunk. They already missed a few releases." Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | sched_clock: Make ARM's sched_clock generic for all architecturesStephen Boyd2013-06-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Nothing about the sched_clock implementation in the ARM port is specific to the architecture. Generalize the code so that other architectures can use it by selecting GENERIC_SCHED_CLOCK. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [jstultz: Merge minor collisions with other patches in my tree] Signed-off-by: John Stultz <john.stultz@linaro.org>
* | | drivers/dma: remove unused support for MEMSET operationsBartlomiej Zolnierkiewicz2013-07-031-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There have never been any real users of MEMSET operations since they have been introduced in January 2007 by commit 7405f74badf4 ("dmaengine: refactor dmaengine around dma_async_tx_descriptor"). Therefore remove support for them for now, it can be always brought back when needed. [sebastian.hesselbarth@gmail.com: fix drivers/dma/mv_xor] Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Vinod Koul <vinod.koul@intel.com> Acked-by: Dan Williams <djbw@fb.com> Cc: Tomasz Figa <t.figa@samsung.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: Olof Johansson <olof@lixom.net> Cc: Kevin Hilman <khilman@linaro.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | arm: orion: Use irq_get_trigger_type() to get IRQ flagsJavier Martinez Canillas2013-06-251-1/+1
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use irq_get_trigger_type() to get the IRQ trigger type flags instead calling irqd_get_trigger_type(irq_get_irq_data(irq)) Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Cc: Grant Likely <grant.likely@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Samuel Ortiz <sameo@linux.intel.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Russell King <linux@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@linux-mips.org Link: http://lkml.kernel.org/r/1371228049-27080-6-git-send-email-javier.martinez@collabora.co.uk Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | ARM: plat-orion: Fix num_resources and id for ge10 and ge11Gregory CLEMENT2013-05-201-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | When platform data were moved from arch/arm/mach-mv78xx0/common.c to arch/arm/plat-orion/common.c with the commit "7e3819d ARM: orion: Consolidate ethernet platform data", there were few typo made on gigabit Ethernet interface ge10 and ge11. This commit writes back their initial value, which allows to use this interfaces again. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Cc: <stable@vger.kernel.org> # v3.0.x Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | ARM: plat-orion: add missing ehci include to common.hSebastian Hesselbarth2013-05-131-0/+1
|/ | | | | | | | | Removing orion ehci include from board files will raise a compiler error because plat/common.h is using an enum provided by orion ehci but not including the include itself. This just adds the missing include. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* Merge tag 'gpio-for-linus' of git://git.secretlab.ca/git/linuxLinus Torvalds2013-05-092-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull removal of GENERIC_GPIO from Grant Likely: "GENERIC_GPIO now synonymous with GPIOLIB. There are no longer any valid cases for enableing GENERIC_GPIO without GPIOLIB, even though it is possible to do so which has been causing confusion and breakage. This branch does the work to completely eliminate GENERIC_GPIO." * tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux: gpio: update gpio Chinese documentation Remove GENERIC_GPIO config option Convert selectors of GENERIC_GPIO to GPIOLIB blackfin: force use of gpiolib m68k: coldfire: use gpiolib mips: pnx833x: remove requirement for GENERIC_GPIO openrisc: default GENERIC_GPIO to false avr32: default GENERIC_GPIO to false xtensa: remove explicit selection of GENERIC_GPIO sh: replace CONFIG_GENERIC_GPIO by CONFIG_GPIOLIB powerpc: remove redundant GENERIC_GPIO selection unicore32: default GENERIC_GPIO to false unicore32: remove unneeded select GENERIC_GPIO arm: plat-orion: use GPIO driver on CONFIG_GPIOLIB arm: remove redundant GENERIC_GPIO selection mips: alchemy: require gpiolib mips: txx9: change GENERIC_GPIO to GPIOLIB mips: loongson: use GPIO driver on CONFIG_GPIOLIB mips: remove redundant GENERIC_GPIO select
| * Remove GENERIC_GPIO config optionAlexandre Courbot2013-04-161-1/+1
| | | | | | | | | | | | | | | | | | | | GENERIC_GPIO has been made equivalent to GPIOLIB in architecture code and all driver code has been switch to depend on GPIOLIB. It is thus safe to have GENERIC_GPIO removed. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca>
| * arm: plat-orion: use GPIO driver on CONFIG_GPIOLIBAlexandre Courbot2013-03-201-1/+1
| | | | | | | | | | | | | | | | | | The GPIO driver uses gpiolib, thus it should be compiled when CONFIG_GPIOLIB is defined and not only CONFIG_GENERIC_GPIO Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* | Merge tag 'soc-for-linus-3' of ↵Linus Torvalds2013-05-073-184/+59
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates (part 3) from Arnd Bergmann: "This is the third and smallest of the SoC specific updates. Changes include: - SMP support for the Xilinx zynq platform - Smaller imx changes - LPAE support for mvebu - Moving the orion5x, kirkwood, dove and mvebu platforms to a common "mbus" driver for their internal devices. It would be good to get feedback on the location of the "mbus" driver. Since this is used on multiple platforms may potentially get shared with other architectures (powerpc and arm64), it was moved to drivers/bus/. We expect other similar drivers to get moved to the same place in order to avoid creating more top-level directories under drivers/ or cluttering up the messy drivers/misc/ even more." * tag 'soc-for-linus-3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits) ARM: imx: reset_controller may be disabled ARM: mvebu: Align the internal registers virtual base to support LPAE ARM: mvebu: Limit the DMA zone when LPAE is selected arm: plat-orion: remove addr-map code arm: mach-mv78xx0: convert to use the mvebu-mbus driver arm: mach-orion5x: convert to use mvebu-mbus driver arm: mach-dove: convert to use mvebu-mbus driver arm: mach-kirkwood: convert to use mvebu-mbus driver arm: mach-mvebu: convert to use mvebu-mbus driver ARM i.MX53: set CLK_SET_RATE_PARENT flag on the tve_ext_sel clock ARM i.MX53: tve_di clock is not part of the CCM, but of TVE ARM i.MX53: make tve_ext_sel propagate rate change to PLL ARM i.MX53: Remove unused tve_gate clkdev entry ARM i.MX5: Remove tve_sel clock from i.MX53 clock tree ARM: i.MX5: Add PATA and SRTC clocks ARM: imx: do not bring up unavailable cores ARM: imx: add initial imx6dl support ARM: imx1: mm: add call to mxc_device_init ARM: imx_v4_v5_defconfig: Add CONFIG_GPIO_SYSFS ARM: imx_v6_v7_defconfig: Select CONFIG_PERF_EVENTS ...
| * | arm: plat-orion: remove addr-map codeThomas Petazzoni2013-04-151-178/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that all Marvell EBU platforms have been converted to use the mvebu-mbus driver, we can remove the common plat-orion/addr-map.c code that isn't compiled anymore. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * | arm: mach-mv78xx0: convert to use the mvebu-mbus driverThomas Petazzoni2013-04-151-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit convers the mach-mv78xx0 sub-architecture to use the mvebu-mbus driver. We simply have to call mvebu_mbus_init() in the ->init_early() function, and modify the PCIe code so that it uses the new functions provided by mvebu-mbus to create the needed PCIe windows. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * | arm: mach-orion5x: convert to use mvebu-mbus driverThomas Petazzoni2013-04-151-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit migrates the mach-orion5x platforms to use the mvebu-mbus driver and therefore removes the Orion5x-specific addr-map code. The dove_init_early() function now initializes the mvebu-mbus driver by calling mvebu_mbus_init(). We also convert a number of orion5x_setup_xyz_win() calls to the appropriate mvebu_mbus_add_window() calls, as each board was doing its own setup for the NOR window or other devices. Ultimately, those devices will be probed from the DT. The common address decoding windows are now registered in the orion5x_setup_wins() function. It is worth noting that the four PCIe address decoding windows will ultimately no longer have to be registered here: it will be done automatically by the PCIe driver once Dove has been migrated to use the upcoming mvebu PCIe driver. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * | arm: mach-dove: convert to use mvebu-mbus driverThomas Petazzoni2013-04-151-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit migrates the mach-dove platforms to use the mvebu-mbus driver and therefore removes the Dove-specific addr-map code. The dove_init_early() function now initializes the mvebu-mbus driver by calling mvebu_mbus_init(). The address decoding windows are now registered in the dove_setup_cpu_wins() function. It is worth noting that the four PCIe address decoding windows will ultimately no longer have to be registered here: it will be done automatically by the PCIe driver once Dove has been migrated to use the upcoming mvebu PCIe driver. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * | arm: mach-kirkwood: convert to use mvebu-mbus driverThomas Petazzoni2013-04-151-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit migrates the mach-kirkwood platforms to use the mvebu-mbus driver and therefore removes the Kirkwood-specific addr-map code. The kirkwood_init_early() function is now responsible for initializing the mvebu-mbus driver by calling mvebu_mbus_init(). The address decoding windows are now registered in the kirkwood_setup_wins() function. It is worth noting that the four PCIe address decoding windows will ultimately no longer have to be registered here: it will be done automatically by the PCIe driver once Kirkwood has been migrated to use the upcoming mvebu PCIe driver. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * | arm: mach-mvebu: convert to use mvebu-mbus driverThomas Petazzoni2013-04-151-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The changes needed to migrate the mach-mvebu (Armada 370 and Armada XP) to the mvebu-mbus driver are fairly minimal, since not many devices currently supported on those SoCs use address decoding windows. The only one being the BootROM window, used to bring up secondary CPUs. However, this BootROM window needed for SMP brings an important requirement: the mvebu-mbus driver must be initialized at the ->early_init() time, otherwise the BootROM window cannot be setup early enough to be ready before the secondary CPUs are started. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * | Merge tag 'tags/cleanup_for_v3.10' into mvebu/socJason Cooper2013-03-302-5/+11
| |\ \ | | | | | | | | | | | | | | | | | | | | mvebu cleanup for v3.10 - plat-orion: prep for mvebu-mbus driver
| * | | ARM: Orion: add dbg_show function to gpio-orion driverSimon Guinot2013-03-301-0/+59
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a dedicated dbg_show function to the gpio-mvebu driver. In addition to the generic gpiolib informations, this function displays informations related with the specific Marvell registers (blink enable, data in polarity, interrupt masks and cause). Signed-off-by: Simon Guinot <simon.guinot@sequanux.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | | Merge tag 'cleanup-for-linus' of ↵Linus Torvalds2013-05-022-5/+11
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanup from Olof Johansson: "Here is a collection of cleanup patches. Among the pieces that stand out are: - The deletion of h720x platforms - Split of at91 non-dt platforms to their own Kconfig file to keep them separate - General cleanups and refactoring of i.MX and MXS platforms - Some restructuring of clock tables for OMAP - Convertion of PMC driver for Tegra to dt-only - Some renames of sunxi -> sun4i (Allwinner A10) - ... plus a bunch of other stuff that I haven't mentioned" * tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (119 commits) ARM: i.MX: remove unused ARCH_* configs ARM i.MX53: remove platform ahci support ARM: sunxi: Rework the restart code irqchip: sunxi: Rename sunxi to sun4i irqchip: sunxi: Make use of the IRQCHIP_DECLARE macro clocksource: sunxi: Rename sunxi to sun4i clocksource: sunxi: make use of CLKSRC_OF clocksource: sunxi: Cleanup the timer code ARM: at91: remove trailing semicolon from macros ARM: at91/setup: fix trivial typos ARM: EXYNOS: remove "config EXYNOS_DEV_DRM" ARM: EXYNOS: change the name of USB ohci header ARM: SAMSUNG: Remove unnecessary code for dma ARM: S3C24XX: Remove unused GPIO drive strength register definitions ARM: OMAP4+: PM: Restore CPU power state to ON with clockdomain force wakeup method ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2412 ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2410 ARM: S3C24XX: Removed unneeded dependency on ARCH_S3C24XX for boards ARM: SAMSUNG: Fix typo "CONFIG_SAMSUNG_DEV_RTC" ARM: S5P64X0: Fix typo "CONFIG_S5P64X0_SETUP_SDHCI" ...
| * \ \ Merge branch 'gic' of ↵Olof Johansson2013-04-021-2/+5
| |\ \ \ | | |/ / | | | / | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64 into next/cleanup * 'gic' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64: irqchip: gic: Perform the gic_secondary_init() call via CPU notifier irqchip: gic: Call handle_bad_irq() directly arm: Move chained_irq_(enter|exit) to a generic file arm: Move the set_handle_irq and handle_arch_irq declarations to asm/irq.h + Linux 3.9-rc3 Signed-off-by: Olof Johansson <olof@lixom.net>
| * | arm: plat-orion: use mv_mbus_dram_info() in PCIe codeThomas Petazzoni2013-03-171-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCIe code was directly accessing the orion_mbus_dram_info structure to get access to a description of the SDRAM chip selects in order to configure the PCIe -> SDRAM address decoding windows. However, with the introduction of the orion-mbus driver, we are going to remove this global structure and instead leave only the exported mv_mbus_dram_info() function to access this description of the SDRAM chip selects. Therefore, we simply switch to using this API. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * | arm: plat-orion: only build addr-map.c when neededThomas Petazzoni2013-03-171-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | -flagmail-match: MVEBU X-flagmail-match: KIRKWOOD X-flagmail-match: DOVE For now, addr-map.c is needed by all 5 Marvell EBU sub-architectures. However, we are going to introduce the orion-mbus driver, which will replace the address decoding code from addr-map.c. In order to ease the migration process, we will do that one sub-architecture at a time, which will require us to remove the compilation of addr-map.c one sub-architecture at a time. Therefore, we split the unconditional obj-y inclusion of addr-map.c into 5 conditionals obj-$(CONFIG_...) lines, one per sub-architecture. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | | mv643xx_eth: convert to use the Marvell Orion MDIO driverFlorian Fainelli2013-03-221-23/+31
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch converts the Marvell MV643XX ethernet driver to use the Marvell Orion MDIO driver. As a result, PowerPC and ARM platforms registering the Marvell MV643XX ethernet driver are also updated to register a Marvell Orion MDIO driver. This driver voluntarily overlaps with the Marvell Ethernet shared registers because it will use a subset of this shared register (shared_base + 0x4 to shared_base + 0x84). The Ethernet driver is also updated to look up for a PHY device using the Orion MDIO bus driver. For ARM and PowerPC we register a single instance of the "mvmdio" driver in the system like it used to be done with the use of the "shared_smi" platform_data cookie on ARM. Note that it is safe to register the mvmdio driver only for the "ge00" instance of the driver because this "ge00" interface is guaranteed to always be explicitely registered by consumers of arch/arm/plat-orion/common.c and other instances (ge01, ge10 and ge11) were all pointing their shared_smi to ge00. For PowerPC the in-tree Device Tree Source files mention only one MV643XX ethernet MAC instance so the MDIO bus driver is registered only when id == 0. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | arm: plat-orion: fix address decoding when > 4GB is usedThomas Petazzoni2013-03-081-2/+5
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During the system initialization, the orion_setup_cpu_mbus_target() function reads the SDRAM address decoding registers to find out how many chip-selects of SDRAM have been enabled, and builds a small array with one entry per chip-select. This array is then used by device drivers (XOR, Ethernet, etc.) to configure their own address decoding windows to the SDRAM. However, devices can only access the first 32 bits of the physical memory. Even though LPAE is not supported for now, some Marvell boards are now showing up with 8 GB of RAM, configured using two SDRAM address decoding windows: the first covering the first 4 GB, the second covering the last 4 GB. The array built by orion_setup_cpu_mbus_target() has therefore two entries, and device drivers try to set up two address decoding windows to the SDRAM. However, in the device registers for the address decoding, the base address is only 32 bits, so those two windows overlap each other, and the devices do not work at all. This patch makes sure that the array built by orion_setup_cpu_mbus_target() only contains the SDRAM decoding windows that correspond to the first 4 GB of the memory. To do that, it ignores the SDRAM decoding windows for which the 4 low-order bits are not zero (the 4 low-order bits of the base register are used to store bits 32:35 of the base address, so they actually indicate whether the base address is above 4 GB). This patch allows the newly introduced armada-xp-gp board to properly operate when it is mounted with more than 4 GB of RAM. Without that, all devices doing DMA (for example XOR and Ethernet) do not work at all. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2013-02-211-5/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM SoC cleanups from Arnd Bergmann: "A large number of cleanups, all over the platforms. This is dominated largely by the Samsung platforms (s3c, s5p, exynos) and a few of the others moving code out of arch/arm into more appropriate subsystems. The clocksource and irqchip drivers are now abstracted to the point where platforms that are already cleaned up do not need to even specify the driver they use, it can all get configured from the device tree as we do for normal device drivers. The clocksource changes basically touch every single platform in the process. We further clean up the use of platform specific header files here, with the goal of turning more of the platforms over to being "multiplatform" enabled, which implies that they cannot expose their headers to architecture independent code any more. It is expected that no functional changes are part of the cleanup. The overall reduction in total code lines is mostly the result of removing broken and obsolete code." * tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (133 commits) ARM: mvebu: correct gated clock documentation ARM: kirkwood: add missing include for nsa310 ARM: exynos: move exynos4210-combiner to drivers/irqchip mfd: db8500-prcmu: update resource passing drivers/db8500-cpufreq: delete dangling include ARM: at91: remove NEOCORE 926 board sunxi: Cleanup the reset code and add meaningful registers defines ARM: S3C24XX: header mach/regs-mem.h local ARM: S3C24XX: header mach/regs-power.h local ARM: S3C24XX: header mach/regs-s3c2412-mem.h local ARM: S3C24XX: Remove plat-s3c24xx directory in arch/arm/ ARM: S3C24XX: transform s3c2443 subirqs into new structure ARM: S3C24XX: modify s3c2443 irq init to initialize all irqs ARM: S3C24XX: move s3c2443 irq code to irq.c ARM: S3C24XX: transform s3c2416 irqs into new structure ARM: S3C24XX: modify s3c2416 irq init to initialize all irqs ARM: S3C24XX: move s3c2416 irq init to common irq code ARM: S3C24XX: Modify s3c_irq_wake to use the hwirq property ARM: S3C24XX: Move irq syscore-ops to irq-pm clocksource: always define CLOCKSOURCE_OF_DECLARE ...
| * ARM: use clockevents_config_and_register() where possibleShawn Guo2013-01-141-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The clockevent core is able to figure out the best mult and shift, calculate min_delta_ns and max_delta_ns, with the necessary info passed into clockevents_config_and_register(). Use this combined configure and register function where possible to make the codes less error prone and gain some positive diff stat. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Anton Vorontsov <cbouatmailru@gmail.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Tested-by: Roland Stigge <stigge@antcom.de> Acked-by: Eric Miao <eric.y.miao@gmail.com> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: David Brown <davidb@codeaurora.org> Tested-by: Tony Lindgren <tony@atomide.com> Acked-by: Barry Song <baohua.song@csr.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Tony Prisk <linux@prisktech.co.nz> Cc: Lennert Buytenhek <buytenh@wantstofly.org> Cc: Wan ZongShun <mcuos.com@gmail.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jason Cooper <jason@lakedaemon.net> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Olof Johansson <olof@lixom.net>
* | arm: plat-orion: fix printing of "MPP config unavailable on this hardware"Gerlando Falauto2013-01-231-1/+1
|/ | | | | | | | | | | | | | | | | | | | | refactored printing of the kernel warning: "orion_mpp_conf: requested MPP%u config unavailable on this hardware\n" which is not to be printed in case of variant_mask = 0 (unknown variant). This check should be performed using a logical AND (&&) as opposed to a bitwise AND (&). Otherwise, test would fail (and message would not be printed) if variant_mask != 1 Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Olof Johansson <olof@lixom.net> Cc: Nicolas Pitre <nico@linaro.org> Cc: Holger Brunck <holger.brunck@keymile.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* Merge tag 'mvebu' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-12-144-129/+69
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM SoC updates for Marvell mvebu/kirkwood from Olof Johansson: "This is a branch with updates for Marvell's mvebu/kirkwood platforms. They came in late-ish, and were heavily interdependent such that it didn't make sense to split them up across the cross-platform topic branches. So here they are (for the second release in a row) in a branch on their own." * tag 'mvebu' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (88 commits) arm: l2x0: add aurora related properties to OF binding arm: mvebu: add Aurora L2 Cache Controller to the DT arm: mvebu: add L2 cache support dma: mv_xor: fix error handling path dma: mv_xor: fix error checking of irq_of_parse_and_map() dma: mv_xor: use request_irq() instead of devm_request_irq() dma: mv_xor: clear the window override control registers arm: mvebu: fix address decoding armada_cfg_base() function ARM: mvebu: update defconfig with I2C and RTC support ARM: mvebu: Add SATA support for OpenBlocks AX3-4 ARM: mvebu: Add support for the RTC in OpenBlocks AX3-4 ARM: mvebu: Add support for I2C on OpenBlocks AX3-4 ARM: mvebu: Add support for I2C controllers in Armada 370/XP arm: mvebu: Add hardware I/O Coherency support arm: plat-orion: Add coherency attribute when setup mbus target arm: dma mapping: Export a dma ops function arm_dma_set_mask arm: mvebu: Add SMP support for Armada XP arm: mm: Add support for PJ4B cpu and init routines arm: mvebu: Add IPI support via doorbells arm: mvebu: Add initial support for power managmement service unit ...
| * Merge tag 'marvell-hwiocc-for-3.8' of ↵Jason Cooper2012-11-212-0/+5
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://github.com/MISL-EBU-System-SW/mainline-public into mvebu/everything Add hardware I/O coherency support for Armada 370/XP The purpose of this patch set is to add hardware I/O Coherency support for Armada 370 and Armada XP. Theses SoCs come with an unit called coherency fabric. A beginning of the support for this unit have been introduced with the SMP patch set. This series extend this support: the coherency fabric unit allows to use the Armada XP and the Armada 370 as nearly coherent architectures. The third patches enables this new feature and register our own set of DMA ops, to benefit this hardware enhancement. The first patches exports a dma operation function needed to register our own set of dma ops. The second patch introduces a new flag for the address decoding configuration in order to be able to set the memory windows as shared memory.
| | * arm: plat-orion: Add coherency attribute when setup mbus targetGregory CLEMENT2012-11-212-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recent SoC such as Armada 370/XP came with the possibility to deal with the I/O coherency by hardware. In this case the transaction attribute of the window must be flagged as "Shared transaction". Once this flag is set, then the transactions will be forced to be sent through the coherency block, in other case transaction is driven directly to DRAM. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Yehuda Yitschak <yehuday@marvell.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
| * | dma: mv_xor: remove the pool_size from platform_dataThomas Petazzoni2012-11-201-16/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The pool_size is always PAGE_SIZE, and since it is a software configuration paramter (and not a hardware description parameter), we cannot make it part of the Device Tree binding, so we'd better remove it from the platform_data as well. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
| * | dma: mv_xor: remove hw_id field from platform_dataThomas Petazzoni2012-11-201-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | There is no need for the platform_data to give this ID, it is simply the channel number, so we can compute it inside the driver when registering the channels. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
| * | dma: mv_xor: change the driver name to 'mv_xor'Thomas Petazzoni2012-11-201-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Since we got rid of the per-XOR channel 'mv_xor' driver, now the per-XOR engine driver that used to be called 'mv_xor_shared' can simply be named 'mv_xor'. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
| * | dma: mv_xor: rename mv_xor_shared_platform_data to mv_xor_platform_dataThomas Petazzoni2012-11-201-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | 'struct mv_xor_shared_platform_data' used to be the platform_data structure for the 'mv_xor_shared', but this driver is going to be renamed simply 'mv_xor', so also rename its platform_data structure accordingly. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
| * | dma: mv_xor: rename mv_xor_platform_data to mv_xor_channel_dataThomas Petazzoni2012-11-201-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mv_xor_platform_data used to be the platform_data structure associated to the 'mv_xor' driver. This driver no longer exists, and this data structure really contains the properties of each XOR channel part of a given XOR engine. Therefore 'struct mv_xor_channel_data' is a more appropriate name. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
| * | dma: mv_xor: remove 'shared' from mv_xor_platform_dataThomas Petazzoni2012-11-201-8/+0
| | | | | | | | | | | | | | | | | | | | | This member of the platform_data structure is no longer used, so get rid of it. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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