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* | | OMAP2/3 clkdm/pwrdm: move wkdep/sleepdep handling from pwrdm to clkdmPaul Walmsley2010-01-263-42/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move clockdomain wakeup dependency and sleep dependency data structures from the powerdomain layer to the clockdomain layer, where they belong. These dependencies were originally placed in the powerdomain layer due to unclear documentation; however, it is clear now that these dependencies are between clockdomains. For OMAP2/3, this is not such a big problem, but for OMAP4 this needs to be fixed. Thanks to Benoît Cousson <b-cousson@ti.com> for his advice on this patch. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com>
* | | OMAP clock: make the fixed divisor clock code available for all OMAPsPaul Walmsley2010-01-262-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One of the OMAP1 clocks can use the fixed divisor recalculation code introduced in the OMAP2 clock code, so rename the omap2_fixed_divisor_recalc() function to omap_fixed_divisor_recalc() and make it available to all OMAPs. A followup patch converts the OMAP1 clock. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | | OMAP3 clock: reorganize CK_* platform flagsPaul Walmsley2010-01-261-9/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add CK_* flags for the two new Sitara chips, AM3505 and AM3517, and the OMAP34xx die shrink, OMAP36xx/OMAP37xx. Introduce a new CK_* flag, CK_3XXX, that marks all clocks that are common to OMAP3 family chips. CK_343X now refers to clocks that are available only on OMAP34{1,2,3,4}0 (WTBU) and OMAP35{03,15,25,30} (any version). At some point, the RATE_IN_* flags should be updated also. While here, add some documentation describing the chip families covered by these clock flags. This patch is partially based on patches from Ranjith Lohithakshan <ranjithl@ti.com> and Vishwanath Sripathy <vishwanath.bs@ti.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Ranjith Lohithakshan <ranjithl@ti.com> Cc: Vishwanath Sripathy <vishwanath.bs@ti.com>
* | | AM35xx: Add AM35xx specific control module registersRanjith Lohithakshan2010-01-261-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | AM3517/05 has a few additional control module registers defined mainly to control the new IP's. This patch adds support for those new registers. Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | | ARM: OMAP4: PM: Make OMAP3 Clock-domain framework compatible for OMAP4.Abhijit Pagare2010-01-261-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Here the ".clkstctrl_reg" field is added to the clockdomain stucture as the module offsets for OMAP4 do not map one to one for powerdomains and clockdomains as it used to for OMAP3. Hence we need to use absolute addresses to access the control registers. Some of the clock domains have modules falling in the address space of PRM partition. Hence necessitating the use of absolute adresses. Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com>
* | | ARM: OMAP4: PM: Adapt the existing OMAP2/3 and common Power Domain Frameworks.Abhijit Pagare2010-01-261-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Taking care of the platform specific and common power domains with proper checks. Also refining some Macros according to the latest OMAP4 requirements. Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com>
* | | ARM: OMAP4: PM: Add the Autogenerated OMAP4 specific power domain framework.Abhijit Pagare2010-01-261-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Autogenerated OMAP4 power domain specific file (mach-omap2/powerdomains44xx.h) is added here. This file is auto-generated using python scripting and following is the list of the people involved: Paul Walmsley Benoit Cousson Abhijit Pagare Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
* | | ARM: OMAP4: PM: OMAP4 essential basic initialisations.Abhijit Pagare2010-01-261-1/+7
|/ / | | | | | | | | | | | | | | | | | | | | | | | | Some of the OMAP4 specific chip level initialisations are taken care of. Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tony Lindgren <tony@atomide.com> [paul@pwsan.com: updated to use '4430ES1' rather than simply '4430'; updated to apply after the intervening cpu.h/id.c patch; thanks also to Tony for catching a bug in my rewrite] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | OMAP2/3: DMTIMER: Clear pending interrupts when stopping a timerTero Kristo2010-01-211-0/+13
| | | | | | | | | | | | | | | | | | | | | | OMAP GP timers keep running for a few cycles after they are stopped, which can cause the timer to expire and generate an interrupt. The pending interrupt will prevent e.g. OMAP from entering suspend, thus we ack it manually. Only applicable on OMAP2/3/4. Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | Merge branch 'omap-fixes' into omap-fixes-for-linusTony Lindgren2010-01-202-1/+2
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| * | OMAP: dma_chan[lch_head].flag & OMAP_DMA_ACTIVE tested twice in ↵Roel Kluin2010-01-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | omap_dma_unlink_lch() The same flag and bits were tested twice. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | omap3: Fix cpu detectionTony Lindgren2010-01-191-0/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to set the omap_chip.oc carefully for the clocks to work. To fix this, set the omap_chip.oc in omap3_check_features() based on the CONTROL_IDCODE and silicon revision registers. Also add handling for 34xx es3.1.2 as es3.1 for now. Fixes booting on at least overo board. Based on an earlier patch by Paul Walmsley <paul@pwsan.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | Merge branch 'pm-fixes' of ↵Tony Lindgren2010-01-202-0/+29
|\ \ | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-fixes-for-linus
| * | OMAP: timekeeping: time should not stop during suspendKevin Hilman2010-01-201-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During suspend, the kernel timekeeping subsystem is shut down. Before suspend and upon resume, it uses a weak function read_persistent_clock() to determine the amount of time that elapsed during suspend. This function was not implemented on OMAP, so from the timekeeping subsystem perspective (and thus userspace as well) it appeared that no time elapsed during suspend. This patch uses the 32k sync timer as a the persistent clock. NOTE: This does *NOT* fully handle wrapping of the 32k sync timer, so more than one wrapping of the 32k sync timer during suspend may cause problems. Also note there are not interrupts when the 32k sync timer wraps, so something else has to be done. Reported-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP3: PM: Disable interrupt controller AUTOIDLE before WFITero Kristo2010-01-201-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP interrupt controller goes to unknown state when there is right combination of l3,l4 sleep/wake-up transitions, l4 autoidle in interrupt controller and some interrupt. When this happens, interrupts are not delivered to ARM anymore and ARM will remain in WFI (wait for interrupt) until interrupt controller is forced to wake-up (i.e. lauterbach). Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP3: PM: Ack pending interrupts before entering suspendTero Kristo2010-01-201-0/+1
| |/ | | | | | | | | | | | | | | Suspending drivers may still generate interrupts just before their suspend is completed. Any pending interrupts here will prevent sleep. Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | OMAP3: hwmod: Adding flag to prevent caching of sysconfig register.Thara Gopinath2010-01-191-0/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the current implementation the sysconfig value is read into _sysc_cache once and an actual update to the sysconfig register happens only if the new value paased is differnt from the one in _sysc_cache. _sysc_cache is updated only if _HWMOD_SYSCONFIG_LOADED is not set. This can lead to the follwing issue if off mode is enabled in modules which employs "always-retore" mechanism of context save and restore. a. The module sets the sysconfig register through omap_device_enable. Here _sysc_cache is updated with the value written to the sysconfig register and left. b. The power domain containig the module enters off mode and the module context is lost. c. The module in use becomes active and calls omap_device_enable to enable itself. Here a read of sysconfig register does not happen as _HWMOD_SYSCONFIG_LOADED flag is set. The value to be written to the sysconfig register will be same as the one written in step a. Since _sysc_cache reflects the previous written value an update of the sysconfig register does not happen. This means in modules which employs "always-restore" mechanism after off , the sysconfig regsiters will never get updated. This patch introduces a flag SYSC_NO_CACHE which if set ensures that the sysconfig register is always read into _sysc_cache before an update is attempted. This flags need to be set only by modules which does not do a context save but re-initializes the registers every time the module is accessed. This includes modules like i2c, smartreflex etc. Signed-off-by: Thara Gopinath <thara@ti.com> [paul@pwsan.com: tweaked to apply on a different head, added flag comment] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* Merge branch 'for_2.6.33rc_c' of git://git.pwsan.com/linux-2.6 into ↵Tony Lindgren2010-01-085-32/+35
|\ | | | | | | omap-fixes-for-linus
| * OMAP clock/CPUFreq: add clk_exit_cpufreq_table()Paul Walmsley2010-01-083-0/+13
| | | | | | | | | | | | | | | | | | | | | | A subsequent patch adds code on OMAP2xxx to dynamically allocate the CPUFreq frequency table in clk_init_cpufreq_table(), so for it to avoid a leak, it will need a corresponding function to free the memory. This patch adds clk_exit_cpufreq_table() with generic code to call a chip-specific variant inside the clockfw_lock spinlock via struct clk_functions. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * OMAP clock: remove incorrect EXPORT_SYMBOL()sPaul Walmsley2010-01-081-6/+0
| | | | | | | | | | | | | | | | | | | | | | The only symbols that should be exported are symbols that are to be called from loadable kernel modules, e.g., device drivers. In the context of plat-omap/clock.c, these should only be the Linux clock interface symbols as defined by include/linux/clk.h. Core code doesn't need these symbols to be exported. Also, clean up an old comment while here. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * OMAP2420 IO mapping: move IVA mapping virtual address out of vmalloc spacePaul Walmsley2010-01-081-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 10db25fea4c11661070b97832b8cc3d2af495092 causes the following kernel messages during N800 boot (and presumably all other 2420 boards): [ 0.000000] BUG: mapping for 0x58000000 at 0xe0000000 overlaps vmalloc space [ 0.000000] BUG: mapping for 0x59000000 at 0xe1000000 overlaps vmalloc space [ 0.000000] BUG: mapping for 0x5a000000 at 0xe2000000 overlaps vmalloc space Fix by remapping the IVA memory areas somewhere outside vmalloc space. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com>
| * OMAP2xxx IO mapping: mark DSP mappings as being 2420-onlyPaul Walmsley2010-01-082-26/+19
| | | | | | | | | | | | | | | | | | Out of the three major OMAP2 chip types, OMAP2420, OMAP2430, and OMAP3430, we only map the IVA on OMAP2420. The memory mapping is not shared between OMAP2420 and OMAP2430, so it is inappropriate to label those macros as '24XX'; this patch changes them to '2420'. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | omap3: add missing parenthesesRoel Kluin2010-01-081-1/+1
| | | | | | | | | | | | | | not(!) has a higher precedence than bit and(&). Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | omap1: Fix compile for omap1_bl.cTony Lindgren2010-01-081-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 9905a43b made struct backlight_ops const. Omap was setting check_fb dynamically, which caused the following compile error: drivers/video/backlight/omap1_bl.c: In function 'omapbl_probe': drivers/video/backlight/omap1_bl.c:142: error: assignment of read-only variable 'omapbl_ops' Turns out pdata->check_fb is not being used, so just remove it to fix the compile. Cc: Emese Revfy <re.emese@gmail.com> Cc: Richard Purdie <rpurdie@linux.intel.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | omap1: Add 7xx clocks and pin muxes for SPICory Maccarrone2010-01-082-0/+11
| | | | | | | | | | | | | | | | | | | | | | Commit 35c9049b27040d09461bc90928ad770be7ddf661 added drivers/spi/omap_spi_100k.c. This patch add the related clocks and pin muxing entries to make the driver work on omap7xx platforms. Signed-off-by: Cory Maccarrone <darkstar6262@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | omap: Remove uninitialized warning for gpio.cTony Lindgren2010-01-081-1/+1
| | | | | | | | | | | | Flags is not used on 15xx. Signed-off-by: Tony Lindgren <tony@atomide.com>
* | omap: &&/|| confusion in iommu_put()Roel Kluin2010-01-081-1/+1
| | | | | | | | | | | | | | obj can't be both NULL and be an error pointer. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | omap: gpio: Simultaneously requested rising and falling edgeCory Maccarrone2010-01-081-1/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some chips, namely any OMAP1 chips using METHOD_MPUIO, OMAP15xx and OMAP7xx, cannot be setup to respond to on-chip GPIO interrupts in both rising and falling edge directions -- they can only respond to one direction or the other, depending on how the ICR is configured. Additionally, current code forces rising edge detection if both flags are specified: if (trigger & IRQ_TYPE_EDGE_RISING) l |= 1 << gpio; else if (trigger & IRQ_TYPE_EDGE_FALLING) l &= ~(1 << gpio); else goto bad; This change implements a toggle function that will modify the ICR to flip the direction of interrupt for IRQs that are requested with both rising and falling flags. The toggle function is not called for chips and GPIOs it does not apply to through the use of a flip_mask that's added on a per-bank basis. The mask is only set for those GPIOs where a toggle is necessary. Edge detection starts out the same as above with FALLING mode first. The toggle happens on EACH interrupt; without it, we have the following sequence of actions on GPIO transition: ICR GPIO Result 0x1 0 -> 1 (rising) Interrupt 0x1 1 -> 0 (falling) No interrupt (set ICR to 0x0 manually) 0x0 0 -> 1 (rising) No interrupt 0x0 1 -> 0 (falling) Interrupt That is, with the ICR set to 1 for a gpio, only rising edge interrupts are caught, and with it set to 0, only falling edge interrupts are caught. If we add in the toggle, we get this: ICR GPIO Result 0x1 0 -> 1 (rising) Interrupt (ICR set to 0x0) 0x0 1 -> 0 (falling) Interrupt (ICR set to 0x1) 0x1 0 -> 1 ... so, both rising and falling are caught, per the request for both (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING). Signed-off-by: Cory Maccarrone <darkstar6262@gmail.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | omap: McBSP: Fix possible port lockoutJanusz Krzysztofik2010-01-081-3/+17
|/ | | | | | | | | | | In its current form, the omap_mcbsp_request() function can return after irq_request() failure without any cleanups, effectively locking out the port forever with clocks left running. Fix it. Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Acked-by: Jarkko Nikula <jhnikula@gmail.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* const: constify remaining dev_pm_opsAlexey Dobriyan2009-12-152-2/+2
| | | | | | Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mfd: Add support for twl6030 irq frameworkBalaji T K2009-12-141-1/+15
| | | | | | | | | | | | | This patch adds support for phoenix interrupt framework. New iInterrupt status register A, B, C are introduced in Phoenix and are cleared on write. Due to the differences in interrupt handling with respect to TWL4030, twl6030-irq.c is created for TWL6030 PMIC Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* omap3: Fix OMAP35XX_REV macrosSanjeev Premi2009-12-111-6/+6
| | | | | | | | | | | | | | In original implementation, the revision passed to these macros contained revision number in lower nibble. But, later the revision bits (OMAP_REVBITS_XX) were defined to use omap_revision[15:08] where revision number is containied in higher nibble. This patch updates the macros; else incorrect revision is detected for OMAP35xx devices. Signed-off-by: Sanjeev Premi <premi@ti.com>
* omap3: id code detection 3525 vs 3515Sergey Lapin2009-12-111-4/+4
| | | | | | | | | The runtime detection of OMAP3515 and OMAP3525 was reversed. Signed-off-by: Sergey Lapin <slapin@ossfans.org> Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap: header: remove unused data-typevikram pandita2009-12-111-9/+0
| | | | | | | | | | | | | | | | Remove unused data type omap_gpio_switch_config Thereby also get rid of following sparse warnings: arch/arm/plat-omap/include/plat/board.h :121:20: warning: dubious bitfield without explicit `signed' or `unsigned' arch/arm/plat-omap/include/plat/board.h :122:19: warning: dubious bitfield without explicit `signed' or `unsigned' arch/arm/plat-omap/include/plat/board.h :123:24: warning: dubious bitfield without explicit `signed' or `unsigned' Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Acked-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap: arch/arm/plat-omap/devices.c - sort alphabeticallyLadislav Michl2009-12-111-34/+34
| | | | | | | | Comment in omap_init_devices asks to keep init calls and their implementations in alphabetical order, so let it be that way. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap: Correcting GPMC_CONFIG1_DEVICETYPE_NANDVimal Singh2009-12-111-1/+1
| | | | | | | | For NAND devices '2' should be used with GPMC_CONFIG1_DEVICETYPE instead of '1'. Signed-off-by: Vimal Singh <vimalsingh@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP3: serial - allow platforms specify which UARTs to initializeMika Westerberg2009-12-111-0/+1
| | | | | | | | | | | This patch adds new function: omap_serial_init_port(port) that can be used to initialize only selected UARTs as serial ports. Platforms can then in their board files call this function instead of omap_serial_init() if they don't want to use all UARTs as serial ports. Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP4: AuxCoreBoot registers only accessible in secure modeSantosh Shilimkar2009-12-111-0/+2
| | | | | | | | | The AuxCoreBoot0 and AuxCoreBoot1 can be only accessed in secure mode. Replace the current code with secure monitor API's to access/modify these registers. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP4: Fix SRAM base and sizeSantosh Shilimkar2009-12-111-3/+9
| | | | | | | | This patch fixes the public sram base address and available size on OMAP4430. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP4: Fix cpu detectionSantosh Shilimkar2009-12-112-4/+7
| | | | | | | | | | | | | This patch fixes the OMAP4430 cpu detection. The IC rev detection is done with hawkeye and rev. Note that rev does not map directly to defined processor revision numbers as ES1.0 uses value 0.It also fixes the SCM base address to read the correct ID_CODE register. Also the cpu_is_omap44xx() and cpu_is_omap443x() correctly populated instead of always being true Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap1: I2C mux and clocks for omap7xxCory Maccarrone2009-12-111-0/+4
| | | | | | | | This change adds MUX pin configuration and clocks for I2C support to OMAP 730 and 850-based devices. Signed-off-by: Cory Maccarrone <darkstar6262@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap1: Add omap7xx USB supportCory Maccarrone2009-12-112-1/+9
| | | | | | | | | | This change implements USB client side support into the HTC Herald board configuration. It uses a similar, but updated algorithm to initialize the USB as is used in the linwizard project. Signed-off-by: Cory Maccarrone <darkstar6262@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap1: DMA: move LCD related code from plat-omap to mach-omap1Janusz Krzysztofik2009-12-112-458/+12
| | | | | | | | | | | | | | | All of the LCD DMA code in plat-omap/dma.c appears to be OMAP1-only (and apparently only is available on a subset of OMAP1 chips). Move this code to mach-omap1/lcd_dma.c. Tested on OMAP1510 Amstrad Delta. Compile-tested with omap_generic_2420_defconfig. Reported-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap: use smc91x_platdata to setup smc91xLadislav Michl2009-12-111-0/+10
| | | | | | | | Use smc91x_platdata to setup smc91x, so we can get rid of OMAP specific stuff in smc91x driver Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap: mux: Remove old mux code for 34xxTony Lindgren2009-12-111-224/+2
| | | | | | Remove old mux code for 34xx Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap: Split i2c platform init for mach-omap1 and mach-omap2Tony Lindgren2009-12-113-55/+42
| | | | | | | | | | | | Otherwise we cannot limit new mux code to mach-omap2. The same signal names should eventually work for other omaps under mach-omap2. Note that these pins don't need to be OMAP_PIN_INPUT_PULLUP, just OMAP_PIN_INPUT is enough. Cc: Jarkko Nikula <jhnikula@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap: mux: Add new style pin multiplexing code for omap3Tony Lindgren2009-12-111-2/+6
| | | | | | | | | | | | | | | | | | | | | | Initially only for 34xx. This code allows us to: - Make the code more generic as the omap internal signal names can stay the same across omap generations for some devices - Map mux registers to GPIO registers that is needed for dynamic muxing of pins during off-idle - Override bootloader mux values via kernel cmdline using omap_mux=some.signa1=0x1234,some.signal2=0x1234 - View and set the mux registers via debugfs if CONFIG_DEBUG_FS is enabled Cc: Mike Rapoport <mike@compulab.co.il> Cc: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP4: PM: Add dummy hooks for OMAP4 dpll api'sRajendra Nayak2009-12-112-21/+1
| | | | | | | | | | | | This patch adds dummy hooks for OMAP4 dpll api's. Removes dummy hooks for clkdev api's and enables CLKDEV for OMAP4. Also comments clockdomain calls from within the clock framework as its not supported yet for OMAP4. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com>
* ARM: OMAP4: PM: OMAP4 clock tree and clkdev registrationRajendra Nayak2009-12-112-1/+4
| | | | | | | | | | | This patch defines all the clock nodes in OMAP4430 platform. All the clock node structs and the clkdev table is autogenerated using a python script (gen_clock_tree.py) developed by Paul Walmsley, Benoit Cousson and Rajendra Nayak. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com>
* ARM: OMAP4: PM: Fix the PRM and CM base addressesRajendra Nayak2009-12-114-7/+7
| | | | | | | | | This patch fixes the PRM and CM base addresses and adds a new CM2 base address for OMAP4 Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com>
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