summaryrefslogtreecommitdiffstats
path: root/arch/arm/mm
Commit message (Expand)AuthorAgeFilesLines
* Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm into nextLinus Torvalds2014-06-0518-747/+1447
|\
| * Merge branch 'devel-stable' into for-nextRussell King2014-06-051-2/+2
| |\
| | * Merge tag 'dt-dma-properties-for-arm' of git://git.kernel.org/pub/scm/linux/k...Russell King2014-05-231-2/+2
| | |\
| | | * ARM: dma: use phys_addr_t in __dma_page_[cpu_to_dev/dev_to_cpu]Santosh Shilimkar2014-05-071-2/+2
| | | |
| | \ \
| | \ \
| | \ \
| *---. \ \ Merge branches 'alignment', 'fixes', 'l2c' (early part) and 'misc' into for-nextRussell King2014-06-0517-691/+1360
| |\ \ \ \ \
| | | | * | | ARM: 8025/1: Get rid of meminfoLaura Abbott2014-06-013-156/+99
| | | | * | | ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory typeThomas Petazzoni2014-06-011-1/+8
| | | | * | | ARM: 8043/1: uprobes need icache flush after xol writeVictor Kamensky2014-05-251-5/+28
| | | | * | | ARM: 8055/1: cacheflush: use -st dsb option for ensuring completionWill Deacon2014-05-252-7/+7
| | | | * | | ARM: 8046/1: proc: add support for the Cortex-A17 processorWill Deacon2014-05-251-0/+11
| | | | * | | ARM: dma-mapping: avoid calling dma_cache_maint_page() on dev=>cpuRussell King2014-05-221-3/+4
| | | | * | | ARM: 8037/1: mm: support big-endian page tablesJianguo Wu2014-04-251-5/+13
| | | | * | | ARM: 8031/2: change fixmap mapping region to support 32 CPUsLiu Hua2014-04-232-6/+25
| | | | * | | ARM: 8031/1: fixmap: remove FIX_KMAP_BEGIN and FIX_KMAP_ENDLiu Hua2014-04-231-3/+3
| | | | * | | ARM: 8013/1: PJ4B: Add cpu_suspend/cpu_resume hooks for PJ4BGregory CLEMENT2014-04-231-3/+25
| | | | | |/ | | | | |/|
| | | * | | ARM: l2c: trial at enabling some Cortex-A9 optimisationsRussell King2014-05-301-3/+70
| | | * | | ARM: l2c: add warnings for stuff modifying aux_ctrl register valuesRussell King2014-05-301-3/+22
| | | * | | ARM: l2c: print a warning with L2C-310 caches if the cache size is modifiedRussell King2014-05-301-0/+2
| | | * | | ARM: l2c: remove old .set_debug methodRussell King2014-05-301-19/+2
| | | * | | ARM: l2c: provide common PL310 early resume codeRussell King2014-05-302-1/+59
| | | * | | ARM: l2c: always enable non-secure access to lockdown registersRussell King2014-05-301-2/+21
| | | * | | ARM: l2c: always enable low power modesRussell King2014-05-301-0/+12
| | | * | | ARM: l2c: add automatic enable of early BRESPRussell King2014-05-301-3/+22
| | | * | | ARM: l2c: move L2 cache register saving to a more sensible locationRussell King2014-05-301-12/+22
| | | * | | ARM: l2c: check that DT files specify the required "cache-unified" propertyRussell King2014-05-301-0/+4
| | | * | | ARM: l2c: fix register namingRussell King2014-05-301-28/+29
| | | * | | ARM: l2c: implement L2C-310 erratum 752271 in core L2C codeRussell King2014-05-301-1/+17
| | | * | | ARM: l2c: provide generic hook to intercept writes to secure registersRussell King2014-05-301-12/+30
| | | * | | ARM: l2c: move errata configuration options to arch/arm/mm/KconfigRussell King2014-05-301-0/+51
| | | * | | ARM: l2c: move way size calculation data into l2c_init_dataRussell King2014-05-301-9/+20
| | | * | | ARM: l2c: add decode for L2C-220 cache waysRussell King2014-05-301-0/+1
| | | * | | ARM: l2c: move type string into l2c_init_data structureRussell King2014-05-301-7/+13
| | | * | | ARM: l2c: remove obsolete l2x0 ops for non-OF initRussell King2014-05-301-206/+0
| | | * | | ARM: l2c: convert Broadcom L2C-310 to new codeRussell King2014-05-301-16/+11
| | | * | | ARM: l2c: add L2C-220 specific handlersRussell King2014-05-301-10/+157
| | | * | | ARM: l2c: use L2C-210 handlers for L2C-310 errata-less implementationsRussell King2014-05-301-22/+36
| | | * | | ARM: l2c: implement L2C-310 erratum 588369 as a method overrideRussell King2014-05-301-0/+69
| | | * | | ARM: l2c: implement L2C-310 erratum 727915 as a method overrideRussell King2014-05-301-0/+20
| | | * | | ARM: l2c: add L2C-210 specific handlersRussell King2014-05-301-1/+122
| | | * | | ARM: l2c: move pl310_set_debug() into l2c-310 codeRussell King2014-05-301-8/+6
| | | * | | ARM: l2c: simplify l2x0 unlocking codeRussell King2014-05-301-17/+8
| | | * | | ARM: l2c: clean up save/resume functionsRussell King2014-05-301-57/+52
| | | * | | ARM: l2c: move and add ARM L2C-2x0/L2C-310 save/resume code to non-OFRussell King2014-05-301-74/+77
| | | * | | ARM: l2c: clean up L2 cache initialisation messagesRussell King2014-05-301-3/+4
| | | * | | ARM: l2c: implement fixups for L2 cache controller quirks/errataRussell King2014-05-301-11/+101
| | | * | | ARM: l2c: move aurora broadcast setup to enable functionRussell King2014-05-301-13/+15
| | | * | | ARM: l2c: only write the auxiliary control register if requiredRussell King2014-05-301-1/+3
| | | * | | ARM: l2c: write auxctrl register before unlockingRussell King2014-05-301-5/+5
| | | * | | ARM: l2c: provide enable methodRussell King2014-05-301-18/+62
| | | * | | ARM: l2c: group implementation specific code togetherRussell King2014-05-301-251/+251
OpenPOWER on IntegriCloud