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* [PATCH] ARM: Fixup missing includes in arch/arm/mm/proc-<cputype>.SThomas Gleixner2006-07-021-0/+2
| | | | | | | | For several proc-<cputype>.S files the include of proc-macros.S is missing. Make it compile and work again. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge nommu branchRussell King2006-07-011-9/+7
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| * [ARM] nommu: provide a way for correct control register value selectionRussell King2006-06-291-9/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most MMU-based CPUs have a restriction on the setting of the data cache enable and mmu enable bits in the control register, whereby if the data cache is enabled, the MMU must also be enabled. Enabling the data cache without the MMU is an invalid combination. However, there are CPUs where the data cache can be enabled without the MMU. In order to allow these CPUs to take advantage of that, provide a method whereby each proc-*.S file defines the control regsiter value for use with nommu (with the MMU disabled.) Later on, when we add support for enabling the MMU on these devices, we can adjust the "crval" macro to also enable the data cache for nommu. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] Set bit 4 on section mappings correctly depending on CPURussell King2006-06-291-0/+3
|/ | | | | | | | | | | | | | On some CPUs, bit 4 of section mappings means "update the cache when written to". On others, this bit is required to be one, and others it's required to be zero. Finally, on ARMv6 and above, setting it turns on "no execute" and prevents speculative prefetches. With all these combinations, no one value fits all CPUs, so we have to pick a value depending on the CPU type, and the area we're mapping. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] nommu: Initial uCLinux support for MMU-based CPUsHyok S. Choi2006-06-281-0/+11
| | | | | | | | | | In noMMU mode, various of functions which are defined in mm/proc-*.S is not valid or needed to be avoided. i.g. switch_mm is not needed, just returns and this makes the I & D caches are valid which shows great improvement of performance including task switching and IPC. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Fix SA110/SA1100 cache flushingRussell King2006-04-071-21/+4
| | | | | | | | We had two implementations for flushing the cache, which meant StrongARM caches weren't being correctly flushed. Fix this by always using the v4wb_flush_kern_cache_all method, rather than duplicating it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] nommu: Move hardware page table definitions to pgtable-hwdef.hRussell King2006-03-211-0/+1
| | | | | | | Move the hardware PMD and PTE page table definitions from pgtable.h into pgtable-hwdef.h, and include pgtable-hwdef.h as necessary. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 2926/1: .proc.info - postfix section with .init for `make buildcheck`Ben Dooks2005-09-201-1/+1
| | | | | | | | | | | Patch from Ben Dooks The `make buildcheck` is erroneously reporting that the .proc.info list is referencing items in the .init section as it is not itself postfixed with .init Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* kbuild: arm - use generic asm-offsets.h supportSam Ravnborg2005-09-091-1/+1
| | | | | | | Delete obsoleted stuff from arch Makefile and rename constants.h to asm-offsets.h Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-161-0/+272
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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