| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [ARM] 4128/1: Architecture compliant TTBR changing sequence | Catalin Marinas | 2007-02-08 | 1 | -2/+10 |
| | | | | | | | | | | | | On newer architectures (ARMv6, ARMv7), the depth of the prefetch and branch prediction is implementation defined and there is a small risk of wrong ASID tagging when changing TTBR0 before setting the new context id. The recommended solution is to set a reserved ASID during TTBR changing. This patch reserves ASID 0. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> | ||||
| * | [ARM] Move mmu.c out of the way | Russell King | 2006-09-20 | 1 | -0/+45 |
| Rename mmu.c to context.c - it's the ARMv6 ASID context handling code rather than generic "mmu" handling code. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> | |||||
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