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* ARM: SoC: convert VExpress/RealView to SMP operationsMarc Zyngier2012-09-131-4/+14
| | | | | | | | | Convert both Realview and VExpress to use struct smp_operations to provide their SMP and CPU hotplug operation. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: vexpress: Use FDT data in platform SMP callsPawel Moll2012-02-241-2/+153
| | | | | | | | | | | | | Scan flatten device looking for A5/A9 SCU node and initialize it using base address in "reg" property. If nothing is found, assume that there is no special SCU initialization required and initialize CPUs basing on numbers of "cpu" type devices in "cpus" node of the Device Tree. All this happens only if the board was booted with FDT, otherwise ct_desc callbacks are used. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
* ARM: vexpress: Get rid of MMIO_P2VPawel Moll2012-02-231-4/+1
| | | | | | | | | | | | | This patch gets rid of the MMIO_P2V and __MMIO_P2V macros, defining constant virtual base for motherboard and tile peripherals instead. Additionally, in preparation for the new motherboard memory map, the motherboard peripherals are using base pointers calculated in runtime, instead of compile-time calculated values. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
* ARM: versatile: Add missing ENDPROC to headsmp.SPawel Moll2012-01-161-3/+1
| | | | | | | | | Once the ENDPROC is in place, BSYM() in not longer necessary to get correct pointer to versatile_secondary_startup(). Tested-by: Jon Medhurst <tixy@linaro.org> Signed-off-by: Pawel Moll <pawel.moll@arm.com> Acked-by: Dave Martin <dave.martin@linaro.org>
* ARM: 6771/1: vexpress: add support for multiple core tilesWill Deacon2011-03-201-29/+2
| | | | | | | | | | | | | | The current Versatile Express BSP defines the MACHINE_START macro in the core tile code. This patch moves this into the generic board code and introduces a method for determining the current tile at runtime, allowing the Kernel to have support for multiple tiles compiled in. Tile-specific functions are executed via a descriptor struct containing the correct implementations for the current tile. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: realview/vexpress: consolidate SMP bringup codeRussell King2011-02-191-92/+2
| | | | | | | | Realview and Versatile Express share the same SMP bringup code, so consolidate the two implementations. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: realview,vexpress: fix section mismatch warning for pen_releaseRussell King2011-01-251-1/+1
| | | | | | | | | | | | | | | | | | | Fix two section mismatch warnings in the platform SMP bringup code for Realview and Versatile Express: WARNING: arch/arm/mach-realview/built-in.o(.text+0x8ac): Section mismatch in reference from the function write_pen_release() to the variable .cpuinit.data:pen_release The function write_pen_release() references the variable __cpuinitdata pen_release. This is often because write_pen_release lacks a __cpuinitdata annotation or the annotation of pen_release is wrong. WARNING: arch/arm/mach-vexpress/built-in.o(.text+0x7b4): Section mismatch in reference from the function write_pen_release() to the variable .cpuinit.data:pen_release The function write_pen_release() references the variable __cpuinitdata pen_release. This is often because write_pen_release lacks a __cpuinitdata annotation or the annotation of pen_release is wrong. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'misc' into develRussell King2011-01-061-48/+26
|\ | | | | | | | | | | | | | | Conflicts: arch/arm/Kconfig arch/arm/common/Makefile arch/arm/kernel/Makefile arch/arm/kernel/smp.c
| * ARM: Fix subtle race in CPU pen_release hotplug codeRussell King2010-12-201-5/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a subtle race in the CPU hotplug code, where a CPU which has been offlined can online itself before being requested, which results in things going astray on the next online/offline cycle. What happens in the normal online/offline/online cycle is: CPU0 CPU3 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 ... requests CPU3 offline ... ... dies ... checks pen_release, reads -1 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 However, as the write of -1 of pen_release is not fully flushed back to memory, and the checking of pen_release is done with caches disabled, this allows CPU3 the opportunity to read the old value of pen_release: CPU0 CPU3 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 ... requests CPU3 offline ... ... dies ... checks pen_release, reads 3 starts boot pen_release = -1 requests boot of CPU3 pen_release = 3 flush cache line Fix this by grouping the write of pen_release along with its cache line flushing code to ensure that any update to pen_release is always pushed out to physical memory. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: SMP: consolidate trace_hardirqs_off() into common SMP codeRussell King2010-12-201-2/+0
| | | | | | | | | | | | | | | | All platforms call trace_hardirqs_off() in their secondary startup code, so move this into the core SMP code - it doesn't need to be in the per-platform code. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: SMP: consolidate the common parts of smp_prepare_cpus()Russell King2010-12-201-33/+10
| | | | | | | | | | | | | | | | | | There is a certain amount of smp_prepare_cpus() which doesn't belong in the platform support code - that is, code which is invariant to the SMP implementation. Move this code into arch/arm/kernel/smp.c, and add a platform_ prefix to the original function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: SMP: Clean up ncores sanity checksRussell King2010-12-201-7/+0
| | | | | | | | | | | | | | | | | | | | scu_get_core_count() never returns zero cores, so we don't need to check and correct if ncores is zero. Tegra was missing the check against NR_CPUS, leading to a potential bitfield overflow if this becomes the case. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: SMP: pass an ipi number to smp_cross_call()Russell King2010-12-031-1/+1
| | | | | | | | | | | | | | | | | | This allows us to use smp_cross_call() to trigger a number of different software generated interrupts, rather than combining them all on one SGI. Recover the SGI number via do_IPI. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: GIC: Remove MMIO address from gic_cpu_init, rename to gic_secondary_initRussell King2010-12-141-1/+1
|/ | | | | | | | | | | | We don't need to re-pass the base address for the CPU interfaces to the GIC for secondary CPUs, as it will never be different from the boot CPU - and even if it was, we'd overwrite the boot CPU's base address. Get rid of this argument, and rename to gic_secondary_init(). Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: Add Versatile Express SMP supportRussell King2010-05-021-0/+190
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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