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* Merge tag 'tegra-for-3.8-fixes-for-rc1' of ↵Olof Johansson2012-12-171-3/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into fixes ARM: tegra: fixes for 3.8 This branch contains a few miscellaneous fixes that have shown up in the last few weeks. By Sivaram Nair (2) and Hiroshi Doyu (1) via Stephen Warren * tag 'tegra-for-3.8-fixes-for-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: amba: tegra-ahb: Fix warning w/o PM_SLEEP ARM: tegra: fix comment in dsib clk set_parent ARM: tegra: select correct parent clk for pll_p Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: tegra: fix comment in dsib clk set_parentSivaram Nair2012-11-261-3/+1
| | | | | | | | | | | | | | | | | | | | Since the clk framework has already taken necessary locks before calling into the arch clk ops code, no further locks are needed while setting the parent of dsib clk. This patch removes a comment that indicated otherwise, and yet did not take any locks. Signed-off-by: Sivaram Nair <sivaramn@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | ARM: tegra30: clocks: add CPU low-power function into tegra_cpu_car_opsJoseph Lo2012-11-151-0/+108
| | | | | | | | | | | | | | | | | | | | Add suspend, resume and rail_off_ready API into tegra_cpu_car_ops. These functions were used for CPU powered-down state maintenance. One thing needs to notice the rail_off_ready API only availalbe for cpu_g cluster not cpu_lp cluster. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | ARM: tegra30: clocks: add AHB and APB clocksJoseph Lo2012-11-051-0/+106
| | | | | | | | | | | | | | Adding the AHB and APB bus clock for Tegra30. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | ARM: tegra: move iomap.h to mach-tegraStephen Warren2012-11-051-2/+1
|/ | | | | | | | | | | | | | Nothing outside mach-tegra uses this file, so there's no need for it to be in <mach/>. Since uncompress.h and debug-macro.S remain in include/mach, they need to include "../../iomap.h" becaue of this change. uncompress.h will soon be deleted in later multi-platform/single-zImage patches. debug-macro.S will need to continue to include this header using an explicit relative path, to avoid duplicating the physical->virtual address mapping that iomap.h dictates. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra30: clk: Fix output_rate overflowMark Zhang2012-10-161-1/+1
| | | | | | | | Change the type of variable from "unsigned long" to "u64". This avoids the overflow while clock rate calculating. Signed-off-by: Mark Zhang <markz@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: introduce tegra_cpu_car_ops structuresJoseph Lo2012-09-131-0/+72
| | | | | | | | | | The tegra_cpu_car_ops provide the interface for CPU to control it's clock gating and reset status. The other drivers should use this for CPU control. And should not directly access CAR registers to control CPU. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: Fix data type for io addressPrashant Gaikwad2012-09-071-6/+6
| | | | | | | | | | | | | | Warnings were generated because following commit changed data type for address pointer 195bbca ARM: 7500/1: io: avoid writeback addressing modes for __raw_ accessors arch/arm/mach-tegra/tegra30_clocks.c: In function 'clk_measure_input_freq': arch/arm/mach-tegra/tegra30_clocks.c:418:2: warning: passing argument 2 of '__raw_writel' makes pointer from integer without a cast .../arch/arm/include/asm/io.h:88:20: note: expected 'volatile void *' but argument is of type 'unsigned int Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: clocks: separate tegra_clk_32k_ops from Tegra20 and Tegra30Joseph Lo2012-09-061-1/+1
| | | | | | | | | | Currently the tegra20 and tegra30 share the same symbol for tegra_clk_32k_ops. This will cause a compile error when building a tegra20-only kernel image. Add tegra_clk_32k_ops for tegra20 and modify tegra30_clk_32k_ops for tegra30. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: Port tegra to generic clock frameworkPrashant Gaikwad2012-09-061-551/+781
| | | | | | | | | | | | | | | | | | | | | | | | This patch converts tegra clock code to generic clock framework in following way: - Implement clk_ops as required by generic clk framework. (tegraXX_clocks.c) - Use platform specific struct clk_tegra in clk_ops implementation instead of struct clk. - Initialize all clock data statically. (tegraXX_clocks_data.c) Legacy framework did not have recalc_rate and is_enabled functions. Implemented these functions. Removed init function. It's functionality is splitted into recalc_rate and is_enabled. Static initialization is used since slab is not up in .init_early and clock is needed to be initialized before clockevent/clocksource initialization. Macros redefined for clk_tegra. Also, single struct clk_tegra is used for all type of clocks (PLL, peripheral etc.). This is to move quickly to generic common clock framework so that other dependent features will not be blocked (such as DT binding). Enabling COMMON_CLOCK config moved to ARCH_TEGRA since it is enabled for both Tegra20 and Tegra30. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra30: Separate out clk ops and clk dataPrashant Gaikwad2012-09-061-1133/+22
| | | | | | | | | Move clock initialization data to separate file. This is required for migrating to generic clock framework if static initialization is used. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: Provide clock for only one PWM controllerThierry Reding2012-07-021-5/+1
| | | | | | | | | A subsequent patch will add a generic PWM API driver for the Tegra PWFM controller, supporting all four PWM devices with a single PWM chip. The device will be named tegra-pwm and only one clock needs to be provided. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: dma: rename driver name for clock to "tegra-apbdma"Laxman Dewangan2012-06-261-1/+1
| | | | | | | | | | | Rename the driver name of the clock entry of Tegra APBDMA to tegra-apbdma from of tegra-dma. This name is more aligned towards the movement of dmaengine based new DMA driver. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: Remove second instance of uart clkPrashant Gaikwad2012-06-251-10/+10
| | | | | | | | | | In Tegra30 clock file two clk objects were created for same UART clock. Remove the duplicates and add clock aliases instead. Update the Tegra20 clock file to make the names consistent. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: provide clock aliases for AHUB configlinkStephen Warren2012-04-251-0/+9
| | | | | | | | | | The Tegra30 AHUB driver must call tegra_periph_reset_deassert() for all devices on the AHUB's configlink bus. The AHUB driver must be able to call clk_get_sys() to retrieve the clock parameter for this function. Add the necessary clock aliases to allow this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
* ARM: tegra: implement basic tegra30 clock frameworkPeter De Schrijver2012-02-061-0/+3099
Add basic tegra30 clock framework. Not all clocks are supported yet. Mainly clocks requiring voltage scaling are not yet implemented in this version. Based on work by Alex Frid <afrid@nvidia.com> and Scott Williams <scwilliams@nvidia.com>. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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