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* ARM: tegra: Remove pre-pinctrl pinmux driverStephen Warren2012-04-181-3/+0
| | | | | | | | | The pinctrl driver is now active and used by all boards. Remove the old pinmux driver. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Olof Johansson <olof@lixom.net>
* Merge tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-03-281-0/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull "ARM: More SoC support updates" from Olof Johansson: "This branch contains a handful of updates of SoC base code that had dependencies on other external trees that have now been merged: * Support for the new EXYNOS5250 SoC from Samsung * SMP and power domain support for Tegra3 from NVIDIA * ux500 updates for exporting SoC information through sysfs" Fix up trivial merge conflicts as per Olof. * tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (30 commits) ARM: mach-shmobile: ap4evb: Reserve DMA memory for the frame buffer ARM: EXYNOS: Fix compilation error with mach-exynos4-dt board ARM: dts: add initial dts file for EXYNOS5250, SMDK5250 ARM: EXYNOS: add support device tree enabled board file for EXYNOS5 ARM: EXYNOS: add support ARCH_EXYNOS5 for EXYNOS5 SoCs ARM: EXYNOS: add support get_core_count() for EXYNOS5250 ARM: EXYNOS: support EINT for EXYNOS4 and EXYNOS5 ARM: EXYNOS: add interrupt definitions for EXYNOS5250 ARM: EXYNOS: add support for EXYNOS5250 SoC ARM: EXYNOS: add support uart for EXYNOS4 and EXYNOS5 ARM: EXYNOS: add initial setup-i2c0 for EXYNOS5 ARM: EXYNOS: add clock part for EXYNOS5250 SoC ARM: EXYNOS: use exynos_init_uarts() instead of exynos4_init_uarts() ARM: EXYNOS: to declare static for mach-exynos/common.c ARM: EXYNOS: Add clkdev lookup entry for lcd clock ARM: dt: Explicitly configure all serial ports on Tegra Cardhu ARM: tegra: support for secondary cores on Tegra30 ARM: tegra: support for Tegra30 CPU powerdomains ARM: tegra: add support for Tegra30 powerdomains ARM: tegra: export tegra_powergate_is_powered() ...
| * ARM: tegra: rework Tegra secondary CPU core bringupPeter De Schrijver2012-02-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prepare the Tegra secondary CPU core bringup code for other Tegra variants. The reset handler is also generalized to allow for future introduction of powersaving modes which turn off the CPU cores. Based on work by: Scott Williams <scwilliams@nvidia.com> Chris Johnson <cwj@nvidia.com> Colin Cross <ccross@android.com> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: tegra: functions to access the flowcontrollerPeter De Schrijver2012-02-261-0/+1
| | | | | | | | | | | | | | | | | | | | Introduce some functions to write to the flowcontroller registers. The flowcontroller controls CPU sleepstates and wakeup. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * Merge branch 'for-3.4/soc-drivers' into for-3.4/t30-smpOlof Johansson2012-02-261-1/+2
| |\ | | | | | | | | | | | | Conflicts: arch/arm/mach-tegra/Makefile
* | \ Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-03-271-1/+2
|\ \ \ | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull "ARM: driver specific updates" from Arnd Bergmann: "These are all specific to some driver. They are typically the platform side of a change in the drivers directory, such as adding a new driver or extending the interface to the platform. In cases where there is no maintainer for the driver, or the maintainer prefers to have the platform changes in the same branch as the driver changes, the patches to the drivers are included as well. A much smaller set of driver updates that depend on other branches getting merged first will be sent later. The new export of tegra_chip_uid conflicts with other changes in fuse.c. In rtc-sa1100.c, the global removal of IRQF_DISABLED conflicts with the cleanup of the interrupt handling of that driver. Signed-off-by: Arnd Bergmann <arnd@arndb.de>" Fixed up aforementioned trivial conflicts. * tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (94 commits) ARM: SAMSUNG: change the name from s3c-sdhci to exynos4-sdhci mmc: sdhci-s3c: add platform data for the second capability ARM: SAMSUNG: support the second capability for samsung-soc ARM: EXYNOS: add support DMA for EXYNOS4X12 SoC ARM: EXYNOS: Add apb_pclk clkdev entry for mdma1 ARM: EXYNOS: Enable MDMA driver regulator: Remove bq24022 regulator driver rtc: sa1100: add OF support pxa: magician/hx4700: Convert to gpio-regulator from bq24022 ARM: OMAP3+: SmartReflex: fix error handling ARM: OMAP3+: SmartReflex: fix the use of debugfs_create_* API ARM: OMAP3+: SmartReflex: micro-optimization for sanity check ARM: OMAP3+: SmartReflex: misc cleanups ARM: OMAP3+: SmartReflex: move late_initcall() closer to its argument ARM: OMAP3+: SmartReflex: add missing platform_set_drvdata() ARM: OMAP3+: hwmod: add SmartReflex IRQs ARM: OMAP3+: SmartReflex: clear ERRCONFIG_VPBOUNDINTST only on a need ARM: OMAP3+: SmartReflex: Fix status masking in ERRCONFIG register ARM: OMAP3+: SmartReflex: Add a shutdown hook ARM: OMAP3+: SmartReflex Class3: disable errorgen before disable VP ... Conflicts: arch/arm/mach-tegra/Makefile arch/arm/mach-tegra/fuse.c drivers/rtc/rtc-sa1100.c
| * | ARM: tegra: Add a simple PMC driverStephen Warren2012-02-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This PMC driver is enough to parse the nvidia,invert-interrupt property from device tree, and configure the PMC's to honor that. In the future, this file could expand to centralize all other PMC accesses within the mach-tegra code. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | ARM: tegra: use APB DMA for accessing APB devicesOlof Johansson2012-02-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra2 hangs if APB registers are accessed from the cpu during an apb dma operation. The workaround is to use apb dma to read/write the registers instead. There is a dependency loop between fuses, clocks, and APBDMA. If dma is enabled, fuse reads must go through APBDMA to avoid corruption due to a hw bug. APBDMA requires a clock to be enabled. Clocks must read a fuse to determine allowable cpu frequencies. Separate out the fuse DMA initialization, and allow the fuse read and write functions to be called without using DMA before the DMA initialization has been completed. Access to the fuses before APBDMA is initialized won't hit the hardware bug because nothing else can be using DMA. Original fuse registar access code from Varun Wadekar <vwadekar@nvidia.com>, improved by Colin Cross <ccross@android.com> and later moved to separate driver by Jon Mayo <jmayo@nvidia.com>. Major refactoring/cleanup by Olof Johansson <olof@lixom.net>. Changes since v1: * fix 'return false' on error condition * dequeue dma ops in case of timeout From: Jon Mayo <jmayo@nvidia.com>. Signed-off-by: Jon Mayo <jmayo@nvidia.com>. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Stephen Warren <swarren@nvidia.com>
* | | Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-03-271-0/+3
|\ \ \ | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull "ARM: SoC specific updates" from Arnd Bergmann: "These changes are all specific to an soc family or the code for one soc. Lots of work for Tegra3 this time, but also a lot of other platforms. There will be another (smaller) set of soc patches later in the merge window for stuff that has dependencies on external trees or that was sent just before the merge window opened. The asoc tree added a few devices to the i.mx platform, which conflict with other devices added in the same place here. The tegra Makefile conflicts between a number of branches, mostly because of changes regarding localtimer.c, which was removed in the end. Signed-off-by: Arnd Bergmann <arnd@arndb.de>" Fix up some trivial conflicts, including the mentioned Tegra Makefile. * tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (51 commits) ARM: EXYNOS: fix cycle count for periodic mode of clock event timers ARM: EXYNOS: add support JPEG ARM: EXYNOS: Add DMC1, allow PPMU access for DMC ARM: SAMSUNG: Correct MIPI-CSIS io memory resource definition ARM: SAMSUNG: fix __init attribute on regarding s3c_set_platdata() ARM: SAMSUNG: Add __init attribute to samsung_bl_set() ARM: S5PV210: Add usb otg phy control ARM: S3C64XX: Add usb otg phy control ARM: EXYNOS: Enable l2 configuration through device tree ARM: EXYNOS: remove useless code to save/restore L2 ARM: EXYNOS: save L2 settings during bootup ARM: S5P: add L2 early resume code ARM: EXYNOS: Add support AFTR mode on EXYNOS4210 ARM: mx35: Setup the AIPS registers ARM: mx5: Use common function for configuring AIPS ARM: mx3: Setup AIPS registers ARM: mx3: Let mx31 and mx35 enter in LPM mode in WFI ARM: defconfig: imx_v6_v7: build in REGULATOR_FIXED_VOLTAGE ARM: imx: update imx_v6_v7_defconfig ARM: tegra: Demote EMC clock inconsistency BUG to WARN ...
| * | ARM: tegra: Avoid compiling cpuidle code when not configuredPeter De Schrijver2012-02-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | No need to compile cpuidle.c and sleep.S if cpuidle isn't configured in the kernel. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | ARM: tegra: cpuidle driver for tegraPeter De Schrijver2012-02-061-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPUidle driver for tegra. In this version only LP3 (clockgating) is supported. Based on work by: Colin Cross <ccross@android.com> Gary King <gking@nvidia.com> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | ARM: tegra: enable tegra30 clock frameworkPeter De Schrijver2012-02-061-0/+1
| |/ | | | | | | | | | | | | | | | | Add init calls for clocks on tegra30. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | Merge branch 'tegra/cleanups' into next/timerArnd Bergmann2012-03-211-1/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-tegra/Makefile arch/arm/mach-vexpress/core.h The tegra Makefile was changed in four different branches in the same line. This merge should reduce the amount of churn. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | ARM: tegra: build localtimer support only when neededArnd Bergmann2012-03-041-1/+2
| |/ | | | | | | | | | | | | | | | | | | It is possible to build a tegra kernel without localtimer support, so the tegra specific parts should only be built when that is indeed enabled. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alan Ott <alan@signal11.us> Signed-off-by: Olof Johansson <olof@lixom.net>
* | ARM: tegra: convert to twd_local_timer_register() interfaceMarc Zyngier2012-03-131-1/+1
|/ | | | | | | | | | | Add support for the new smp_twd runtime registration interface to the tegra platforms, and remove the old compile-time support. Tested on Harmony. Acked-by: Stephen Warren <swarren@nvidia.com> Cc: Colin Cross <ccross@android.com> Cc: Olof Johansson <olof@lixom.net> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
* Merge branch 'tegra/soc' into next/boardsArnd Bergmann2012-01-061-16/+19
|\ | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-tegra/board-harmony-pcie.c To fix an internal merge conflict between the tegra/soc and tegra/boards branches. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * arm/tegra: implement support for tegra30Peter De Schrijver2011-12-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Add support for tegra30 SoC. This includes a device tree compatible type for this SoC ("nvidia,tegra30") and adds L2 cache initialization for this new SoC. The clock framework is still missing, which prevents most drivers from working. The basic IRQs are the same, so remove the dependency on CONFIG_ARCH_TEGRA_2x_SOC. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * arm/tegra: pinmux tables and definitions for tegra30Peter De Schrijver2011-12-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Define the pinmuxing and pindrive tables for tegra30. The pinmux table defines the available functions for each pinmux group. The pindrive table defines the default pullup or pulldowns for each group. Derived from code by Scott Williams (scwilliams@nvidia.com) Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * arm/tegra: rename tegra20 pinmux filesPeter De Schrijver2011-12-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | Rename pinmux-t2.h and pinmux-t2-tables.c to the new tegra naming. This file will be reworked somewhat in the next patch to support multiple tegra SoC types. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * arm/tegra: rename board-dt.c to board-dt-tegra20.cPeter De Schrijver2011-12-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | Tegra20 based boards will be handled by the current board-dt.c file. Tegra30 based boards will be handled by a new board-dt-tegra30.c file. Hence rename the existing board-dt.c to board-dt-tegra20.c to reflect its use. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * arm/tegra: cleanup tegra20 supportPeter De Schrijver2011-12-171-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | * add a dependency to ARCH_TEGRA_2x_SOC in Kconfig to all tegra20 based boards and TEGRA_PCI * make powergating dependent on ARCH_TEGRA_2x_SOC * remove dependency on ARCH_TEGRA_2x_SOC for clock.c Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * arm/dt: tegra: add dts file for paz00Marc Dietrich2011-12-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | This adds a dts file for paz00. As a side effect, this also enables the embedded controller which controls the keyboard, touchpad, power, leds, and some other functions. Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Marc Dietrich <marvin24@gmx.de> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * arm/tegra: Add device-tree support for TrimSlice boardStephen Warren2011-12-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | * Add device-tree file for TrimSlice * Add that to the list of .dts files to build * Update board-dt.c to recognize TrimSlice board name v2: Makefile: Add board-trimslice-pinmux.c to obj-$(CONFIG_MACH_TEGRA_DT). v3: Makefile: Use brackets not braces around var names Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * arm/tegra: fix variable formatting in makefileOlof Johansson2011-12-071-13/+13
| | | | | | | | | | | | | | | | For some reason it started out using {} instead of (), and it's proliferated from there. Switch back to (). Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Colin Cross <ccross@android.com>
* | arm/tegra: Refactor board-*-pinmux.c to share codeStephen Warren2011-12-191-0/+1
|/ | | | | | | | | | | This moves the implementation of *_pinmux_init() into a single location. The board-specific pinmux data is left in each board's own file. This will allow future changes that set up the pinmux in a more complex fashion to do so without duplicating that code in each board's pinmux file. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm/tegra: add support for ventana pinmuxingPeter De Schrijver2011-10-131-0/+1
| | | | | | | | | Add support for ventana pinmuxing as a seaboard derivative. This is a cut down version of work done by Jong Kim <jongk@nvidia.com>. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm/dt: tegra devicetree supportGrant Likely2011-07-281-0/+3
| | | | | | | | | | Everything required to populate NVIDIA Tegra devices from the device tree. This patch adds a new DT_MACHINE_DESC() which matches against a tegra20 device tree. So far it only registers the on-chip devices, but it will be refined in follow on patches to configure clocks and pin IO from the device tree also. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* gpio/tegra: Move Tegra gpio driver to drivers/gpioGrant Likely2011-06-151-1/+0
| | | | | | | | | As part of the gpio driver consolidation, this patch moves the Tegra driver into drivers/gpio Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Colin Cross <ccross@android.com>
* ARM: tegra: irq: Move legacy_irq.c into irq.cColin Cross2011-05-111-1/+1
| | | | | | | | Now that irq.c is just an interface layer between the gic and legacy_irq.c, move the contents of legacy_irq.c into irq.c. Signed-off-by: Colin Cross <ccross@android.com>
* Merge branch 'for-linus' of git://android.git.kernel.org/kernel/tegraLinus Torvalds2011-03-241-0/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://android.git.kernel.org/kernel/tegra: ARM: tegra: harmony: initialize the TPS65862 PMIC ARM: tegra: update defconfig ARM: tegra: harmony: update PCI-e initialization sequence ARM: tegra: trimslice: enable MMC/SD slots ARM: tegra: enable new drivers in defconfig ARM: tegra: Add Toshiba AC100 support ARM: tegra: harmony: Set WM8903 gpio_base ARM: tegra: harmony: I2C-related portions of audio support ARM: tegra: harmony: register i2c devices ARM: tegra: seaboard: register i2c devices ARM: tegra: harmony: Beginnings of audio support ARM: tegra: create defines for SD-related GPIO names ARM: tegra: add devices.c entries for audio
| * ARM: tegra: harmony: initialize the TPS65862 PMICMike Rapoport2011-03-151-0/+1
| | | | | | | | | | | | | | | | | | | | Initialize the PMIC voltage regulators and provide the supply map for PCI-e clock supply. The rest of the supplies should be added together with the drivers that use them. Signed-off-by: Mike Rapoport <mike@compulab.co.il> CC: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: tegra: Add Toshiba AC100 supportMarc Dietrich2011-03-071-0/+3
| | | | | | | | | | | | | | | | This patch adds the config infrastructure, the pinmux and basic board setup code for PAZ00 (name of board inside the AC100/AZ). Signed-off-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Olof Johansson <olof@lixom.net>
* | Merge branch 'usb-next' of ↵Linus Torvalds2011-03-161-0/+1
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6 * 'usb-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6: (172 commits) USB: Add support for SuperSpeed isoc endpoints xhci: Clean up cycle bit math used during stalls. xhci: Fix cycle bit calculation during stall handling. xhci: Update internal dequeue pointers after stalls. USB: Disable auto-suspend for USB 3.0 hubs. USB: Remove bogus USB_PORT_STAT_SUPER_SPEED symbol. xhci: Return canceled URBs immediately when host is halted. xhci: Fixes for suspend/resume of shared HCDs. xhci: Fix re-init on power loss after resume. xhci: Make roothub functions deal with device removal. xhci: Limit roothub ports to 15 USB3 & 31 USB2 ports. xhci: Return a USB 3.0 hub descriptor for USB3 roothub. xhci: Register second xHCI roothub. xhci: Change xhci_find_slot_id_by_port() API. xhci: Refactor bus suspend state into a struct. xhci: Index with a port array instead of PORTSC addresses. USB: Set usb_hcd->state and flags for shared roothubs. usb: Make core allocate resources per PCI-device. usb: Store bus type in usb_hcd, not in driver flags. usb: Change usb_hcd->bandwidth_mutex to a pointer. ...
| * ARM: tegra: Add support for Tegra USB PHYsBenoit Goby2011-03-111-0/+1
| | | | | | | | | | | | | | | | Interface used by Tegra's gadget driver and ehci driver to power on and configure the USB PHYs. Signed-off-by: Benoit Goby <benoit@android.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* | ARM: tegra: add seaboard, wario and kaen boardsOlof Johansson2011-02-221-0/+3
| | | | | | | | | | | | | | | | | | This adds board support for the Seaboard eval platform and some of the derivatives that are very similar. Since they only differ in some very minor ways, most of the code is shared. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Colin Cross <ccross@android.com>
* | ARM: tegra: common device resourcesOlof Johansson2011-02-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add a common location to register resources for used on-chip devices that are commonly configured on boards. Devices will be added to this file as more drivers are added that can make use of them. This is based on work contributed by several people, most of it from Colin Cross and Erik Gilling. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Colin Cross <ccross@android.com>
* | ARM: tegra: Add external memory controller driverColin Cross2011-02-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The frequency memory bus on Tegra can be adjusted without disabling accesses to memory by updating the memory configuration registers from a per-board table, and then changing the clock frequency. The clock controller and memory controller have an interlock that prevents the new memory registers from taking effect until the clock frequency change. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* | ARM: tegra: clock: Drop CPU dvfsColin Cross2011-02-211-1/+0
| | | | | | | | | | | | | | | | | | The existing version did not extend well to core dvfs, drop it for now until the new clk api with clk_prepare and clk_unprepare is ready and non-atomic clocks are possible. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* | ARM: tegra: add TrimSlice boardMike Rapoport2011-02-101-0/+3
| | | | | | | | | | | | | | Add basic support for CompuLab TrimSlice platform Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Colin Cross <ccross@android.com>
* | ARM: tegra: Add api to control internal powergatingColin Cross2011-02-091-0/+1
|/ | | | Signed-off-by: Colin Cross <ccross@android.com>
* tegra: harmony: enable PCI ExpressMike Rapoport2010-10-211-0/+1
| | | | | | | Signed-off-by: Mike Rapoport <mike@compulab.co.il> CC: Olof Johansson <olof@lixom.net> CC: Gary King <GKing@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
* tegra: add PCI Express supportMike Rapoport2010-10-211-0/+1
| | | | | | | | | Change-Id: Ibd0bcd46895eb88952b9db29e1f68572d39aae01 Signed-off-by: Mike Rapoport <mike@compulab.co.il> Acked-by: Arnd Bergmann <arnd@arndb.de> CC: Russell King <linux@arm.linux.org.uk> CC: Gary King <GKing@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
* [ARM] tegra: Add APB DMA supportColin Cross2010-10-211-0/+1
| | | | | | | | | | | | | | | | | The APB DMA block handles DMA transfers to and from some peripherals in the Tegra SOC. It reads from sequential addresses on the memory bus, and writes repeatedly to the same address on the APB bus. Two transfer modes are supported, oneshot for transferring a known size to or from a peripheral, and continuous for streaming data. In continuous mode, a callback occurs when the buffer is half full to allow the existing data to be handled and a new request queued.x v2 changes: dma API no longer uses PTR_ERR Signed-off-by: Erik Gilling <konkers@android.com> Signed-off-by: Colin Cross <ccross@android.com>
* [ARM] tegra: Add cpufreq supportColin Cross2010-10-211-0/+1
| | | | | | | | | Implement cpufreq support for the Tegra SOC. DVFS is handled by the core virtual cpu clock. The frequencies of the two cores are tied together, the highest frequency requested by either core determines the actual frequency. Signed-off-by: Colin Cross <ccross@android.com>
* [ARM] tegra: clock: Add dvfs support, bug fixes, and cleanupsColin Cross2010-10-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add drivers to clock lookup table - Add new pll_m entries - Support I2C U16 divider - Fix rate reporting on 32.768kHz clock - Call propagate rate only if set_rate succeeds - Add support for audio_sync clock - Add 24MHz to PLLA frequency list - Correct i2s1/2/spdifout mux - Add suspend support - Fix enable/disable parent clocks in set_parent - Add max_rate parameter to all clocks - DVFS support - Add virtual cpu clock with dvfs - Support clk_round_rate - Fix requesting very high periph frequencies - Add quirks for PLLU: PLLU is slightly different from the rest of the PLLs. The lock enable bit is at bit 22 instead of 18 in the MISC register, and the post divider field is a single bit with reversed values from other PLLs. - Simplify recalculating clock rates - Fix UART divider flags - Remove unused clock ops Signed-off-by: Colin Cross <ccross@android.com>
* [ARM] tegra: Add support for reading fusesColin Cross2010-10-211-0/+1
| | | | | | | | The Tegra SOC contains fuses to identify the CPU type and bin, and a unique id. The CPU info is required to determine the correct voltages for each cpu and core frequency. Signed-off-by: Colin Cross <ccross@android.com>
* [ARM] tegra: pinmux: add safe values, move tegra2, add suspendColin Cross2010-10-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - the reset values for some pin groups in the tegra pin mux can result in functional errors due to conflicting with actively-configured pin groups muxing from the same controller. this change adds a known safe, non- conflicting mux for every pin group, which can be used on platforms where the pin group is not routed to any peripheral - also add each pin group's I/O voltage rail, to enable platform code to map from the pin groups used by each interface to the regulators used for dynamic voltage control - add routines to individually configure the tristate, pin mux and pull- ups for a pingroup_config array, so that it is possible to program individual values at run-time without modifying other values. this allows driver power-management code to reprogram individual interfaces into lower power states during idle / suspend, or to reprogram the pin mux to support multiple physical busses per internal controller (e.g., sharing a single I2C or SPI controller across multiple pin groups) - move chip-specific data like pingroups and drive-pingroups out of the common code and into chip-specific code - fix debug output for group with no pullups - add a TEGRA_MUX_SAFE function. Setting a pingroup to TEGRA_MUX_SAFE will automatically select a mux setting that is guaranteed not to conflict with any of the hardware blocks. Signed-off-by: Gary King <gking@nvidia.com>
* [ARM] tegra: Add legacy irq supportColin Cross2010-10-211-1/+1
| | | | | | | | The "legacy irq controller" duplicates the functionality of the GIC, but remains powered during the cpu suspend and idle modes that power down the CPU and the GIC. Signed-off-by: Colin Cross <ccross@android.com>
* [ARM] tegra: harmony: Add harmony board fileColin Cross2010-08-051-0/+3
| | | | | | | | | | | | | | | | | v2: fixes from Russell King - include linux/io.h instead of mach/io.h v3: fixes from Linus Walleij - remove /16 * 16 from UART clock v3: - Fix checkpatch issues - make board init calls explicit - use clock init table to set clocks - remove panel Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Erik Gilling <konkers@android.com>
* [ARM] tegra: add pinmux supportErik Gilling2010-08-051-0/+2
| | | | | | | | | | | v2: fixes from Russell King - include linux/io.h instead of asm/io.h v3: - Add drive strength controls - Replace typedef enums with plain enums Signed-off-by: Erik Gilling <konkers@android.com> Signed-off-by: Colin Cross <ccross@android.com>
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