| Commit message (Collapse) | Author | Age | Files | Lines |
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Since the A4LC should only be powered off if the A3RV is off, make
the A4LC's power down routine return -EBUSY if A3RV is not off to
indicate to the core that it doesn't want to power off the domain in
that case. This will cause the core to regard A4LC as active, so
the pm_genpd_poweron() in pd_power_down_a3rv() is not necessary any
more.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Magnus Damm <damm@opensource.se>
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Make pd_power_down_a3rv() use genpd_queue_power_off_work() to queue
up the powering off of the A4LC domain to avoid queuing it up when
it is pending.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Magnus Damm <damm@opensource.se>
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Make shmobile use pm_genpd_poweroff_unused() instead of the
open-coded powering off PM domains without devices in use.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Magnus Damm <damm@opensource.se>
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Add a power domain workaround for the VPU and A3RV on sh7372.
The sh7372 data sheet mentions that the VPU is located in the
A3RV power domain. The A3RV power domain is not related to A4LC
in any way, but testing shows that unless A3RV _and_ A4LC are
powered on the VPU test program will bomb out.
This issue may be caused by a more or less undocumented dependency
on the MERAM block that happens to be located in A4LC. So now we
know that the out-of-reset requirement of the VPU is that the MERAM
is powered on.
This patch adds a workaround for A3RV to make sure A4LC is powered
on - this so we can use the VPU even though the LCDCs are in blanking
state and A4LC is supposed to be off.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Add sh7372 specific code to power down unused pm domains.
This should really be replaced by some generic PM core
code IMO, but until that happens this patch makes sure
we don't waste power by leaving unused power domains on.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Add a mach-shmobile specific callback for SoC-specific code
to hook into. By having the late_initcall() in a common place
we can have multi-SoC/board support in the same kernel binary.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Add support for the sh7372 D4 power domain. This power domain
contains the Coresight-ETM hardware block.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Add support for the sh7372 A4MP power domain
and hook up the FSI/SPU2 device.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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FSI act as peripheral circuits of the SPU2.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Add support for the sh7372 A3SG power domain. This domain contains
the SGX hardware block, but there is no open source driver available.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Add support for the sh7372 A3RI power domain. This domain contains
the ISP hardware block, but there is no driver available.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Add support for the sh7372 A3RV power domain and hook
up the VPU device.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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The AP4EVB board is also using a sh7372 SoC, so tie in
A4LC support on that board as well.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Use the generic power domains support introduced by the previous
patch to implement support for power domains on SH7372.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Paul Mundt <lethal@linux-sh.org>
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The common PM clock management functions may be used for system
suspend/resume as well as for runtime PM, so rename them
accordingly. Modify kerneldoc comments describing these functions
and kernel messages printed by them, so that they refer to power
management in general rather that to runtime PM.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Reviewed-by: Kevin Hilman <khilman@ti.com>
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The naming convention used by commit 7538e3db6e015e890825fbd9f86599b
(PM: Add support for device power domains), which introduced the
struct dev_power_domain type for representing device power domains,
evidently confuses some developers who tend to think that objects
of this type must correspond to "power domains" as defined by
hardware, which is not the case. Namely, at the kernel level, a
struct dev_power_domain object can represent arbitrary set of devices
that are mutually dependent power management-wise and need not belong
to one hardware power domain. To avoid that confusion, rename struct
dev_power_domain to struct dev_pm_domain and rename the related
pointers in struct device and struct pm_clk_notifier_block from
pwr_domain to pm_domain.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Kevin Hilman <khilman@ti.com>
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struct soc_camera_link imx074_link in board-ap4evb.c doesn't have
to be global.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Name the SDHI1 instance sh_sdhi1_info to be consistent with sh_sdhi0_info.
Signed-off-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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USB1 can use IRQ interrupt and notify function for usbhs driver,
but USB0 is using polling for it.
The priority of usbhs devices order USB1 > USB0 is good idea
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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- usb0 pipe is same as default. own pipe config is not needed
- usb1 lost get_id function
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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While SH7377 and others were updated to properly use SCIFA/B port types,
SH7367 was left behind. Fix it up accordingly.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Initialize ->irq_set_wake() in gic_arch_extn to unbreak wake
up from the KEYSC device on AG5EVM in case of Suspend-to-RAM.
Without this patch "echo mem > /sys/power/state" and a key
press results in the following message on resume:
WARNING: at kernel/irq/manage.c:507 irq_set_irq_wake+0x7c/0xd8()
Unbalanced IRQ 103 wake disable
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch updates the board specific USB support
code for the sh7372 Mackerel board.
With this patch applied port CN22 is driven by the
recently added renesas_usbhs driver using the first
USB controller included in sh7372 aka USBHS0.
Hotplugging of USBHS0 unfortunately has to be
handled by software polling. The sh7372 SoC itself
obviously supports hotplug notification by IRQ but
on the Mackerel board this IRQ happens to be used
for the touch screen.
Also fix the pinmux configuration to avoid setting
up unused pins and fix minor spelling errors.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Add a flag for SDHI1 to enable SDIO IRQ, and remove DMA Engine
slave id:s to disable DMA as a workaround.
Tested on sh73a0/AG5EVM with a BCM4318-based SDIO card.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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These definitions are needed to let the runtime PM subsystem turn off
DMAC clocks, when it is suspended by the driver.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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On sh7372 the card-detection pin of SDHI0 can also produce interrupts,
when configured as GPIO. Use this feature to power down SDHI0, when no
card is plugged in.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Based on the patch by Takanari Hayama <taki@igel.co.jp>
Add the necessary platform data to add MERAM functionality to LCDC
Includes platform data for both the AP4EVB and mackerel
Signed-off-by: Damian Hobson-Garcia <dhobsong@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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renesas_usbhs driver can use external interrupt mode
(which come from USB-PHY) or autonomy mode (it use own interrupt)
for detecting connection/disconnection when Function.
And it will be power OFF while it has been disconnecting
if external interrupt mode is selected.
mackerel board has 2 USB ports.
But we can not use external interrupt mode
on CN22 USB0 port which is only for USB Function.
IRQ7-PORT40 is already used by Touchscreen,
and USB-PHY needs IRQ7-PORT167.
It is impossible to use IRQ7 demux on mackerel.
We can use external interrupt mode USB-Function on "USB1".
USB1 can become Host by r8a66597, and become Function by renesas_usbhs.
But don't select both drivers in same time.
These 2 drivers are not supporting IRQ SHARD.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This obviously should have been 0xe6d500ff, fix it up accordingly.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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renesas_usbhs is remake version of r8a66597
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This makes it possible to leave DMA slave IDs in the platform data
at default 0 value without hitting DMA channel allocation error paths.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This makes it possible to leave DMA slave IDs in the platform data
at default 0 value without hitting DMA channel allocation error paths.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Add SDHI0 and SDHI1 slave ids for RX and TX to enable
DMA Engine support for SDHI on the AG5EVM board.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Simply add MMCIF slave ids for RX and TX to enable
DMA Engine support for the AG5EVM board.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Add SY-DMAC support via shdma.c to the sh73a0 SoC
including slave ids, platform data and clock bindings.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch ties in the previously added sh7372 sleep
mode known as Core Standby together with the shared
SH-Mobile ARM CPUIdle implementation.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch adds a shared SH-Mobile ARM specific CPUIdle
implementation supporting WFI only at this point. It
serves as a common point for late registration of the
arch-specific CPUIdle code, and supports adding extra
sleep modes using the callback shmobile_cpuidle_setup()
together with shmobile_cpuidle_modes[].
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Add sh7372 Core Standby sleep mode support and tie it
in with the shared SH-Mobile ARM suspend code.
The Core Standby mode is the lightest sh7372-specific
sleep mode, cutting power to the ARM core excluding the
L2 cache. Any interrupt source can be used for wakeups.
The low level portion of this code is based on the
TI OMAP sleep code in sleep34xx.S, thanks to them.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch adds a simple Suspend-to-RAM implementation
for SH-Mobile ARM. The struct shmobile_suspend_ops are
kept global to allow cpu-specific code to override
the callbacks if needed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Use soc_camera_platform helper functions to dynamically manage the
camera device.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Add SDHI0 and SDHI1 support to the AG5EVM board
including platform data, pinmux configuration
and clock bindings.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch reverts "ARM: mach-shmobile: sh7372 SDHI vector merge" and
supplies 3 IRQ resources for each SDHI block.
Some blocks have a 4th IRQ, but this is used for DRM feathres
that I do not have access tot he documentation for and are almost
certainly tainted by licensing issues. So the 4th IRQ is not
hooked-up even if it exists.
Cc: Chris Ball <cjb@laptop.org>
Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Update the struct resources for DSI0 to include the
hardware block name. Purely cosmetic, makes /proc/iomem
look slightly better.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Fix the case of too late twd_base initialization for SMP
on sh73a0 which bas been broken because sh73a0 specific
smp_prepare_cpu() and percpu_timer_setup() changed order
in the commits:
05c74a6cbcfb416286a947668ba32f63d99fe74a
c413521eb4e2d7ffd5ce432a144708d479054bd3
Without this fix the sh73a0 SMP kernel panics on boot.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Git commit f4117ac9e237b74afdf5e001d5ea26a4d15e9847
introduced PLAT_PHYS_OFFSET, but headsmp.S was left
unchanged which results in a compile error:
AS arch/arm/mach-shmobile/headsmp.o
arch/arm/mach-shmobile/headsmp.S: Assembler messages:
arch/arm/mach-shmobile/headsmp.S:27: Error: undefined symbol `secondary_startup' in operation
arch/arm/mach-shmobile/headsmp.S:27: Error: undefined symbol `PHYS_OFFSET' in operation
make[1]: *** [arch/arm/mach-shmobile/headsmp.o] Error 1
make[1]: *** Waiting for unfinished jobs....
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Update the sh7372 clock code to set the RT side
set of MSTP bits to a fixed disabled state.
The sh7372 SoC contains two sets of MSTP bits,
one for the ARM (SYS) side, and one for the
SH4AL-DSP (RT) side. The actual clock associated
with the MSTP bit will only be stopped when both
sides have set the MSTP bit to disabled mode.
Some MSTP bits are enabled by default after
hardware reset, so this patch adjusts the code
to disable all MSTP bits associated with the RT
side to allow the SYS side to have full control.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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The PLLC2 clock on AP4 systems does not need to run constantly to be
able to use HDMI. The HDMI hotplug interrupt works without the PLL
too, after which all the necessary clocks will be turned on by the
runtime PM.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Add DMA mode support for the MMCIF controller on mackerel.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Reviewed-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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