| Commit message (Collapse) | Author | Age | Files | Lines |
|---|
| |
|
|
|
|
| |
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
|
| |
|
|
|
|
|
|
| |
Now that we have software runtime power management support this code is
redundant.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
|
| |\
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Board-level changes
This adds and extends support for specific boards on a number of
ARM platforms: omap, imx, samsung, tegra, ...
* tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (49 commits)
Enable 32 bit flash support for iMX21ADS board
ARM: mx31pdk: Add MC13783 RTC support
iomux-mx25: configuration to support CSPI3 on CSI pins
MX1:apf9328: Add i2c support
mioa701: add newly available DoC G3 chip
arm/tegra: remove __initdata annotation from pinmux tables
arm/tegra: Use bus notifiers to trigger pinmux setup
arm/tegra: Refactor board-*-pinmux.c to share code
arm/tegra: Fix mistake in Trimslice's pinmux
arm/tegra: Rework Seaboard-vs-Ventana pinmux table
arm/tegra: Remove useless entries from ventana_pinmux[]
arm/tegra: PCIe: Remove include of mach/pinmux.h
arm/tegra: Harmony PCIe: Don't touch pinmux
arm/tegra: Add AUXDATA for tegra-pinmux and tegra-gpio
arm/tegra: Split Seaboard GPIO table to allow for Ventana
ARM: imx6q: generate imx6q dtb files
arm/imx6q: Rename Sabreauto to Armadillo2
arm/imx6q-sabrelite: add enet phy ksz9021rn fixup
arm/imx6: add imx6q sabrelite board support
dts/imx: rename uart labels to consistent with hw spec
...
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
The S3C64xx CPUs have power gating support with a series of software
controllable power domains in the SoC. To take full advantage of these
we should implement runtime PM support but since several of the IP blocks
have no in tree drivers (and at this point aren't likely to acquire such
drivers) we can get some benefit from the hardware much more easily if
we just turn those blocks off unconditionally. This will cut down on the
leakage these domains generate without interfering with active usage.
Do this for:
- Domain G: 3D acceleration
- Domain V: MFC
- Domain I: JPEG and camera interface
- Domain P: 2D acceleration, TV encoder and scaler
This is easy to reverse if any of these devices do acquire drivers in the
future or as part of out of tree patches for them.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
|
| |/
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The S3C64xx SoCs contain a set of gateable power domains which can be
enabled and disabled at runtime in order to save power. Use the generic
power domain code to implement support for these in software, enabling
runtime control of most domains:
- ETM (not supported in mainline).
- Domain G: 3D acceleration (no mainline support).
- Domain V: MFC (no mainline support).
- Domain I: JPEG and camera interface (no mainline support).
- Domain P: 2D acceleration, TV encoder and scaler (no mainline support)
- Domain S: Security (no mainline support).
- Domain F: LCD (driver already uses runtime PM), post processing and
rotation (no mainline support).
The IROM domain is marked as always enabled as we should arrange for it
to be enabled when we suspend which will need a bit more work.
Due to all the conditional device registration that the platform does
wrap s3c_pm_init() with s3c64xx_pm_init() which actually puts the device
into the power domain after the machines have registered, looking for
platform data to tell if the device was registered. Since currently only
Cragganmore actually sets up PM that is the only machine updated.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
|
| |
|
|
|
|
|
|
|
| |
This patch makes sure that the LCD bypass state is preserved during sleep mode.
It achieves this by saving the S3C64XX_MODEM_MIFPCON register, which is not
handled by any other code currently.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
|
| |
|
|
|
|
|
|
|
| |
This patch makes sure that S3C64XX_SDMA_SEL register is preserved during
sleep mode, as it is critical for DMA operation and the DMA driver alone
does not provide any power management facilities.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
When S3C_PM_DEBUG_LED_SMDK is enabled for suspend/resume debugging, the following
compilation error occurs:
arch/arm/mach-s3c64xx/pm.c: In function 's3c_pm_debug_smdkled':
arch/arm/mach-s3c64xx/pm.c:41: error: implicit declaration of function 'gpio_set_value'
arch/arm/mach-s3c64xx/pm.c:41: error: implicit declaration of function 'S3C64XX_GPN'
arch/arm/mach-s3c64xx/pm.c: In function 's3c64xx_pm_init':
arch/arm/mach-s3c64xx/pm.c:184: error: implicit declaration of function 'gpio_request'
arch/arm/mach-s3c64xx/pm.c:188: error: implicit declaration of function 'gpio_direction_output'
Fix the error by including linux/gpio.h
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
| |
There are SoCs where attempting to enter a low power state is ignored,
and the CPU continues executing instructions with all state preserved.
It is over-complex at that point to disable the MMU just to call the
resume path.
Instead, allow the suspend finisher to return error codes to abort
suspend in this circumstance, where the cpu_suspend internals will then
unwind the saved state on the stack. Also omit the tlb flush as no
changes to the page tables will have happened.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
| |
|
|
|
|
|
|
| |
Move the call to cpu_suspend into C code, and noticing that all the
s3c_cpu_save implementations are now identical, we can move this
into the common samsung code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
| |
|
|
|
|
|
|
|
| |
The gpio-bank-X header files of S3C64XX have definitions
which can be substituted by other common GPIO API.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
|
| |
|
|
|
|
|
| |
Use the new wakeup mask synchronisation code to set the
relevant wakeup mask bits.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
|
|
|
Move the core S3C64XX support to mach-s3c64xx as it is unlikely to be used
outside of this directory. Also move the SoC header files in with it.
This includes the clock, cpu, cpufreq, dma, gpiolib and pll support.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
|
