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* ARM: pxa: fix broken isa interrupts for zeus and viperRobert Jarzmik2015-01-271-0/+1
| | | | | | | | | Commit "ARM: pxa: arbitrarily set first interrupt number" broke viper and zeus boards which still refer to PXA_ISA_IRQ() macro. Redefine the macro, which declares the legacy interrupts from 0 to 15. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: pxa: arbitrarily set first interrupt numberRobert Jarzmik2014-12-261-7/+2
| | | | | | | | | | | As IRQ0, the legacy timer interrupt should not be used as an interrupt number, shift the interrupts by a fixed number. As we had in a special case a shift of 16 when ISA bus was used on a PXA, use that value as the first interrupt number, regardless of ISA or not. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
* ARM: pxa: remove pxa95x supportHaojian Zhuang2012-11-151-1/+0
| | | | | | | | | | | | | PXA95x isn't widely used. And it adds the effort on supporting multiple platform. So remove it. The assumption is that nobody will miss this support. If you are reading this text because you actually require pxa95x support on a new kernel, we can work out a way to revert this patch or add support to the mmp platform. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: pxa: remove NR_IRQSRob Herring2012-01-251-1/+1
| | | | | | Remove NR_IRQS and add a per machine .nr_irqs setting. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* ARM: pxa: rename NR_BUILTIN_GPIOHaojian Zhuang2011-11-141-2/+2
| | | | | | | NR_BUILTIN_GPIO is both defined in arch-pxa and arch-mmp. Now replace it with PXA_NR_BUILTIN_GPIO and MMP_NR_BUILTIN_GPIO. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
* ARM: pxa: use chained interrupt for GPIO0 and GPIO1Haojian Zhuang2011-11-141-3/+1
| | | | | | | | | | | | | GPIO0 and GPIO1 are linked to unique interrupt line in PXA series, others are linked to another interrupt line. All GPIO are linked to one interrupt line in MMP series. Since gpio driver is shared between PXA series and MMP series, define GPIO0 and GPIO1 as chained interrupt chip. So we can move out gpio code from irq.c to gpio-pxa.c. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
* ARM: pxa: rename IRQ_GPIO to PXA_GPIO_TO_IRQHaojian Zhuang2011-11-141-1/+1
| | | | | | | | Avoid potential naming confliction since multiple architecture will be built in a single kernel. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
* ARM: pxa: move declarations from generic.h to <soc>.hEric Miao2011-07-121-0/+2
| | | | Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: pxa: introduce {icip,ichp}_handle_irq() to prepare MULTI_IRQ_HANDLEREric Miao2011-07-121-0/+3
| | | | | | | Thanks Dmitry for providing a fix to the original code. Signed-off-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
* ARM: pxa: avoid accessing interrupt registers directlyEric Miao2011-07-121-0/+7
| | | | Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: pxa: convert incorrect IRQ_TO_IRQ() to irq_to_gpio()Eric Miao2011-04-131-3/+0
| | | | | | | | | | This fixes the failure to register the IRQ_RTCAlrm alarm as a wakeup event. It is misinterpreted as a gpio irq not a PWER bitmask. Fixed this by converting the incorrect IRQ_TO_IRQ() to a correct version of irq_to_gpio(). Reported-by: Nick Bane <nickbane1@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: pxa: support pxa95xHaojian Zhuang2010-12-181-0/+1
| | | | | | | | The core of PXA955 is PJ4. Add new PJ4 support. And add new macro CONFIG_PXA95x. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: pxa: redefine irqs.hHaojian Zhuang2010-12-161-33/+14
| | | | | | | | | | Define all IRQs in irqs.h. If some IRQs are sharing one IRQ number, define them together. If some IRQs are sharing same name with different IRQ number, define different IRQ. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Cc: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: pxa: encode IRQ number into .nr_irqsHaojian Zhuang2010-10-081-39/+3
| | | | | | Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Acked-by: Antonio Ospite <ospite@studenti.unina.it> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa: move board board IRQ definitions out of irqs.hEric Miao2010-03-021-66/+1
| | | | Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] sa1111: allow cascaded IRQs to be used by platformsEric Miao2010-03-021-53/+1
| | | | Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] locomo: allow cascaded IRQ base to be specified by platformsEric Miao2010-03-021-6/+0
| | | | Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] locomo: remove unused IRQs and avoid unnecessary cascadeEric Miao2010-03-021-28/+3
| | | | | | | | | | | | | IRQ_LOCOMO_* are never used elsewhere, remove these definitions. As well as the cascade of these IRQs. IRQ_LOCOMO_*_BASE changed to IRQ_LOCOMO_*. IRQ_LOCOMO_LT and IRQ_LOCOMO_SPI are likely to be used in a same way as IRQ_LOCOMO_KEY. IRQ_LOCOMO_GPIO and the demultiplex handler should really be living somewhere else. Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] locomo: avoid unnecessary cascaded keyboard IRQEric Miao2010-03-021-2/+1
| | | | | | | | It is not necessary and is over-complicated for IRQ_LOCOMO_KEY to be a cascaded IRQ of IRQ_LOCOMO_KEY_BASE. Removed and introduced locomokbd_{open,close} for masking/unmasking of the keyboard IRQ. Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa: balloon3 (http://balloonboard.org/) base machine supportJonathan McDowell2009-09-101-0/+10
| | | | | | | | | | | | | | | | | So, again against latest pxa-linux-2.6/devel, with the following changes: * Move to __raw_readl/__raw_writel for FPGA/CPLD register access * Change Toppoly LCD config to be selectable at run time rather than compile time. * Remove currently unused irq device suspend/resume functions. * Strip out unnecessary/duplicated #includes. * Some code style cleanups. Balloon3 (http://balloonboard.org/) base machine support Signed-off-by: Jonathan McDowell <noodles@earth.li> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa/ezx: set IRQ_BOARD_END for EZXDaniel Ribeiro2009-09-101-0/+2
| | | | | Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa: rename GCU IRQ for consistencyDaniel Mack2009-09-101-1/+1
| | | | | | | For consistency reasons, rename IRQ_GRPHICS to IRQ_GCU. Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa: expand irq support for PXA93x and PXA950Haojian Zhuang2009-09-101-2/+26
| | | | | | | | | | PXA93x/950 has additional 64 GPIOs, each is a secondary interrupt source for IRQ_GPIO_2_x, extend PXA_GPIO_IRQ_{BASE,NUM}. PXA93x/950 specific IRQ definitions are added as well. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa: add basic support for HP iPAQ hx4700 PDAsPhilipp Zabel2009-06-051-1/+3
| | | | | | | | | | | | | | | | | | This includes - IrDA (pxafixp_ir), - Buttons (gpio-keys), - ASIC3 IRQ/GPIOs (asic3), - EGPIOs (htc-egpio), - ATI Imageon w3220 framebuffer (w100fb), - Backlight (pwm-backlight), - StrataFlash (physmap), - Battery monitor (ds1wm,w1_ds2760,ds2760_battery) - USB gadget support (pxa27x_udc,gpio_vbus). - bq24022 battery charger (pda_power,bq24022) - TSC2046 touchscreen (ads7846) Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
* [ARM] pxa: allow IRQ_BOARD_END to be customized and make zylonite to use itPhilipp Zabel2009-06-051-5/+11
| | | | | | | | | | | | The default value is 16 IRQs. Zylonite needs 32, ASIC3 based boards need 70. My problem is still that due to the way IRQ_GPIO is hardcoded, ASIC3 based boards need 70 IRQs starting at IRQ_BOARD_START. If I define ASIC3 IRQs similar to LoCoMo or SA1111, things break as soon as something selects PXA_HAVE_BOARD_IRQS. Increasing the default number of board IRQs to 70 instead doesn't seem very nice. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
* [ARM] pxa: fix redefinition of NR_IRQSRussell King2008-10-171-1/+4
| | | | | | | arch/arm/mach-pxa/include/mach/irqs.h:193:1: warning: "NR_IRQS" redefined arch/arm/mach-pxa/include/mach/irqs.h:263:1: warning: this is the location of the previous definition Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5233/1: Allow PXA to have ISA IRQs numbered 0-15Marc Zyngier2008-09-011-2/+9
| | | | | | | | | | | | Allow PXA IRQs to be numbered starting at 16, leaving 0 to 15 for the ISA IRQs, if needed. This patch depends on RMK's PXA_HAVE_BOARD_IRQS patch. Signed-off-by: Marc Zyngier <marc.zyngier@altran.com> Acked-by: Russel King <linux@arm.linux.org.uk> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: introduce PXA_HAVE_BOARD_IRQSRussell King2008-09-011-7/+1
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Fix eseries IRQ limitIan Molton2008-08-121-0/+1
| | | | | | | The max IRQ is too small for all e-series machines which have at least one GPIO expander chip in them. Signed-off-by: Ian Molton <spyro@f2s.com>
* [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/machRussell King2008-08-071-0/+264
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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