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* ARM: OMAP: AM33xx hwmod: fixup SPI after platform_data moveKevin Hilman2012-09-201-1/+1
| | | | | | | | | AM33xx hwmod data includes "mcspi.h" which has now been moved after the platform_data move. Fix it. Signed-off-by: Kevin Hilman <khilman@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* Merge tag 'omap-devel-am33xx-for-v3.7' of ↵Olof Johansson2012-09-16123-538/+4458
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc From Tony Lindgren: From Paul Walmsley <paul@pwsan.com>: AM33xx hwmod data and miscellaneous clock and hwmod fixes. AM33xx should now boot on mainline after this is applied, according to Vaibhav. (The shortlog makes no sense here since it contains mostly the dependent cleanups that are part of the preceding branches). Signed-off-by: Olof Johansson <olof@lixom.net>
| * Merge tag 'omap-devel-a2-for-3.7' of ↵Tony Lindgren2012-09-127-4/+3568
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into devel-am33xx AM33xx hwmod data and miscellaneous clock and hwmod fixes. AM33xx should now boot on mainline after this is applied, according to Vaibhav. This second version includes trailing commas at the end of structure records at Tony's request. It also adds a OMAP_INTC_START macro expansion to each IRQ number to make the sparseirq conversion easier. Basic build, boot, and PM test transcripts are here: http://www.pwsan.com/omap/testlogs/am33xx_hwmod_clock_devel_3.7/20120912165952/
| | * ARM: AM33XX: clock: Add dcan clock aliases for device-treeVaibhav Hiremath2012-09-121-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the device names for the dcan module follows the format "dcan.X", where 'X' is the dcan instance number. On other side, driver may request for clock with/without con_id and dev_id, and it is expected that platform should respect this request and return the requested clock handle. Now, when using device tree, the format of the device name created by OF layer is different, "<reg-address>.<device-name>", assuming that the device-tree "reg" property is specified. This causes the look-up failure for clock node in dcan driver To fix this add new dcan clock alias for using device-tree. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <robherring2@gmail.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * ARM: OMAP2+: dpll: Add missing soc_is_am33xx() check for common functionsVaibhav Hiremath2012-09-122-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing soc_is_am33xx() check for DPLL common control & clock related functions, without this dpll programmability would be broken for am33xx family of devices. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * ARM: OMAP3+: hwmod: Add AM33XX HWMOD dataVaibhav Hiremath2012-09-113-0/+3387
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds HWMOD data for all the peripherals of AM335X device and also hooks up to the existing OMAP framework. hwmod data has been already been cleaned up for the recent changes in clocktree, where all leaf nodes have been removed, since with modulemode based control, both clock and hwmod interface does same thing. This reduces the code size to large extent and also avoids duplication of same control. So instead of specifying module's leaf node as a main_clk, now we are relying on parent clock of module's functional clock. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: removed period in hwmod device names; changed mmc2 main_clk to mmc_clk at Vaibhav's request; added trailing commas to structure records at Tony's request to deal with some rmk parsing issues; added OMAP_INTC_START to facilitate sparse-IRQ conversion] Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * ARM: OMAP2+: hwmod: Hook-up am33xx support in omap_hwmod frameworkVaibhav Hiremath2012-09-111-0/+178
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AM33XX PRCM architecture is different that any OMAP family of devices, so it is required to have separate implementation to handle AM33XX module enable/disable, reset assert/deassert functionality. This patch adds wrapper api's in omap_hwmod framework to access prm/cm for AM33XX family of devices. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Tony Lindgren <tony@atomide.com> [paul@pwsan.com: fixed checkpatch messages] Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * | ARM: OMAP2+ Move SoC specific headers to be local to mach-omap2Tony Lindgren2012-09-1213-14/+344
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These can now be moved to be local headers in mach-omap2. Note that this patch removes arch/arm/plat-omap/devices.c as it will get removed anyways with Paul Walmsley's patch "ARM: OMAP: split OMAP1, OMAP2+ RNG device registration". Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP: Split plat/hardware.h, use local soc.h for omap2+Tony Lindgren2012-09-1285-127/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As the plat and mach includes need to disappear for single zImage work, we need to remove plat/hardware.h. Do this by splitting plat/hardware.h into omap1 and omap2+ specific files. The old plat/hardware.h already has omap1 only defines, so it gets moved to mach/hardware.h for omap1. For omap2+, we use the local soc.h that for now just includes the related SoC headers to keep this patch more readable. Note that the local soc.h still includes plat/cpu.h that can be dealt with in later patches. Let's also include plat/serial.h from common.h for all the board-*.c files. This allows making the include files local later on without patching these files again. Note that only minimal changes are done in this patch for the drivers/watchdog/omap_wdt.c driver to keep things compiling. Further patches are needed to eventually remove cpu_is_omap usage in the drivers. Also only minimal changes are done to sound/soc/omap/* to remove the unneeded includes and to define OMAP44XX_MCPDM_L3_BASE locally so there's no need to include omap44xx.h. While at it, also sort some of the includes in the standard way. Cc: linux-watchdog@vger.kernel.org Cc: alsa-devel@alsa-project.org Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Jarkko Nikula <jarkko.nikula@bitmer.com> Cc: Liam Girdwood <lrg@ti.com> Acked-by: Wim Van Sebroeck <wim@iguana.be> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP2+: Remove hardcoded IRQs and enable SPARSE_IRQTony Lindgren2012-09-122-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | Remove hardcoded IRQs in irqs.h and related files as these are no longer needed. Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP2+: Prepare for irqs.h removalTony Lindgren2012-09-1245-238/+251
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As the interrupts should only be defined in the platform_data, and eventually coming from device tree, there's no need to define them in header files. Let's remove the hardcoded references to irqs.h and fix up the includes so we don't rely on headers included in irqs.h. Note that we're defining OMAP_INTC_START as 0 to the interrupts. This will be needed when we enable SPARSE_IRQ. For some drivers we need to add #include <plat/cpu.h> for now until these drivers are fixed to remove cpu_is_omapxxxx() usage. While at it, sort som of the includes the standard way, and add the trailing commas where they are missing in the related data structures. Note that for drivers/staging/tidspbridge we just define things locally. Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP: Move gpio.h to include/linux/platform_dataTony Lindgren2012-09-1215-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This way we can remove includes of plat/gpio.h which won't work with the single zImage support. Note that we also remove the cpu_class_is_omap2() check in gpio-omap.c as the drivers should not call it as we need to make it local to arch/arm/mach-omap2 for single zImage support. While at it, arrange the related includes in the standard way. Cc: Grant Likely <grant.likely@secretlab.ca> Cc: linux-mtd@lists.infradead.org Cc: alsa-devel@alsa-project.org Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP2+: Remove hardcoded twl4030 gpio_base, irq_base and irq_endTony Lindgren2012-09-1218-50/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can't use hardcoded interrupts for SPARSE_IRQ, and can replace the hardcoded gpio_base with twl_gpiochip.base after it's been allocated. Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Samuel Ortiz <sameo@linux.intel.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP2+: Remove unused nand_irq for GPMCTony Lindgren2012-09-121-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | This is no longer needed and assumes a fixed IRQ number that won't work with SPARSE_IRQ. Acked-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP2+: Make INTCPS_NR_IRQS local for mach-omap2/irq.cTony Lindgren2012-09-121-0/+2
| | | | | | | | | | | | | | | | | | Make INTCPS_NR_IRQS local for mach-omap2/irq.c Signed-off-by: Tony Lindgren <tony@atomide.com>
| | |
| | \
| *-. \ Merge tags 'omap-devel-gpmc-fixed-for-v3.7' and 'cleanup-omap-tags-for-v3.7' ↵Tony Lindgren2012-09-1246-151/+216
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into cleanup-sparseirq Changes for GPMC (General Purpose Memory Controller) that take it closer for being just a regular device driver. Remove the ancient omap specific atags that are no longer needed. At some point we were planning to pass the bootloader information with custom atags that did not work out too well. There's no need for these any longer as the kernel has been booting fine without them for quite some time. And Now we have device tree support that can be used instead.
| | | * | ARM: OMAP: remove plat/board.h fileIgor Grinberg2012-09-1026-26/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | plat/board.h file is now empty - remove it. Cc: Jarkko Lavinen <jarkko.lavinen@nokia.com> Cc: Chris Ball <cjb@laptop.org> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: linux-mmc@vger.kernel.org Cc: linux-mtd@lists.infradead.org Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Chris Ball <cjb@laptop.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | ARM: OMAP: move debug_card_init() functionIgor Grinberg2012-09-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | debug_card_init() function resides in the plat/board.h file. Move it to a separate header file under plat/ so the board.h file can be removed. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | ARM: OMAP: remove the sti console workaroundIgor Grinberg2012-09-101-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sti console workaround uses the OMAP custom tags. Those tags are not used in upstream kernel and therefore the workaround never fires on upstream kernels. Remove the sti console workaround tags part. This leaves the workaround functional part intact so can be reused if needed. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | ARM: OMAP: omap3evm: cleanup revision bitsIgor Grinberg2012-09-101-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The omap3evm has its revision information bits inside the plat/board.h file. Those bits are not used anywhere in the upstream tree besides the board-omap3evm.c file. Move the OMAP3EVM_BOARD_GEN_* bits to the board file and remove the get_omap3_evm_rev() function declaration. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | ARM: OMAP: cleanup struct omap_board_config_kernelIgor Grinberg2012-09-109-58/+0
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | struct omap_board_config_kernel defined in the board files is always empty and does not bring any added value. Remove the struct omap_board_config_kernel instances from the board files. Also remove the omap_get_nr_config() macro and the omap_get_var_config() function as both are not used for quite a long time (if ever). Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | ARM: OMAP2+: gpmc-nand: Modify Interrupt handlingAfzal Mohammed2012-08-301-6/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now GPMC provides its client with interrupts that can be handled using the standard interrupt API. Modify GPMC NAND setup to work with it. Also disable write protect in GPMC code, so that NAND driver can be ignorant of GPMC configuration. Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | ARM: OMAP2+: gpmc: Modify interrupt handlingAfzal Mohammed2012-08-301-17/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify interrupt handling such that interrupts can be handled by GPMC client drivers using standard interrupt APIs rather than requiring the drivers to have knowledge about GPMC interrupt handling. Currently only NAND related interrupts has been considered (which is the case even without this change) as the only user of GPMC interrupt is NAND. Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | ARM: OMAP2+: gpmc-onenand: provide memory as resourceAfzal Mohammed2012-08-301-1/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently omap onenand driver invokes gpmc_cs_request, obtains address space allocated by gpmc to onenand. Remove this, instead use resource structure; this is now updated with address space for onenand by gpmc initialization with the help of gpmc_cs_request. And remove usage of gpmc_cs_request in onenand driver. This helps in smooth migration of gpmc to driver. Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | ARM: OMAP2+: gpmc-nand: update resource with memoryAfzal Mohammed2012-08-301-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently omap nand driver uses a field in platform data - phys_base for passing the address space allocated by gpmc for nand. Use struct resource instead. With this change omap nand driver has to get address space from memory resource. This helps in smooth migration of gpmc to driver. Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | ARM: OMAP2+: gpmc-nand: update gpmc-nand regsAfzal Mohammed2012-08-301-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPMC has NAND registers, update nand platform data with those details so that NAND driver can configure those by itself instead of using exported symbols. Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | ARM: OMAP2+: gpmc: update nand register helperAfzal Mohammed2012-08-301-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide helper function for updating NAND register details for the necessary chip select. NAND drivers platform data can be updated with this information so that NAND driver can handle GPMC NAND operations by itself. Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | serial: omap: don't access the platform_deviceFelipe Balbi2012-09-061-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver doesn't need to know about its platform_device. Everything the driver needs can be done through the struct device pointer. In case we need to use the OMAP-specific PM function pointers, those can make sure to find the device's platform_device pointer so they can find the struct omap_device through pdev->archdata field. Tested-by: Shubhrajyoti D <shubhrajyoti@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * | | OMAP/serial: Add support for driving a GPIO as DTR.NeilBrown2012-08-161-0/+3
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP hardware doesn't provide a phyisical DTR line, but some configurations may need a DTR line which tracks whether the device is open or not. So allow a gpio to be configured as the DTR line. Signed-off-by: NeilBrown <neilb@suse.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | | Merge branch 'renesas/pmu' into next/socOlof Johansson2012-09-111-2/+1
|\ \ \ | |_|/ |/| | | | | | | | | | | * renesas/pmu: ARM: shmobile: emev2: enable PMU(Performance Monitoring Unit) ARM: shmobile: sh73a0: enable PMU(Performance Monitoring Unit)
| * | ARM: pmu: remove arm_pmu_type enumerationSudeep KarkadaNagesha2012-08-231-2/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The arm_pmu_type enumeration was initially introduced to identify different PMU types in the system, the usual one being that on the CPU (ARM_PMU_DEVICE_CPU). With the removal of the PMU reservation code and the introduction of devicetree bindings for the CPU PMU, the enumeration is no longer required. This patch removes the enumeration and updates the various CPU PMU platform devices so that they no longer pass an .id field referring to identify the PMU type. Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: Olof Johansson <olof@lixom.net> Cc: Pawel Moll <pawel.moll@arm.com> Acked-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Sudeep KarkadaNagesha <Sudeep.KarkadaNagesha@arm.com> [will: cosmetic edits and actual removal of the enum type] Signed-off-by: Will Deacon <will.deacon@arm.com>
* | Merge branch 'randconfig/mach' into fixesArnd Bergmann2012-08-232-2/+3
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Small platform specific bug fixes for problems found in randconfig builds. * randconfig/mach: ARM: ux500: don't select LEDS_GPIO for snowball ARM: imx: build i.MX6 functions only when needed ARM: imx: select CPU_FREQ_TABLE when needed ARM: imx: fix ksz9021rn_phy_fixup ARM: imx: build pm-imx5 code only when PM is enabled ARM: omap: allow building omap44xx without SMP Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | ARM: omap: allow building omap44xx without SMPArnd Bergmann2012-08-232-2/+3
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new omap4 cpuidle implementation currently requires ARCH_NEEDS_CPU_IDLE_COUPLED, which only works on SMP. This patch makes it possible to build a non-SMP kernel for that platform. This is not normally desired for end-users but can be useful for testing. Without this patch, building rand-0y2jSKT results in: drivers/cpuidle/coupled.c: In function 'cpuidle_coupled_poke': drivers/cpuidle/coupled.c:317:3: error: implicit declaration of function '__smp_call_function_single' [-Werror=implicit-function-declaration] It's not clear if this patch is the best solution for the problem at hand. I have made sure that we can now build the kernel in all configurations, but that does not mean it will actually work on an OMAP44xx. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Tony Lindgren <tony@atomide.com>
* | Merge branch 'for_3.6/fixes/pm' of ↵Tony Lindgren2012-08-104-18/+12
|\ \ | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into fixes
| * | ARM: OMAP4: Register the OPP table only for 4430 deviceRajendra Nayak2012-08-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 4430 OPP table was being registered for all other OMAP4 variants too, like 4460 and 4470 causing issues with cpufreq driver enabled. 4460 and 4470 devices have different OPPs as compared to 4430, and they should be populated seperately. As long as that happens, let the OPP table registeration happen only on 4430 device. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | ARM: OMAP4: sleep: Save the complete used register stack frameSantosh Shilimkar2012-08-091-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP4 sleep entry code even though itself don't use many CPU registers makes call to the v7_flush_dcache_all() which uses them. Since v7_flush_dcache_all() doesn't make use of stack, the caller must take care of the stack frame. Otherwise it will lead to corrupted stack frame. Fix it by saving used registers. Reported-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | Revert "ARM: OMAP3: PM: call pre/post transition per powerdomain"Kevin Hilman2012-08-071-15/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 58f0829b7186150318c79515f0e0850c5e7a9c89. Converstion to per-pwrdm per/post transition calls was a bit premature. Only tracking MPU, PER & CORE in the idle path means we lose the accounting for all the other powerdomains which may also transition in idle. On OMAP3, due to autodeps, several powerdomains transition along with MPU (e.g. DSS, USBHOST), and the accounting for these was lost with this patch. Since the accounting includes the context loss counters, drivers for devices in those power domains would never notice context lost, so would likely hang after any off-mode transitions. This patch should be revisited when the upcoming clkdm/pwrmdm/voltdm use-counting seires is merged since then we can properly do accounting without relying on a call in the idle path. In addition, the original patch had another bug because the PER powerdomain accounting was not updated until after the GPIO resume hook is called. Since gpio_resume_after_idle() checks the context loss count (which is not yet updated) it would not properly restore context, leaving the GPIO banks in an undefined state. Cc: Jean Pihet <jean.pihet@newoldbits.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Reported-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | ARM: OMAP3: TWL4030: ensure sys_nirq1 is mux'd and wakeup enabledKevin Hilman2012-08-071-0/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | The SYS_NIRQ1 pin is the interupt line for the PMIC part of the TWL6030 and interrupts from the PMIC are needed as wakeup sources. Ensure this pin is mux'd as input and has wakeup enabled so PMIC interupts (e.g. RTC) can be used as wakeup sources. Tested on 3430/n900, OMAP3530/Overo Fire, 3730/Overo FireSTORM, 3730/Beagle-xM. Signed-off-by: Kevin Hilman <khilman@ti.com>
* | omap2: mux: remove comment for nonexistent memberMichael Jones2012-08-071-1/+0
| | | | | | | | | | | | | | remove comment for nonexistent member Signed-off-by: Michael Jones <michael.jones@matrix-vision.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | Merge branch 'for_3.6/fixes/ads7846-2' of ↵Tony Lindgren2012-08-073-12/+1
|\ \ | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into fixes
| * | Revert "ARM: OMAP3530evm: set pendown_state and debounce time for ads7846"Igor Grinberg2012-08-063-12/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1) The above commit introduced a common ->get_pendown_state() function into the generic code, but that function was board-specific for the OMAP3EVM and thus broke most other boards using this code. 2) The above commit was mis-merged introducing another bug which prevents the ads7846 driver probe function to succeed. The omap_ads7846_init() function frees the pendown GPIO in case there is no ->get_pendown_state() function set by the caller (board specific code), so it can be requested later by the ads7846 driver. The above commit add a common ->get_pendown_state() function without removing the gpio_free() call and thus once the ads7846 driver tries to use the pendown GPIO, it crashes as the pendown GPIO has not been requested. 3) The above commit introduces NO new functionality as get_pendown_state() function is already implemented in a suitable way by the ads7846 driver and the debounce time handling has already been fixed by commit 97ee9f01 (ARM: OMAP: fix the ads7846 init code). This reverts commit 16aced80f6739beb2a6ff7b6f96c83ba80d331e8. Conflicts: arch/arm/mach-omap2/common-board-devices.c Solved by taking the working version prior to the above commit. Cc: Zumeng Chen <zumeng.chen@windriver.com> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* | OMAP2+: Fix random config build break with !ARM_CPU_SUSPENDSantosh Shilimkar2012-08-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The random config builds with PM and !ARM_CPU_SUSPEND breaks with below error on omap2plus_defconfig. arch/arm/mach-omap2/sleep44xx.S:323: undefined reference to `cpu_resume' arch/arm/mach-omap2/omap-mpuss-lowpower.c:278: undefined reference to `cpu_suspend' This is because recently merged OMAP5 platform shares the common files with OMAP4 but doesn't select ARM_CPU_SUSPEND. Without the ARM_CPU_SUSPEND the sleep code is meaningless. Fix the same by adding ARM_CPU_SUSPEND for OMAP5. The suggestion came from Russell King in an off-list discussion. Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Kevin Hilman <khilman@ti.com> Reported-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | ARM: OMAP3: igep0020: set GPIO mode for mux mcspi1_cs2 pinJavier Martinez Canillas2012-08-071-0/+2
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the IGEPv2 Rev.C data-sheet the LAN9221i pin 14 (IRQ) is connected to the OMAP3730 mcspi1_cs2 pin. Since this omap mux pin acts as an IRQ line, it has to be configured as an input GPIO. IGEPv2 platform code sets the smsc911x_cfg->gpio_irq to GPIO 176 but since the mux pin default mode is MODE7 (safe_mode) the driver fails when trying to register the IRQ with the following error message: [ 1.994598] smsc911x: Driver version 2008-10-21 [ 3.704162] irq 272: nobody cared (try booting with the "irqpoll" option) [ 3.711364] [<c001a114>] (unwind_backtrace+0x0/0xf0) from [<c009a0d4>] (__report_bad_irq+0x20/0xbc) [ 3.720916] [<c009a0d4>] (__report_bad_irq+0x20/0xbc) from [<c009a41c>] (note_interrupt+0x1d8/0x238) [ 3.730560] [<c009a41c>] (note_interrupt+0x1d8/0x238) from [<c0098234>] (handle_irq_event_percpu+0xc0/0x260) [ 3.740936] [<c0098234>] (handle_irq_event_percpu+0xc0/0x260) from [<c0098410>] (handle_irq_event+0x3c/0x5c) [ 3.751312] [<c0098410>] (handle_irq_event+0x3c/0x5c) from [<c009abe0>] (handle_level_irq+0xac/0x10c) [ 3.761047] [<c009abe0>] (handle_level_irq+0xac/0x10c) from [<c0097a34>] (generic_handle_irq+0x30/0x48) [ 3.770935] [<c0097a34>] (generic_handle_irq+0x30/0x48) from [<c02a6b74>] (gpio_irq_handler+0x180/0x1d4) [ 3.780944] [<c02a6b74>] (gpio_irq_handler+0x180/0x1d4) from [<c0097a34>] (generic_handle_irq+0x30/0x48) [ 3.790954] [<c0097a34>] (generic_handle_irq+0x30/0x48) from [<c0013e18>] (handle_IRQ+0x4c/0xac) [ 3.800231] [<c0013e18>] (handle_IRQ+0x4c/0xac) from [<c000858c>] (omap3_intc_handle_irq+0x60/0x74) [ 3.809783] [<c000858c>] (omap3_intc_handle_irq+0x60/0x74) from [<c04979e4>] (__irq_svc+0x44/0x60) [ 3.819213] Exception stack(0xee42fde0 to 0xee42fe28) [ 3.824554] fde0: 00000001 00000001 00000000 00000000 60000013 c06cce14 c06cce14 00000110 [ 3.833190] fe00: 00000000 c06ccdf4 60000013 ee41d000 fb058064 ee42fe28 c0089e08 c04976b4 [ 3.841796] fe20: 20000013 ffffffff [ 3.845489] [<c04979e4>] (__irq_svc+0x44/0x60) from [<c04976b4>] (_raw_spin_unlock_irqrestore+0x34/0x44) [ 3.855499] [<c04976b4>] (_raw_spin_unlock_irqrestore+0x34/0x44) from [<c0099744>] (__setup_irq+0x1b8/0x3f0) [ 3.865875] [<c0099744>] (__setup_irq+0x1b8/0x3f0) from [<c0099a34>] (request_threaded_irq+0xb8/0x140) [ 3.875701] [<c0099a34>] (request_threaded_irq+0xb8/0x140) from [<c0487950>] (smsc911x_drv_probe+0x75c/0x11a4) [ 3.886260] [<c0487950>] (smsc911x_drv_probe+0x75c/0x11a4) from [<c02e9bcc>] (platform_drv_probe+0x18/0x1c) [ 3.906707] [<c02e89b8>] (driver_probe_device+0x90/0x210) from [<c02e8bcc>] (__driver_attach+0x94/0x98) [ 3.916625] [<c02e8bcc>] (__driver_attach+0x94/0x98) from [<c02e7298>] (bus_for_each_dev+0x50/0x7c) [ 3.926177] [<c02e7298>] (bus_for_each_dev+0x50/0x7c) from [<c02e81d4>] (bus_add_driver+0x184/0x248) [ 3.935821] [<c02e81d4>] (bus_add_driver+0x184/0x248) from [<c02e909c>] (driver_register+0x78/0x12c) [ 3.945465] [<c02e909c>] (driver_register+0x78/0x12c) from [<c0008648>] (do_one_initcall+0x34/0x178) [ 3.955108] [<c0008648>] (do_one_initcall+0x34/0x178) from [<c066e8f4>] (kernel_init+0xfc/0x1c0) [ 3.964385] [<c066e8f4>] (kernel_init+0xfc/0x1c0) from [<c00140b0>] (kernel_thread_exit+0x0/0x8) [ 3.973632] handlers: [ 3.976043] [<c034e2cc>] smsc911x_irqhandler [ 3.980560] Disabling IRQ #272 Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com> Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge tag 'pm2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-08-023-47/+103
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull arm-soc cpuidle enablement for OMAP from Olof Johansson: "Coupled cpuidle was meant to merge for 3.5 through Len Brown's tree, but didn't go in because the pull request ended up rejected. So it just got merged, and we got this staged branch that enables the coupled cpuidle code on OMAP. With a stable git workflow from the other maintainer we could have staged this earlier, but that wasn't the case so we have had to merge it late. The alternative is to hold it off until 3.7 but given that the code is well-isolated to OMAP and they are eager to see it go in, I didn't push back hard in that direction." * tag 'pm2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: OMAP4: CPUidle: Open broadcast clock-event device. ARM: OMAP4: CPUidle: add synchronization for coupled idle states ARM: OMAP4: CPUidle: Use coupled cpuidle states to implement SMP cpuidle. ARM: OMAP: timer: allow gp timer clock-event to be used on both cpus
| * ARM: OMAP4: CPUidle: Open broadcast clock-event device.Santosh Shilimkar2012-07-251-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP4 idle driver uses CLOCK_EVT_NOTIFY_BROADCAST_[ENTER/EXIT] for broadcast clock events. But _ENTER/_EXIT doesn't really open broadcast clock events and to explicitly setup the broadcast device, CLOCK_EVT_NOTIFY_BROADCAST_ON should be used. Add the missing CLOCK_EVT_NOTIFY_BROADCAST_ON clockevent notifications. This will setup the broadcast timer in either periodic/oneshot modes correctly. Recent clockevent infrastructure change 77b0d60 {leave the broadcast device in shutdown mode when not needed} exposed this bug leading to boot hangs in oneshot mode. Prior to this, periodic broadcast mode was also broken. This change fixes both the periodic/oneshot broadcast modes. Discussion thread : https://lkml.org/lkml/2012/4/9/13 Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: OMAP4: CPUidle: add synchronization for coupled idle statesKevin Hilman2012-07-251-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With coupled idle states, a failure for any CPU to hit a low power state must be coordinated such that all CPUs abort. On OMAP4, when entering a coupled state, CPU0 has to wait for CPU1 to enter its low power state before it can enter its low power state. This is implemented by letting CPU0 wait for the CPU1 powerdomain to hit off. However, there are conditions where CPU1 might abort/fail and not hit off while CPU0 is waiting for it. For example, a CPU1 wakeup or a failed attempt to hit off due to hardware conditions. To avoid the deadlock where CPU0 would continually wait for CPU1 to hit off-mode, this patch adds a flag to signal when each CPU has come out of its low-power state. CPU0 then checks whether CPU1 has hit off *or* has already completed its attempt to hit off. If the latter, CPU0 must abort its attempt to hit a low-power state so the coupled state enter method can return. In addition, cpuidle_coupled_parallel_barrier() is used to ensure the clearing of the 'done' flag is synchronized on all CPUs. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: OMAP4: CPUidle: Use coupled cpuidle states to implement SMP cpuidle.Santosh Shilimkar2012-07-252-46/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP4 CPUDILE driver is converted mainly based on notes from the coupled cpuidle patch series. The changes include : - Register both CPUs and C-states to cpuidle driver. - Set struct cpuidle_device.coupled_cpus - Set struct cpuidle_device.safe_state to non coupled state. - Set CPUIDLE_FLAG_COUPLED in struct cpuidle_state.flags for each state that affects multiple cpus. - Separate ->enter hooks for coupled & simple idle. - CPU0 wait loop for CPU1 power transition. - CPU1 wakeup mechanism for the idle exit. - Enabling ARCH_NEEDS_CPU_IDLE_COUPLED for OMAP4. Thanks to Kevin Hilman and Colin Cross on the suggestions/fixes on the intermediate version of this patch. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: OMAP: timer: allow gp timer clock-event to be used on both cpusSantosh Shilimkar2012-07-251-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | For coupled cpuidle to work when both cpus are active, it needs a global timer that can handle events for both cpus. This timer is used as the broadcast clock-event when the per-cpu timer hardware stop in low power states. Set the cpumask of clockevent_gpt to all cpus, set the rating correctly, and set the irq to allow the clockevent core to determine the affinity of the timer. Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* | Merge branch 'dmaengine' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2012-08-012-2/+0
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM DMA engine updates from Russell King: "This looks scary at first glance, but what it is is: - a rework of the sa11x0 DMA engine driver merged during the previous cycle, to extract a common set of helper functions for DMA engine implementations. - conversion of amba-pl08x.c to use these helper functions. - addition of OMAP DMA engine driver (using these helper functions), and conversion of some of the OMAP DMA users to use DMA engine. Nothing in the helper functions is ARM specific, so I hope that other implementations can consolidate some of their code by making use of these helpers. This has been sitting in linux-next most of the merge cycle, and has been tested by several OMAP folk. I've tested it on sa11x0 platforms, and given it my best shot on my broken platforms which have the amba-pl08x controller. The last point is the addition to feature-removal-schedule.txt, which will have a merge conflict. Between myself and TI, we're planning to remove the old TI DMA implementation next year." Fix up trivial add/add conflicts in Documentation/feature-removal-schedule.txt and drivers/dma/{Kconfig,Makefile} * 'dmaengine' of git://git.linaro.org/people/rmk/linux-arm: (53 commits) ARM: 7481/1: OMAP2+: omap2plus_defconfig: enable OMAP DMA engine ARM: 7464/1: mmc: omap_hsmmc: ensure probe returns error if DMA channel request fails Add feature removal of old OMAP private DMA implementation mtd: omap2: remove private DMA API implementation mtd: omap2: add DMA engine support spi: omap2-mcspi: remove private DMA API implementation spi: omap2-mcspi: add DMA engine support ARM: omap: remove mmc platform data dma_mask and initialization mmc: omap: remove private DMA API implementation mmc: omap: add DMA engine support mmc: omap_hsmmc: remove private DMA API implementation mmc: omap_hsmmc: add DMA engine support dmaengine: omap: add support for cyclic DMA dmaengine: omap: add support for setting fi dmaengine: omap: add support for returning residue in tx_state method dmaengine: add OMAP DMA engine driver dmaengine: sa11x0-dma: add cyclic DMA support dmaengine: sa11x0-dma: fix DMA residue support dmaengine: PL08x: ensure all descriptors are freed when channel is released dmaengine: PL08x: get rid of write only pool_ctr and free_txd locking ...
| * | ARM: omap: remove mmc platform data dma_mask and initializationRussell King2012-07-312-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DMAengine uses the DMA engine device structure when mapping/unmapping memory for DMA, so the MMC devices do not need their DMA masks initialized (this reflects hardware: the MMC device is not the device doing DMA.) Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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