summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-msm/include
Commit message (Collapse)AuthorAgeFilesLines
* Merge branch 'ppi-irq-core-for-rmk' of ↵Russell King2011-10-231-72/+1
|\ | | | | | | git://github.com/mzyngier/arm-platforms into devel-stable
| * ARM: gic: consolidate PPI handlingMarc Zyngier2011-10-231-72/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PPI handling is a bit of an odd beast. It uses its own low level handling code and is hardwired to the local timers (hence lacking a registration interface). Instead, switch the low handling to the normal SPI handling code. PPIs are handled by the handle_percpu_devid_irq flow. This also allows the removal of some duplicated code. Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: David Brown <davidb@codeaurora.org> Tested-by: David Brown <davidb@codeaurora.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
* | ARM: mach-msm: remove mach/memory.hNicolas Pitre2011-10-131-35/+0
| | | | | | | | Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
* | ARM: add an extra temp register to the low level debugging addruart macroNicolas Pitre2011-09-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Some platforms (like OMAP not to name it) are doing rather complicated hacks just to determine the base UART address to use. Let's give their addruart macro some slack by providing an extra work register which will allow for much needed cleanups. This is basically a no-op as this commit is only adding the extra argument to the macro but no one is using it yet. Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Kevin Hilman <khilman@ti.com>
* | ARM: 7012/1: Set proper TEXT_OFFSET for newer MSMsStephen Boyd2011-08-131-3/+3
|/ | | | | | | | | | | | | | | | | | | | | | | | MSMs post 8x50 have 2Mb at the beginning of RAM reserved for shared memory. Since the kernel hasn't typically been told this RAM exists, PHYS_OFFSET has been set to 0xN0200000 and the memory atags passed to the kernel have matched. This doesn't play nicely with things such as AUTO_ZRELADDR, which doesn't work at all, and dynamic phys to virt, which requires an MSM specific workaround. Work around these issues by telling the kernel RAM starts at 0xN0000000 (it actually does) and fixup the atags from the bootloader (if necessary) to say the same. In addition, make sure to set TEXT_OFFSET at least 2Mb beyond the start of RAM so that the kernel doesn't end up being decompressed into shared memory. After doing this, AUTO_ZRELADDR should work on MSM with no problems and ARM_PATCH_PHYS_VIRT_16BIT should no longer be necessary. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: David Brown <davidb@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'msm-move-gpio' of ↵Grant Likely2011-08-015-18/+52
|\ | | | | | | | | | | | | | | git://codeaurora.org/quic/kernel/davidb/linux-msm into gpio/next Conflicts: drivers/gpio/Kconfig drivers/gpio/Makefile
| * msm: gpiomux: Move public API to public headerDavid Brown2011-08-011-0/+38
| | | | | | | | | | | | | | | | | | | | | | The gpiomux.h header contains some SOC ifdefs. However, the API that is actually used by the GPIO driver only uses two functions that are general. Move these general definitions into a public header file. Change-Id: Ia5df8af87dba268225598d56908e523bcfc24ef6 Signed-off-by: David Brown <davidb@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * msm: Remove chip-ifdefs for GPIO io mappingsDavid Brown2011-08-014-18/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | The two GPIO controllers are always mapped to the same virtual address across all MSM devices. Instead of selecting this at compile time, determine the physical address at runtime, eliminating yet something else preventing multiple MSM targets from being compiled into the same kernel. Change-Id: I1672219d978ab6243526adeda6badf49472baa27 Signed-off-by: David Brown <davidb@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
* | ARM: Consolidate the clkdev header filesKyungmin Park2011-07-191-19/+0
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now most of ARM machines has the alsmot same __clk_get/put() macro So place it at the arch/arm/include/asm/clkdev.h and remove the reduntant header files But some machines don't have the same form as above. It can use the machince specific clkdev file by HAVE_MACH_CLKDEV config Now there are only 3 caese. 1) define the clk structure with clkdev macro => Need to move clk structure to proper header file arch/arm/mach-versatile/include/mach/clkdev.h arch/arm/mach-realview/include/mach/clkdev.h arch/arm/mach-vexpress/include/mach/clkdev.h arch/arm/mach-integrator/include/mach/clkdev.h 2) export the __clk_get/put function at clock.c arch/arm/mach-shmobile/include/mach/clkdev.h 3) demuxing the clk source arch/arm/mach-u300/include/mach/clkdev.h Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-05-231-23/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (137 commits) ARM: bcmring: convert to use sp804 clockevents ARM: bcmring: convert to sp804 clocksource ARM: 6912/1: bcmring: Add clkdev table in init_early clockevents: ARM sp804: obtain sp804 timer rate via clks clockevents: ARM sp804: allow clockevent name to be specified clocksource: ARM sp804: obtain sp804 timer rate via clks clocksource: ARM sp804: allow clocksource name to be specified clocksource: convert OMAP1 to 32-bit down counting clocksource clocksource: convert MXS timrotv2 to 32-bit down counting clocksource clocksource: convert SPEAr platforms 16-bit up counting clocksource clocksource: convert Integrator/AP 16-bit down counting clocksource clocksource: convert W90x900 24-bit down counting clocksource clocksource: convert ARM 32-bit down counting clocksources clocksource: convert ARM 32-bit up counting clocksources clocksource: add common mmio clocksource ARM: update sa1100 to reflect PXA updates ARM: omap1: convert to using readl/writel instead of volatile struct ARM: omap1: delete useless interrupt handler ARM: s5p: consolidate selection of timer register ARM: 6939/1: fix missing 'cpu_relax()' declaration ...
| * ARM: consolidate SMP cross call implementationRussell King2011-05-231-23/+0
| | | | | | | | | | | | | | | | Rather than having each platform class provide a mach/smp.h header for smp_cross_call(), arrange for them to register the function with the core ARM SMP code instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | treewide: fix a few typos in commentsJustin P. Mattock2011-05-101-1/+1
|/ | | | | | | | | | - kenrel -> kernel - whetehr -> whether - ttt -> tt - sss -> ss Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* Merge remote branch 'rmk/for-linus' into for-linusDavid Brown2011-03-161-6/+6
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * rmk/for-linus: (1557 commits) ARM: 6806/1: irq: introduce entry and exit functions for chained handlers ARM: 6781/1: Thumb-2: Work around buggy Thumb-2 short branch relocations in gas ARM: 6747/1: P2V: Thumb2 support ARM: 6798/1: aout-core: zero thread debug registers in a.out core dump ARM: 6796/1: Footbridge: Fix I/O mappings for NOMMU mode ARM: 6784/1: errata: no automatic Store Buffer drain on Cortex-A9 ARM: 6772/1: errata: possible fault MMU translations following an ASID switch ARM: 6776/1: mach-ux500: activate fix for errata 753970 ARM: 6794/1: SPEAr: Append UL to device address macros. ARM: 6793/1: SPEAr: Remove unused *_SIZE macros from spear*.h files ARM: 6792/1: SPEAr: Replace SIZE macro's with SZ_4K macros ARM: 6791/1: SPEAr3xx: Declare device structures after shirq code ARM: 6790/1: SPEAr: Clock Framework: Rename usbd clock and align apb_clk entry ARM: 6789/1: SPEAr3xx: Rename sdio to sdhci ARM: 6788/1: SPEAr: Include mach/hardware.h instead of mach/spear.h ARM: 6787/1: SPEAr: Reorder #includes in .h & .c files. ARM: 6681/1: SPEAr: add debugfs support to clk API ARM: 6703/1: SPEAr: update clk API support ARM: 6679/1: SPEAr: make clk API functions more generic ARM: 6737/1: SPEAr: formalized timer support ... Conflicts: arch/arm/mach-msm/board-msm7x27.c arch/arm/mach-msm/board-msm7x30.c arch/arm/mach-msm/board-qsd8x50.c arch/arm/mach-msm/board-sapphire.c arch/arm/mach-msm/include/mach/memory.h
| * ARM: P2V: separate PHYS_OFFSET from platform definitionsRussell King2011-02-171-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This uncouple PHYS_OFFSET from the platform definitions, thereby facilitating run-time computation of the physical memory offset. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Magnus Damm <damm@opensource.se> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Wan ZongShun <mcuos.com@gmail.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Eric Miao <eric.y.miao@gmail.com> Acked-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | msm: iommu: Don't read from write-only registersStepan Moskovchenko2011-03-081-28/+0
| | | | | | | | | | | | | | | | | | | | Don't read from V2Pxx command registers when doing iova-to-phys operations. These registers are write-only and reading the value before modifying the VA bits is unnecessary. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | msm: iommu: Remove dependency on IDRStepan Moskovchenko2011-03-081-0/+4
| | | | | | | | | | | | | | | | | | | | Remove the depencency on the IOMMU IDR register, as it may not be accessible depending on the security configuraton. This involves moving the NCB field of IDR into the platform data. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | msm: iommu: Use ASID tagging instead of VMID taggingStepan Moskovchenko2011-03-081-1/+3
| | | | | | | | | | | | | | | | Use ASID tags in the TLB instead of VMID tags in preparation for changes to the secure environment. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | msm: iommu: Rework clock logic and add IOMMU bus clock controlStepan Moskovchenko2011-03-081-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Clean up the clock control code in the probe calls, and add support for controlling the clock for the IOMMU bus interconnect. With the (proper) clock driver in place, the clock control logic in the probe function can be made much cleaner since it does not have to deal with the placeholder driver anymore. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Reviewed-by: Trilok Soni <tsoni@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | msm: iommu: Clock control for the IOMMU driverStepan Moskovchenko2011-03-081-2/+7
| | | | | | | | | | | | | | | | | | | | Add clock control to the IOMMU driver. The IOMMU bus clock (and potentially an AXI clock) need to be on to gain access to IOMMU registers. Actively control these clocks when needed instead of leaving them on. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | msm: clock: Migrate to clkdevStephen Boyd2011-02-282-2/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Migrating to clkdev has several advantages: * Less code in mach-msm/clock.c * A more robust clk_get() implementation * clk_add_alias() support * clk_get_sys() support In general, this will help board authors setup clock aliases and break the dependency on device pointers in the clock tables. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | msm: Use explicit GPLv2 licensesDavid Brown2011-02-286-142/+42
| | | | | | | | | | | | | | Replace a BSD-style license in Code Aurora Forum authored files with an explicit GPLv2. Signed-off-by: David Brown <davidb@codeaurora.org>
* | Merge branch 'msm-core' into for-nextDavid Brown2011-02-141-36/+0
|\ \ | | | | | | | | | | | | | | | | | | * msm-core: msm: iommu: Enable IOMMU support for MSM8960 msm: iommu: Generalize platform data for multiple targets msm: iommu: Create a Kconfig item for the IOMMU driver
| * | msm: iommu: Generalize platform data for multiple targetsStepan Moskovchenko2011-02-141-36/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the IOMMU platform data target-independent in preparation for adding MSM8960 IOMMU support. The IOMMU configuration on MSM8x60 and MSM8960 is identical and the same platform data can be used for both. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | Merge branch 'msm-core' into for-nextDavid Brown2011-01-281-6/+0
|\ \ \ | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * msm-core: msm: Clean up useless ifdefs msm: clock: Add support for more proc_comm clocks msm: clock: Invert debugfs directory layout msm: clock: Move debugfs code from clock.c to clock-debug.c msm: clock: Remove 7x30 and pcom includes from clock.h msm: clock: Remove unused code and definitions msm: Warning fix in trout gpio board file msm: Remove broken register definition from trout
| * | msm: Clean up useless ifdefsStepan Moskovchenko2011-01-281-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Remove ifdefs that do nothing, either from having the code between them previously removed, or from having been accidentally added to the wrong file. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | Merge branch 'msm-sdcc' into for-nextDavid Brown2011-01-242-4/+15
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | * msm-sdcc: msm: 8x50: Add initial support for SDCC mmc: msm_sdcc: Add gpio handling function to driver drivers: mmc: msm: remove clock disable in probe mmc: msm: fix dma usage not to use internal APIs
| * | msm: 8x50: Add initial support for SDCCSahitya Tummala2011-01-211-4/+4
| | | | | | | | | | | | Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
| * | mmc: msm_sdcc: Add gpio handling function to driverSahitya Tummala2011-01-211-0/+11
| |/ | | | | | | | | | | Configure SDCC GPIOs when the host is powered up or powered off. Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
* | msm: Add MSM 8960 cpu_is checkDavid Brown2011-01-211-0/+6
| | | | | | | | Signed-off-by: David Brown <davidb@codeaurora.org>
* | msm: irqs-8960: Interrupt map for MSM8960Stepan Moskovchenko2011-01-212-0/+296
| | | | | | | | | | | | | | | | | | Add the interrupt map for the Qualcomm MSM8960 chip. This chip has an interrupt map that is different from previous targets. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | msm: Physical offset for MSM8960Stepan Moskovchenko2011-01-211-0/+2
| | | | | | | | | | | | | | | | Add the physical memory offset value for the Qualcomm MSM8960 chip. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | msm: io: I/O register definitions for MSM8960Stepan Moskovchenko2011-01-213-0/+51
| | | | | | | | | | | | | | | | Add the register address definitions for the basic hardware blocks on the Qualcomm MSM8960 chip. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | msm: Generalize QGIC registersDavid Brown2011-01-212-6/+6
| | | | | | | | | | | | | | | | The QGIC registers are mapped to the same virtual addresses across targets, only the physical address changes. Move the BASE address out of target-specific files, and add a SOC name to the base addresses. Signed-off-by: David Brown <davidb@codeaurora.org>
* | msm: Generalize timer register mappingsDavid Brown2011-01-215-41/+19
| | | | | | | | | | | | | | | | | | Allow the timer register to be determined dynamically instead of at compile time. Use common virtual addresses for the registers across all MSM chips, and select the register mappings based on the detected CPU. Signed-off-by: David Brown <davidb@codeaurora.org>
* | msm: Add CPU queriesDavid Brown2011-01-211-0/+48
|/ | | | | | | | | | | Create runtime queries to distinguish the various MSM targets. Although these would probably be better named soc_is..., use cpu_is... to match convention in the rest of the kernel. Hard code the tests based on config options for now. When runtime device detection is implemented, these can be made dynamic. Signed-off-by: David Brown <davidb@codeaurora.org>
* Merge branch 'for-next' of ↵Linus Torvalds2011-01-131-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial * 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (43 commits) Documentation/trace/events.txt: Remove obsolete sched_signal_send. writeback: fix global_dirty_limits comment runtime -> real-time ppc: fix comment typo singal -> signal drivers: fix comment typo diable -> disable. m68k: fix comment typo diable -> disable. wireless: comment typo fix diable -> disable. media: comment typo fix diable -> disable. remove doc for obsolete dynamic-printk kernel-parameter remove extraneous 'is' from Documentation/iostats.txt Fix spelling milisec -> ms in snd_ps3 module parameter description Fix spelling mistakes in comments Revert conflicting V4L changes i7core_edac: fix typos in comments mm/rmap.c: fix comment sound, ca0106: Fix assignment to 'channel'. hrtimer: fix a typo in comment init/Kconfig: fix typo anon_inodes: fix wrong function name in comment fix comment typos concerning "consistent" poll: fix a typo in comment ... Fix up trivial conflicts in: - drivers/net/wireless/iwlwifi/iwl-core.c (moved to iwl-legacy.c) - fs/ext4/ext4.h Also fix missed 'diabled' typo in drivers/net/bnx2x/bnx2x.h while at it.
| * Merge branch 'master' into for-nextJiri Kosina2010-12-221-1/+1
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: MAINTAINERS arch/arm/mach-omap2/pm24xx.c drivers/scsi/bfa/bfa_fcpim.c Needed to update to apply fixes for which the old branch was too outdated.
| * | fix comment typos concerning "consistent"Uwe Kleine-König2010-12-101-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* | | msm: timer: SMP timer support for msmJeff Ohlstein2011-01-071-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The msm provides timer hardware that is private to each core. Each timer has separate counter and match registers, so we create separate clock_event_devices for each core. For the global clocksource, use cpu 0's counter. Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-01-061-2/+2
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (416 commits) ARM: DMA: add support for DMA debugging ARM: PL011: add DMA burst threshold support for ST variants ARM: PL011: Add support for transmit DMA ARM: PL011: Ensure IRQs are disabled in UART interrupt handler ARM: PL011: Separate hardware FIFO size from TTY FIFO size ARM: PL011: Allow better handling of vendor data ARM: PL011: Ensure error flags are clear at startup ARM: PL011: include revision number in boot-time port printk ARM: vexpress: add sched_clock() for Versatile Express ARM i.MX53: Make MX53 EVK bootable ARM i.MX53: Some bug fix about MX53 MSL code ARM: 6607/1: sa1100: Update platform device registration ARM: 6606/1: sa1100: Fix platform device registration ARM i.MX51: rename IPU irqs ARM i.MX51: Add ipu clock support ARM: imx/mx27_3ds: Add PMIC support ARM: DMA: Replace page_to_dma()/dma_to_page() with pfn_to_dma()/dma_to_pfn() mx51: fix usb clock support MX51: Add support for usb host 2 arch/arm/plat-mxc/ehci.c: fix errors/typos ...
| * | | ARM: SMP: pass an ipi number to smp_cross_call()Russell King2010-12-031-2/+2
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | This allows us to use smp_cross_call() to trigger a number of different software generated interrupts, rather than combining them all on one SGI. Recover the SGI number via do_IPI. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 6484/1: fix compile warning in mm/init.cAnand Gadiyar2010-11-211-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 7c63984b86 (ARM: do not define VMALLOC_END relative to PAGE_OFFSET) changed VMALLOC_END to be an explicit value. Before this, it was relative to PAGE_OFFSET and therefore converted to unsigned long as PAGE_OFFSET is an unsigned long. This introduced the following build warning. Fix this by changing the explicit defines of VMALLOC_END to be unsigned long. CC arch/arm/mm/init.o arch/arm/mm/init.c: In function 'mem_init': arch/arm/mm/init.c:606: warning: format '%08lx' expects type 'long unsigned int', but argument 12 has type 'unsigned int' Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Acked-by: Uwe Kleine-K <u.kleine-koenig@pengutronix.dee> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | MSM: Add USB support for MSM7x30Pavankumar Kondeti2010-12-161-0/+3
| | | | | | | | | | | | | | | | | | | | Add USB OTG, peripheral and host devices. This patch also adds usb_phy_clk which is required for resetting the PHY. VBUS power up and shutdown routines depends on PMIC module. As PMIC driver is unavailable, configure USB in peripheral only mode. Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | msm: iommu: Definitions for extended memory attributesStepan Moskovchenko2010-11-302-1/+34
| | | | | | | | | | | | | | | | | | Add the register field definitions and memory attribute definitions that will be needed to support IOMMU transactions with cache-coherent memory access. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
* | msm: iomap: Addresses and IRQs for 2nd GFX core IOMMUStepan Moskovchenko2010-11-302-1/+9
| | | | | | | | | | | | | | | | Add register addresses and IRQ numbers for the IOMMU used for the second 2D graphics core. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
* | msm: iommu: Increase maximum MID size to 5 bitsStepan Moskovchenko2010-11-301-1/+1
| | | | | | | | | | | | | | | | | | On msm8x60, the MID field on the AXI connection to the IOMMU can be up to five bits wide. Thus, allow the IOMMU context platform data to map up to 32 MIDs. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
* | msm: make constant unsigned long to correct format warningDavid Brown2010-11-161-1/+1
|/ | | | | | | | | | | | Define VMALLOC_END as an unsigned long to match expected type. Eliminates a warning: arch/arm/mm/init.c: In function 'mem_init': arch/arm/mm/init.c:606: warning: format '%08lx' expects type 'long unsigned int', but argument 12 has type 'unsigned int' Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
* msm: fix compile failure when no debug uart is selectedDaniel Walker2010-10-291-1/+1
| | | | | | | | | | | | | | | | | | | If the board has a debug uart the user is given a choice of which uart to use. The user can also select NONE, which means not to use one. In most of our header files when NONE is selected nothing is defined for MSM_DEBUG_UART_PHYS or MSM_DEBUG_UART_BASE. This causes a compile failure in debug-macro.S which expect something to be defined there. Example of the failure, arch/arm/kernel/built-in.o: In function `hexbuf': linux-2.6/arch/arm/kernel/debug.S:186: undefined reference to `MSM_DEBUG_UART_PHYS' linux-2.6/arch/arm/kernel/debug.S:186: undefined reference to `MSM_DEBUG_UART_BASE' This fixes the compile failure by adding an ifdef to debug-macro.S that removes all the debug uart code in the case of NONE. Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
* msm: fix debug-macro.S build failureDaniel Walker2010-10-291-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | Originally there was an ifdef case to handle when no debug uart was selected. In commit 0ea1293009826da45e1019f45dfde1e557bb30df that case was removed which causes the following build failure, linux-2.6/arch/arm/kernel/debug.S: Assembler messages: linux-2.6/arch/arm/kernel/debug.S:174: Error: bad instruction `addruart r1,r2' linux-2.6/arch/arm/kernel/debug.S:176: Error: bad instruction `waituart r2,r3' linux-2.6/arch/arm/kernel/debug.S:177: Error: bad instruction `senduart r1,r3' linux-2.6/arch/arm/kernel/debug.S:178: Error: bad instruction `busyuart r2,r3' linux-2.6/arch/arm/kernel/debug.S:190: Error: bad instruction `addruart r1,r2' This is a partial revert to add back the case which was removed with two caveats. First the API for the addruart macro was updated, and the new addruart case now return 0xfff00000 so that a know IO mapping is created instead of a random one. Cc: Jeremy Kerr <jeremy.kerr@canonical.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Jason Wang <jason77.wang@gmail.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Nicolas Pitre <nico@fluxnic.net> Cc: Russell King - ARM Linux <linux@arm.linux.org.uk> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
* arm: return both physical and virtual addresses from addruartJeremy Kerr2010-10-201-16/+4
| | | | | | | | | | | | | | | | | | | | Rather than checking the MMU status in every instance of addruart, do it once in kernel/debug.S, and change the existing addruart macros to return both physical and virtual addresses. The main debug code can then select the appropriate address to use. This will also allow us to retreive the address of a uart for the MMU state that we're not current in. Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com> and Tony Lindgren <tony@atomide.com>, and fix for versatile express from Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Jason Wang <jason77.wang@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
OpenPOWER on IntegriCloud