summaryrefslogtreecommitdiffstats
path: root/arch/arm/kernel
Commit message (Collapse)AuthorAgeFilesLines
* [ARM] 5417/1: Set the correct cacheid for ARMv6 CPUs with ARMv7 style MMUCatalin Marinas2009-03-031-6/+7
| | | | | | | | | | | The cacheid_init() function assumes that if cpu_architecture() returns 7, the caches are VIPT_NONALIASING. The cpu_architecture() function returns the version of the supported MMU features (e.g. TEX remapping) but it doesn't make any assumptions about the cache type. The patch adds the checking of the Cache Type Register for the ARMv7 format. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5404/1: Fix condition in arm_elf_read_implies_exec() to set ↵Makito SHIOKAWA2009-02-191-2/+2
| | | | | | | | | | | READ_IMPLIES_EXEC READ_IMPLIES_EXEC must be set when: o binary _is_ an executable stack (i.e. not EXSTACK_DISABLE_X) o processor architecture is _under_ ARMv6 (XN bit is supported from ARMv6) Signed-off-by: Makito SHIOKAWA <lkhmkt@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Storage class should be before const qualifierTobias Klauser2009-02-101-2/+2
| | | | | | | | | | The C99 specification states in section 6.11.5: The placement of a storage-class specifier other than at the beginning of the declaration specifiers in a declaration is an obsolescent feature. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* annotate that [fp, #-4] is the saved lrUwe Kleine-König2009-01-311-1/+1
| | | | Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
* Use __SPIN_LOCK_UNLOCKED to initialize bad_irq_desc.lockUwe Kleine-König2009-01-311-1/+1
| | | | | | | | | | SPIN_LOCK_UNLOCKED is deprecated as lockdep cannot properly work with locks initialized with it. This fix is necessary to compile the linux-rt tree for ARM. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Steven Rostedt <srostedt@redhat.com>
* [ARM] call undefined instruction exception handler with irqs enabledRussell King2009-01-281-0/+1
| | | | | | | | | | | | Aaro says: > With spinlock debugs enabled I get might_sleep() warnings when using > ptrace. tracked down to a missing enable_irq before calling do_undefinstr(). Reported-by: Aaro Koskinen <aaro.koskinen@nokia.com> Tested-by: Aaro Koskinen <aaro.koskinen@nokia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [CVE-2009-0029] Rename old_readdir to sys_old_readdirHeiko Carstens2009-01-141-1/+1
| | | | | | This way it matches the generic system call name convention. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
* [ARM] arch/arm/kernel/isa.c: missing definition of register_isa_portsBen Dooks2009-01-081-0/+1
| | | | | | | | | | arch/arm/kernel/isa.c should include <linux/io.h> to get the definition of register_io_ports() at-least when compiling for footbridge to fix the following sparse warning: isa.c:68:1: warning: symbol 'register_isa_ports' was not declared. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* PCI: arm: use generic INTx swizzle from PCI coreBjorn Helgaas2009-01-071-27/+0
| | | | | | | Use the generic pci_common_swizzle() instead of arch-specific code. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: arm: use generic pci_swizzle_interrupt_pin()Bjorn Helgaas2009-01-071-3/+3
| | | | | | | | Use the generic pci_swizzle_interrupt_pin() instead of arch-specific code. Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core-2.6Linus Torvalds2009-01-061-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core-2.6: (60 commits) uio: make uio_info's name and version const UIO: Documentation for UIO ioport info handling UIO: Pass information about ioports to userspace (V2) UIO: uio_pdrv_genirq: allow custom irq_flags UIO: use pci_ioremap_bar() in drivers/uio arm: struct device - replace bus_id with dev_name(), dev_set_name() libata: struct device - replace bus_id with dev_name(), dev_set_name() avr: struct device - replace bus_id with dev_name(), dev_set_name() block: struct device - replace bus_id with dev_name(), dev_set_name() chris: struct device - replace bus_id with dev_name(), dev_set_name() dmi: struct device - replace bus_id with dev_name(), dev_set_name() gadget: struct device - replace bus_id with dev_name(), dev_set_name() gpio: struct device - replace bus_id with dev_name(), dev_set_name() gpu: struct device - replace bus_id with dev_name(), dev_set_name() hwmon: struct device - replace bus_id with dev_name(), dev_set_name() i2o: struct device - replace bus_id with dev_name(), dev_set_name() IA64: struct device - replace bus_id with dev_name(), dev_set_name() i7300_idle: struct device - replace bus_id with dev_name(), dev_set_name() infiniband: struct device - replace bus_id with dev_name(), dev_set_name() ISDN: struct device - replace bus_id with dev_name(), dev_set_name() ...
| * arm: struct device - replace bus_id with dev_name(), dev_set_name()Kay Sievers2009-01-061-1/+1
| | | | | | | | | | | | Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* | kprobes: add kprobe_insn_mutex and cleanup arch_remove_kprobe()Masami Hiramatsu2009-01-061-2/+0
|/ | | | | | | | | | | | | | | | | | | | | | Add kprobe_insn_mutex for protecting kprobe_insn_pages hlist, and remove kprobe_mutex from architecture dependent code. This allows us to call arch_remove_kprobe() (and free_insn_slot) while holding kprobe_mutex. Signed-off-by: Masami Hiramatsu <mhiramat@redhat.com> Acked-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Cc: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Cc: Russell King <rmk@arm.linux.org.uk> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'cpus4096-for-linus-2' of ↵Linus Torvalds2009-01-022-11/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'cpus4096-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (66 commits) x86: export vector_used_by_percpu_irq x86: use logical apicid in x2apic_cluster's x2apic_cpu_mask_to_apicid_and() sched: nominate preferred wakeup cpu, fix x86: fix lguest used_vectors breakage, -v2 x86: fix warning in arch/x86/kernel/io_apic.c sched: fix warning in kernel/sched.c sched: move test_sd_parent() to an SMP section of sched.h sched: add SD_BALANCE_NEWIDLE at MC and CPU level for sched_mc>0 sched: activate active load balancing in new idle cpus sched: bias task wakeups to preferred semi-idle packages sched: nominate preferred wakeup cpu sched: favour lower logical cpu number for sched_mc balance sched: framework for sched_mc/smt_power_savings=N sched: convert BALANCE_FOR_xx_POWER to inline functions x86: use possible_cpus=NUM to extend the possible cpus allowed x86: fix cpu_mask_to_apicid_and to include cpu_online_mask x86: update io_apic.c to the new cpumask code x86: Introduce topology_core_cpumask()/topology_thread_cpumask() x86: xen: use smp_call_function_many() x86: use work_on_cpu in x86/kernel/cpu/mcheck/mce_amd_64.c ... Fixed up trivial conflict in kernel/time/tick-sched.c manually
| * Merge branch 'linus' into cpus4096Ingo Molnar2008-12-172-2/+3
| |\
| * | cpumask: make irq_set_affinity() take a const struct cpumaskRusty Russell2008-12-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Impact: change existing irq_chip API Not much point with gentle transition here: the struct irq_chip's setaffinity method signature needs to change. Fortunately, not widely used code, but hits a few architectures. Note: In irq_select_affinity() I save a temporary in by mangling irq_desc[irq].affinity directly. Ingo, does this break anything? (Folded in fix from KOSAKI Motohiro) Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Mike Travis <travis@sgi.com> Reviewed-by: Grant Grundler <grundler@parisc-linux.org> Acked-by: Ingo Molnar <mingo@redhat.com> Cc: ralf@linux-mips.org Cc: grundler@parisc-linux.org Cc: jeremy@xensource.com Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
| * | cpumask: centralize cpu_online_map and cpu_possible_mapRusty Russell2008-12-131-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Impact: cleanup Each SMP arch defines these themselves. Move them to a central location. Twists: 1) Some archs (m32, parisc, s390) set possible_map to all 1, so we add a CONFIG_INIT_ALL_POSSIBLE for this rather than break them. 2) mips and sparc32 '#define cpu_possible_map phys_cpu_present_map'. Those archs simply have phys_cpu_present_map replaced everywhere. 3) Alpha defined cpu_possible_map to cpu_present_map; this is tricky so I just manipulate them both in sync. 4) IA64, cris and m32r have gratuitous 'extern cpumask_t cpu_possible_map' declarations. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Reviewed-by: Grant Grundler <grundler@parisc-linux.org> Tested-by: Tony Luck <tony.luck@intel.com> Acked-by: Ingo Molnar <mingo@elte.hu> Cc: Mike Travis <travis@sgi.com> Cc: ink@jurassic.park.msu.ru Cc: rmk@arm.linux.org.uk Cc: starvik@axis.com Cc: tony.luck@intel.com Cc: takata@linux-m32r.org Cc: ralf@linux-mips.org Cc: grundler@parisc-linux.org Cc: paulus@samba.org Cc: schwidefsky@de.ibm.com Cc: lethal@linux-sh.org Cc: wli@holomorphy.com Cc: davem@davemloft.net Cc: jdike@addtoit.com Cc: mingo@redhat.com
* | | take init_fs to saner placeAl Viro2008-12-311-1/+0
| | | | | | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* | | Merge branch 'for-rmk' of git://git.pengutronix.de/git/ukl/linux-2.6 into develRussell King2008-12-191-1/+1
|\ \ \
| * | | small doc fix: ftrace_dyn_arch_init is called by ftrace_initUwe Kleine-König2008-12-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | ... not kstop_machine. Add a note that irqs are disabled. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
* | | | Merge branch 'mxc-pu-imxfb' of ↵Russell King2008-12-172-2/+3
|\ \ \ \ | | |_|/ | |/| | | | | | git://pasiphae.extern.pengutronix.de/git/imx/linux-2.6 into devel
| * | | [ARM] Ensure linux/hardirqs.h is included where requiredRussell King2008-12-151-0/+1
| |/ / | | | | | | | | | | | | | | | ... for the removal of it from asm-generic/local.h Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 5341/2: there is no copy_page on nommu ARMNicolas Pitre2008-12-111-2/+2
| |/ | | | | | | | | | | | | | | ... as it is defined with memcpy, therefore no copy_page symbol to export. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'for-rmk-realview' of git://linux-arm.org/linux-2.6 into develRussell King2008-12-011-2/+2
|\ \
| * | RealView: Use only the shadow mapping of ARM11MPCore local timersCatalin Marinas2008-12-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All the cases where the local timer for a CPU is accessed happen on the corresponding current CPU, hence no need to access the per-CPU local timer mappings. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | | [ARM] use asm/sections.hRussell King2008-12-014-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | Update to use the asm/sections.h header rather than declaring these symbols ourselves. Change __data_start to _data to conform with the naming found within asm/sections.h. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | [ARM] Remove linux/sched.h from asm/cacheflush.h and asm/uaccess.hRussell King2008-11-291-0/+1
| | | | | | | | | | | | | | | | | | | | | ... and fix those drivers that were incorrectly relying upon that include. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Merge branch 'highmem' into develRussell King2008-11-281-16/+21
|\ \ \ | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-clps7500/include/mach/memory.h
| * | | [ARM] rationalize memory configuration code some moreNicolas Pitre2008-11-281-16/+21
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently there are two instances of struct meminfo: one in kernel/setup.c marked __initdata, and another in mm/init.c with permanent storage. Let's keep only the later to directly populate the permanent version from arm_add_memory(). Also move common validation tests between the MMU and non-MMU cases into arm_add_memory() to remove some duplication. Protection against overflowing the membank array is also moved in there in order to cover the kernel cmdline parsing path as well. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Merge branch 'for-rmk' of git://linux-arm.org/linux-2.6 into develRussell King2008-11-272-1/+3
|\ \ \ | |/ / |/| |
| * | Fix the teehbr_read function prototypeCatalin Marinas2008-11-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A "void" was missing inside brackets. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | Add HWCAP_NEON to the ARM hwcap.h fileCatalin Marinas2008-11-061-0/+1
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | Add "thumbee" to the hwcap_str arrayCatalin Marinas2008-11-061-0/+1
| |/ | | | | | | | | | | | | | | | | This part was missed in the initial patch adding ThumbEE support. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | [ARM] fix naming of MODULE_START / MODULE_ENDRussell King2008-11-061-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | As of 73bdf0a60e607f4b8ecc5aec597105976565a84f, the kernel needs to know where modules are located in the virtual address space. On ARM, we located this region between MODULE_START and MODULE_END. Unfortunately, everyone else calls it MODULES_VADDR and MODULES_END. Update ARM to use the same naming, so is_vmalloc_or_module_addr() can work properly. Also update the comment on mm/vmalloc.c to reflect that ARM also places modules in a separate region from the vmalloc space. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] fix VFP+softfloat binariesRussell King2008-11-041-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | 2.6.28-rc tightened up the ELF architecture checks on ARM. For non-EABI it only allows VFP if the hardware supports it. However, the kernel fails to also inspect the soft-float flag, so it incorrectly rejects binaries using soft-VFP. The fix is simple: also check that EF_ARM_SOFT_FLOAT isn't set before rejecting VFP binaries on non-VFP hardware. Acked-by: Mikael Pettersson <mikpe@it.uu.se> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ftrace: remove mcount setSteven Rostedt2008-10-231-13/+0
| | | | | | | | | | | | | | | | The arch dependent function ftrace_mcount_set was only used by the daemon start up code. This patch removes it. Signed-off-by: Steven Rostedt <srostedt@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | ftrace: rename FTRACE to FUNCTION_TRACERSteven Rostedt2008-10-202-3/+3
|/ | | | | | | | | | | | Due to confusion between the ftrace infrastructure and the gcc profiling tracer "ftrace", this patch renames the config options from FTRACE to FUNCTION_TRACER. The other two names that are offspring from FTRACE DYNAMIC_FTRACE and FTRACE_MCOUNT_RECORD will stay the same. This patch was generated mostly by script, and partially by hand. Signed-off-by: Steven Rostedt <srostedt@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* Merge branch 'proc' of ↵Linus Torvalds2008-10-131-17/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/adobriyan/proc * 'proc' of git://git.kernel.org/pub/scm/linux/kernel/git/adobriyan/proc: proc: remove kernel.maps_protect proc: remove now unneeded ADDBUF macro [PATCH] proc: show personality via /proc/pid/personality [PATCH] signal, procfs: some lock_task_sighand() users do not need rcu_read_lock() proc: move PROC_PAGE_MONITOR to fs/proc/Kconfig proc: make grab_header() static proc: remove unused get_dma_list() proc: remove dummy vmcore_open() proc: proc_sys_root tweak proc: fix return value of proc_reg_open() in "too late" case Fixed up trivial conflict in removed file arch/sparc/include/asm/dma_32.h
| * proc: remove unused get_dma_list()Alexey Dobriyan2008-10-101-17/+0
| | | | | | | | Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
* | Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2008-10-1130-324/+236
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (236 commits) [ARM] 5300/1: fixup spitz reset during boot [ARM] 5295/1: make ZONE_DMA optional [ARM] 5239/1: Palm Zire 72 power management support [ARM] 5298/1: Drop desc_handle_irq() [ARM] 5297/1: [KS8695] Fix two compile-time warnings [ARM] 5296/1: [KS8695] Replace macro's with trailing underscores. [ARM] pxa: allow multi-machine PCMCIA builds [ARM] pxa: add preliminary CPUFREQ support for PXA3xx [ARM] pxa: add missing ACCR bit definitions to pxa3xx-regs.h [ARM] pxa: rename cpu-pxa.c to cpufreq-pxa2xx.c [ARM] pxa/zylonite: add support for USB OHCI [ARM] ohci-pxa27x: use ioremap() and offset for register access [ARM] ohci-pxa27x: introduce pxa27x_clear_otgph() [ARM] ohci-pxa27x: use platform_get_{irq,resource} for the resource [ARM] ohci-pxa27x: move OHCI controller specific registers into the driver [ARM] ohci-pxa27x: introduce flags to avoid direct access to OHCI registers [ARM] pxa: move I2S register and bit definitions into pxa2xx-i2s.c [ARM] pxa: simplify DMA register definitions [ARM] pxa: make additional DCSR bits valid for PXA3xx [ARM] pxa: move i2c register and bit definitions into i2c-pxa.c ... Fixed up conflicts in arch/arm/mach-versatile/core.c sound/soc/pxa/pxa2xx-ac97.c sound/soc/pxa/pxa2xx-i2s.c manually.
| * \ Merge branch 'pxa-all' into develRussell King2008-10-092-10/+7
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-pxa/Kconfig arch/arm/mach-pxa/corgi.c arch/arm/mach-pxa/include/mach/hardware.h arch/arm/mach-pxa/spitz.c
| | * | [ARM] 5298/1: Drop desc_handle_irq()Dmitry Baryshkov2008-10-092-10/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | desc_handle_irq() was declared as obsolete since long ago. Replace it with generic_handle_irq() Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | Merge branch 'ptebits' into develRussell King2008-10-093-2/+81
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/Kconfig
| | * | | [ARM] Improve non-executable supportRussell King2008-10-013-2/+81
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for detecting non-executable stack binaries, and adjust permissions to prevent execution from data and stack areas. Also, ensure that READ_IMPLIES_EXEC is enabled for older CPUs where that is true, and for any executable-stack binary. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | [ARM] 5274/1: simplify request_standard_resources()Nicolas Pitre2008-10-021-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no point converting memory bank addresses from physical to virtual just to convert them back to physical addresses. Furthermore this isn't "right" for highmem even if in this case the end result is the correct one. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | [ARM] mm: move vmalloc= parsing to arch/arm/mm/mmu.cRussell King2008-09-301-13/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There's no point scattering this around the tree, the parsing of the parameter might as well live beside the code which uses it. That also means we can make vmalloc_reserve a static variable. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | [ARM] Print details relevant to how we handle the cacheRussell King2008-09-251-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This replaces the original cache type decoding printks. We now indicate how we're treating the cache which we found, rather than what we found. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | [ARM] Introduce new bitmask based cache type macrosRussell King2008-09-251-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than trying to (inaccurately) decode the cache type from the registers each time we need to decide what type of cache we have, use a bitmask initialized early during boot. Since the setup is a one-off initialization, we can be a little more clever and take account of the CPU architecture as well. Note that we continue to achieve the compactness on optimised kernels by forcing tests to always-false or always-true as appropriate, thereby allowing the compiler to do build-time code elimination. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | [ARM] Remove cache type printksRussell King2008-09-251-141/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cache type register found in ARMv5 and later CPUs changes format and meaning depending on the CPU architecture version. Currently, this code: a) doesn't work for everything - Xscale's are identified as 'unknown 5'. b) is not able to tell whether the caches are VIVT or VIPT from the cache type. c) prints rubbish on some ARMv6 and ARMv7+ CPUs. The two solutions to this are: 1. Add yet more code to decode and print the various different register formats. 2. Remove the code altogther. The code only exists to decode and print the cache parameters. Increasing the complexity of it just for the sake of a few prinks isn't worth it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | [ARM] Convert asm/io.h to linux/io.hRussell King2008-09-068-10/+7
| | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
OpenPOWER on IntegriCloud