summaryrefslogtreecommitdiffstats
path: root/arch/arm/kernel/head.S
Commit message (Collapse)AuthorAgeFilesLines
* Merge branch 'fixes' into for-linusRussell King2012-10-111-2/+2
|\ | | | | | | | | Conflicts: arch/arm/kernel/smp.c
| * ARM: move debug macros to common locationRob Herring2012-09-141-2/+2
| | | | | | | | | | | | | | | | Based on suggestion by Russell King, create a common location for debug macros and select the included debug macro file using config option. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk>
* | ARM: virt: allow the kernel to be entered in HYP modeDave Martin2012-09-191-3/+11
|/ | | | | | | | | | | | | | | | | | | | | This patch does two things: * Ensure that asynchronous aborts are masked at kernel entry. The bootloader should be masking these anyway, but this reduces the damage window just in case it doesn't. * Enter svc mode via exception return to ensure that CPU state is properly serialised. This does not matter when switching from an ordinary privileged mode ("PL1" modes in ARMv7-AR rev C parlance), but it potentially does matter when switching from a another privileged mode such as hyp mode. This should allow the kernel to boot safely either from svc mode or hyp mode, even if no support for use of the ARM Virtualization Extensions is built into the kernel. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
* ARM: 7439/1: head.S: simplify initial page table mappingNicolas Pitre2012-07-091-36/+23
| | | | | | | | | | Let's map the initial RAM up to the end of the kernel .bss instead of the strict kernel image area. This simplifies the code as the kernel image only needs to be handled specially in the XIP case. That covers the legacy ATAG location as well. Signed-off-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7363/1: DEBUG_LL: limit early mapping to the minimumNicolas Pitre2012-05-041-8/+1
| | | | | | | | | There is just no point mapping up to 512MB for a serial port. Using a single 1MB entry is way sufficient for all users. This will create less interference for the following debugging patch. Signed-off-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7338/1: add support for early console output via semihostingNicolas Pitre2012-03-241-4/+4
| | | | | | | | | | | | | | This is a very simple method for code running in an emulator, or under the supervision of a debugger, to use I/O facilities on the controlling host. Tested with OpenOCD, and ARM's Fast Models. Details on semihosting can be found in chapter 8 of DUI0203I_rvct_developer_guide.pdf from ARM Ltd. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: move CP15 definitions to separate header fileRussell King2012-03-241-1/+1
| | | | | | | | | | | | | | Avoid namespace conflicts with drivers over the CP15 definitions by moving CP15 related prototypes and definitions to a private header file. Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> [Tegra] Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Tested-by: H Hartley Sweeten <hsweeten@visionengravers.com> [EP93xx] Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7275/1: LPAE: Check the CPU support for the long descriptor formatCatalin Marinas2012-01-131-0/+8
| | | | | | | | | | This patch adds a check for the presence of the LPAE feature during the CPU initialisation. If not present, it reports an error when CONFIG_DEBUG_LL is enabled. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'for-rmk' of ↵Russell King2011-12-081-2/+45
|\ | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux into devel-stable Conflicts: arch/arm/mm/ioremap.c
| * ARM: LPAE: MMU setup for the 3-level page table formatCatalin Marinas2011-12-081-2/+43
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds the MMU initialisation for the LPAE page table format. The swapper_pg_dir size with LPAE is 5 rather than 4 pages. A new proc-v7-3level.S file contains the TTB initialisation, context switch and PTE setting code with the LPAE. The TTBRx split is based on the PAGE_OFFSET with TTBR1 used for the kernel mappings. The 36-bit mappings (supersections) and a few other memory types in mmu.c are conditionally compiled. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * ARM: LPAE: add ISBs around MMU enabling codeWill Deacon2011-12-081-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Before we enable the MMU, we must ensure that the TTBR registers contain sane values. After the MMU has been enabled, we jump to the *virtual* address of the following function, so we also need to ensure that the SCTLR write has taken effect. This patch adds ISB instructions around the SCTLR write to ensure the visibility of the above. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | Merge branch 'kexec/idmap' of ↵Russell King2011-12-061-8/+10
|\ \ | |/ | | | | git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into devel-stable
| * ARM: SMP: use idmap_pgd for mapping MMU enable during secondary bootingWill Deacon2011-12-061-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM SMP booting code allocates a temporary set of page tables containing an identity mapping of the kernel image and provides this to secondary CPUs for initial booting. In reality, we only need to include the __turn_mmu_on function in the identity mapping since the rest of the kernel is executing from virtual addresses after this point. This patch adds __turn_mmu_on to the .idmap.text section, allowing the SMP booting code to use the idmap_pgd directly and not have to populate its own set of page table. As a result of this patch, we can make the identity_mapping_add function static (since it is only used within mm/idmap.c) and also remove the identity_mapping_del function. The identity map population is moved to an early initcall so that it is setup in time for secondary CPU bringup. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| * ARM: head.S: only include __turn_mmu_on in the initial identity mappingWill Deacon2011-12-061-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | __create_page_tables identity maps the region of memory from __enable_mmu to the end of __turn_mmu_on. In preparation for including __turn_mmu_on in the .idmap.text section, this patch modifies the identity mapping so that it only includes the __turn_mmu_on code. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
* | ARM: 7150/1: Allow kernel unaligned accesses on ARMv6+ processorsCatalin Marinas2011-11-081-1/+1
|/ | | | | | | | | | | | | Recent gcc versions generate unaligned accesses by default on ARMv6 and later processors. This patch ensures that the SCTLR.A bit is always cleared on such processors to avoid kernel traping before alignment_init() is called. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: John Linn <John.Linn@xilinx.com> Acked-by: Nicolas Pitre <nico@linaro.org> Cc: stable@vger.kernel.org Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'devel-stable' of ↵Linus Torvalds2011-10-281-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm * 'devel-stable' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: (178 commits) ARM: 7139/1: fix compilation with CONFIG_ARM_ATAG_DTB_COMPAT and large TEXT_OFFSET ARM: gic, local timers: use the request_percpu_irq() interface ARM: gic: consolidate PPI handling ARM: switch from NO_MACH_MEMORY_H to NEED_MACH_MEMORY_H ARM: mach-s5p64x0: remove mach/memory.h ARM: mach-s3c64xx: remove mach/memory.h ARM: plat-mxc: remove mach/memory.h ARM: mach-prima2: remove mach/memory.h ARM: mach-zynq: remove mach/memory.h ARM: mach-bcmring: remove mach/memory.h ARM: mach-davinci: remove mach/memory.h ARM: mach-pxa: remove mach/memory.h ARM: mach-ixp4xx: remove mach/memory.h ARM: mach-h720x: remove mach/memory.h ARM: mach-vt8500: remove mach/memory.h ARM: mach-s5pc100: remove mach/memory.h ARM: mach-tegra: remove mach/memory.h ARM: plat-tcc: remove mach/memory.h ARM: mach-mmp: remove mach/memory.h ARM: mach-cns3xxx: remove mach/memory.h ... Fix up mostly pretty trivial conflicts in: - arch/arm/Kconfig - arch/arm/include/asm/localtimer.h - arch/arm/kernel/Makefile - arch/arm/mach-shmobile/board-ap4evb.c - arch/arm/mach-u300/core.c - arch/arm/mm/dma-mapping.c - arch/arm/mm/proc-v7.S - arch/arm/plat-omap/Kconfig largely due to some CONFIG option renaming (ie CONFIG_PM_SLEEP -> CONFIG_ARM_CPU_SUSPEND for the arm-specific suspend code etc) and addition of NEED_MACH_MEMORY_H next to HAVE_IDE.
| * ARM: prepare for removal of a bunch of <mach/memory.h> filesNicolas Pitre2011-09-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | When the CONFIG_NO_MACH_MEMORY_H symbol is selected by a particular machine class, the machine specific memory.h include file is no longer used and can be removed. In that case the equivalent information can be obtained dynamically at runtime by enabling CONFIG_ARM_PATCH_PHYS_VIRT or by specifying the physical memory address at kernel configuration time. If/when all instances of mach/memory.h are removed then this symbol could be removed. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * ARM: add an extra temp register to the low level debugging addruart macroNicolas Pitre2011-09-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Some platforms (like OMAP not to name it) are doing rather complicated hacks just to determine the base UART address to use. Let's give their addruart macro some slack by providing an extra work register which will allow for much needed cleanups. This is basically a no-op as this commit is only adding the extra argument to the macro but no one is using it yet. Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Kevin Hilman <khilman@ti.com>
| |
| \
*-. \ Merge branches 'arnd-randcfg-fixes', 'debug', 'io' (early part), 'l2x0', ↵Russell King2011-10-251-83/+52
|\ \ \ | | |/ | |/| | | | 'p2v', 'pgt' (early part) and 'smp' into for-linus
| | * ARM: 7059/1: LPAE: Use PMD_(SHIFT|SIZE|MASK) instead of PGDIR_*Catalin Marinas2011-08-231-35/+39
| |/ |/| | | | | | | | | | | | | | | PGDIR_SHIFT and PMD_SHIFT for the classic 2-level page table format have the same value (21). This patch converts the PGDIR_* uses in the kernel to the PMD_* equivalent so that LPAE builds can reuse the same code. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7013/1: P2V: Remove ARM_PATCH_PHYS_VIRT_16BITNicolas Pitre2011-08-131-48/+13
|/ | | | | | | | | This code can be removed now that MSM targets no longer need the 16-bit offsets for P2V. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6999/1: head, zImage: Always Enter the kernel in ARM stateDave Martin2011-07-191-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | Currently, the documented kernel entry requirements are not explicit about whether the kernel should be entered in ARM or Thumb, leading to an ambiguitity about how to enter Thumb-2 kernels. As a result, the kernel is reliant on the zImage decompressor to enter the kernel proper in the correct instruction set state. This patch changes the boot entry protocol for head.S and Image to be the same as for zImage: in all cases, the kernel is now entered in ARM. Documentation/arm/Booting is updated to reflect this new policy. A different rule will be needed for Cortex-M class CPUs as and when support for those lands in mainline, since these CPUs don't support the ARM instruction set at all: a note is added to the effect that the kernel must be entered in Thumb on such systems. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
*-. Merge branches 'devel', 'devel-stable' and 'fixes' into for-linusRussell King2011-05-271-6/+9
|\ \
| | * ARM: 6942/1: mm: make TTBR1 always point to swapper_pg_dir on ARMv6/7Catalin Marinas2011-05-261-2/+5
| |/ |/| | | | | | | | | | | | | | | | | This patch makes TTBR1 point to swapper_pg_dir so that global, kernel mappings can be used exclusively on v6 and v7 cores where they are needed. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * arm/dt: Make __vet_atags also accept a dtb imageGrant Likely2011-05-111-4/+4
|/ | | | | | | | | | | The dtb is passed to the kernel via register r2, which is the same method that is used to pass an atags pointer. This patch modifies __vet_atags to not clear r2 when it encounters a dtb image. v2: fixed bugs pointed out by Nicolas Pitre Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* Merge branch 'p2v' into develRussell King2011-03-161-25/+159
|\ | | | | | | | | | | Conflicts: arch/arm/kernel/module.c arch/arm/mach-s5pv210/sleep.S
| * ARM: 6747/1: P2V: Thumb2 supportNicolas Pitre2011-03-101-1/+48
| | | | | | | | | | | | | | | | | | | | | | | | Adding Thumb2 support to the runtime patching of the virt_to_phys and phys_to_virt opcodes. Tested both the 8-bit and the 16-bit fixups, using different placements in memory to exercize all code paths. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 6648/1: map ATAGs when not in first 1MB of RAMRob Herring2011-02-171-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | If ATAGs or DTB pointer is not within first 1MB of RAM, then the boot params will not be mapped early enough, so map the 1MB region that r2 points to. Only map the first 1MB when r2 is 0. Some assembly improvements from Nicolas Pitre. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: P2V: extend to 16-bit translation offsetsRussell King2011-02-171-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | MSM's memory is aligned to 2MB, which is more than we can do with our existing method as we're limited to the upper 8 bits. Extend this by using two instructions to 16 bits, automatically selected when MSM is enabled. Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: P2V: introduce phys_to_virt/virt_to_phys runtime patchingRussell King2011-02-171-0/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This idea came from Nicolas, Eric Miao produced an initial version, which was then rewritten into this. Patch the physical to virtual translations at runtime. As we modify the code, this makes it incompatible with XIP kernels, but allows us to achieve this with minimal loss of performance. As many translations are of the form: physical = virtual + (PHYS_OFFSET - PAGE_OFFSET) virtual = physical - (PHYS_OFFSET - PAGE_OFFSET) we generate an 'add' instruction for __virt_to_phys(), and a 'sub' instruction for __phys_to_virt(). We calculate at run time (PHYS_OFFSET - PAGE_OFFSET) by comparing the address prior to MMU initialization with where it should be once the MMU has been initialized, and place this constant into the above add/sub instructions. Once we have (PHYS_OFFSET - PAGE_OFFSET), we can calculate the real PHYS_OFFSET as PAGE_OFFSET is a build-time constant, and save this for the C-mode PHYS_OFFSET variable definition to use. At present, we are unable to support Realview with Sparsemem enabled as this uses a complex mapping function, and MSM as this requires a constant which will not fit in our math instruction. Add a module version magic string for this feature to prevent incompatible modules being loaded. Tested-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: P2V: eliminate head.S use of PHYS_OFFSET for !XIP_KERNELRussell King2011-02-171-22/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | head.S makes use of PHYS_OFFSET. When it becomes a variable, the assembler won't understand this. Compute PHYS_OFFSET by the following method. This code is linked at its virtual address, but run at before the MMU is enabled, so at his physical address. 1: .long . .long PAGE_OFFSET adr r0, 1b @ r0 = physical ',' ldmia r0, {r1, r2} @ r1 = virtual '.', r2 = PAGE_OFFSET sub r1, r0, r1 @ r1 = physical-virtual add r2, r2, r1 @ r2 = PAGE_OFFSET + physical-virtual @ := PHYS_OFFSET. Switch XIP users of PHYS_OFFSET to use PLAT_PHYS_OFFSET - we can't use this method for XIP kernels as the code doesn't execute in RAM. Tested-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'misc' into develRussell King2011-03-161-7/+2
|\ \ | |/ | | | | | | Conflicts: arch/arm/Kconfig
| * ARM: Defer lookup of machine_type to setup.cRussell King2011-02-151-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the debug macros no longer depend on the machine type information, the machine type lookup can be deferred to setup_arch() in setup.c which simplifies the code somewhat. We also move the __error_a functionality into setup.c for displaying a message when a bad machine ID is passed to the kernel via the LL debug code. We also log this into the kernel ring buffer which makes it possible to retrieve the message via a debugger. Original idea from Grant Likely. Acked-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: fixup SMP alternatives in modulesRussell King2011-02-101-12/+26
|/ | | | | | | | | With certain configurations, we inline the unlock functions in modules, which results in SMP alternatives being created in modules. We need to fix those up when loading a module to prevent undefined instruction faults. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: smp_on_up: allow non-ARM SMP processorsRussell King2011-01-311-12/+10
| | | | | | | | | | | | | Allow non-ARM SMP processors to use the SMP_ON_UP feature. CPUs supporting SMP must have the new CPU ID format, so check for this first. Then check for ARM11MPCore, which fails the MPIDR check. Lastly check the MPIDR reports multiprocessing extensions and that the CPU is part of a multiprocessing system. Cc: <stable@kernel.org> Reported-and-Tested-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'misc' into develRussell King2011-01-061-19/+31
|\ | | | | | | | | | | | | | | Conflicts: arch/arm/Kconfig arch/arm/common/Makefile arch/arm/kernel/Makefile arch/arm/kernel/smp.c
| * ARM: 6516/1: Allow SMP_ON_UP to work with Thumb-2 kernels.Dave Martin2010-12-201-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * __fixup_smp_on_up has been modified with support for the THUMB2_KERNEL case. For THUMB2_KERNEL only, fixups are split into halfwords in case of misalignment, since we can't rely on unaligned accesses working before turning the MMU on. No attempt is made to optimise the aligned case, since the number of fixups is typically small, and it seems best to keep the code as simple as possible. * Add a rotate in the fixup_smp code in order to support CPU_BIG_ENDIAN, as suggested by Nicolas Pitre. * Add an assembly-time sanity-check to ALT_UP() to ensure that the content really is the right size (4 bytes). (No check is done for ALT_SMP(). Possibly, this could be fixed by splitting the two uses ot ALT_SMP() (ALT_SMP...SMP_UP versus ALT_SMP...SMP_UP_B) into two macros. In the first case, ALT_SMP needs to expand to >= 4 bytes, not == 4.) * smp_mpidr.h (which implements ALT_SMP()/ALT_UP() manually due to macro limitations) has not been modified: the affected instruction (mov) has no 16-bit encoding, so the correct instruction size is satisfied in this case. * A "mode" parameter has been added to smp_dmb: smp_dmb arm @ assumes 4-byte instructions (for ARM code, e.g. kuser) smp_dmb @ uses W() to ensure 4-byte instructions for ALT_SMP() This avoids assembly failures due to use of W() inside smp_dmb, when assembling pure-ARM code in the vectors page. There might be a better way to achieve this. * Kconfig: make SMP_ON_UP depend on (!THUMB2_KERNEL || !BIG_ENDIAN) i.e., THUMB2_KERNEL is now supported, but only if !BIG_ENDIAN (The fixup code for Thumb-2 currently assumes little-endian order.) Tested using a single generic realview kernel on: ARM RealView PB-A8 (CONFIG_THUMB2_KERNEL={n,y}) ARM RealView PBX-A9 (SMP) Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: SMP: use more sane register allocation for __fixup_smp_on_upRussell King2010-12-201-17/+22
| | | | | | | | | | | | | | | | Use r0,r3-r6 rather than r0,r3,r4,r6,r7, which makes it easier to understand which registers can be modified. Also document which registers hold values which must be preserved. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 6504/1: Thumb-2: Fix long-distance conditional branches in head.S for ↵Dave Martin2010-11-301-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Thumb-2. The 32-bit conditional branches in Thumb-2 have a shorter range (+/-512K) than their ARM counterparts (+/-32MB). The linker does not currently generate trampolines to extend the range of these Thumb-2 conditional branches, resulting in link errors when vmlinux is sufficiently large, e.g.: head.o:(.text+0x464): relocation truncated to fit: R_ARM_THM_JUMP19 This patch forces the longer-range, unconditional branch encoding by use of an explicit IT instruction. The resulting branches are triggered on the same conditions as before. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 6500/1: Thumb-2: Correct data alignment for CONFIG_THUMB2_KERNEL in ↵Dave Martin2010-11-301-0/+4
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | kernel/head.S Directives such as .long and .word do not magically cause the assembler location counter to become aligned in gas. As a result, using these directives in code sections can result in misaligned data words when building a Thumb-2 kernel (CONFIG_THUMB2_KERNEL). This is a Bad Thing, since the ABI permits the compiler to assume that fundamental types of word size or above are word- aligned when accessing them from C. If the data is not really word-aligned, this can cause impaired performance and stray alignment faults in some circumstances. In general, the following rules should be applied when using data word declaration directives inside code sections: * .quad and .double: .align 3 * .long, .word, .single, .float: .align (or .align 2) * .short: No explicit alignment required, since Thumb-2 instructions are always 2 or 4 bytes in size. immediately after an instruction. Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* arm: use addruart macro to establish debug mappingsJeremy Kerr2010-10-201-4/+19
| | | | | | | | | | | | | Since we can get both physical and virtual addresses from the addruart macro, we can use this to establish the debug mappings. In the case of CONFIG_DEBUG_ICEDCC, we don't need any mappings, but may still need to setup r7 correctly. Incorporating ASM changes from Nicolas Pitre <npitre@fluxnic.net>. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
* Merge branch 'hotplug' into develRussell King2010-10-181-111/+139
|\ | | | | | | | | Conflicts: arch/arm/kernel/head-common.S
| * ARM: add register documentation for __enable_mmuRussell King2010-10-081-0/+10
| | | | | | | | | | | | | | Add some additional documentation on register usage in __enable_mmu to help complete the overall picture. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: hotplug cpu: move secondary_startup, __enable_mmu to cpuinitRussell King2010-10-081-102/+104
| | | | | | | | | | | | | | | | Move these two functions, both of which are required for secondary CPU booting, into the cpuinit section. Ensure bad processors call __error_p for better diagnostics, rather than just __error. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: hotplug cpu: ensure that __enable_mmu is identity mappedRussell King2010-10-081-9/+24
| | | | | | | | | | | | | | | | | | | | | | __enable_mmu is required to be executed in an identity mapped region to ensure that variances in CPUs do not cause a crash. We currently achieve this by assuming that it will be co-located with __create_page_tables. With hotplug CPU support, this assumption becomes invalid. Implement a better solution which ensures that it will be appropriately mapped no matter where it is placed. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: cleanup boot cpu calling __mmap_switchedRussell King2010-10-081-1/+2
| | | | | | | | | | | | | | This allows us to relocate __mmap_switched and associated data away from the head section. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: Allow SMP kernels to boot on UP systemsRussell King2010-10-041-0/+50
|/ | | | | | | | | | | | | | UP systems do not implement all the instructions that SMP systems have, so in order to boot a SMP kernel on a UP system, we need to rewrite parts of the kernel. Do this using an 'alternatives' scheme, where the kernel code and data is modified prior to initialization to replace the SMP instructions, thereby rendering the problematical code ineffectual. We use the linker to generate a list of 32-bit word locations and their replacement values, and run through these replacements when we detect a UP system. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: convert to use __HEAD and HEAD_TEXT macros.Tim Abbott2009-11-231-1/+1
| | | | | | | | | | | | | | This has the consequence of changing the section name used for head code from ".text.head" to ".head.text". Since this commit changes all users in the architecture, this change should be harmless. The .text.head output section is eliminated and the head text code is included at the start of the .init output section. Signed-off-by: Tim Abbott <tabbott@ksplice.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Thumb-2: Implementation of the unified start-up and exceptions codeCatalin Marinas2009-07-241-11/+17
| | | | | | | This patch implements the ARM/Thumb-2 unified kernel start-up and exception handling code. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* [ARM] 5227/1: Add the ENDPROC declarations to the .S filesCatalin Marinas2008-09-011-6/+6
| | | | | | | | | This declaration specifies the "function" type and size for various assembly functions, mainly needed for generating the correct branch instructions in Thumb-2. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
OpenPOWER on IntegriCloud