summaryrefslogtreecommitdiffstats
path: root/arch/arm/kernel/Makefile
Commit message (Collapse)AuthorAgeFilesLines
* ARM: pm: add generic CPU suspend/resume supportRussell King2011-02-221-0/+1
| | | | | | | | | | | This adds core support for saving and restoring CPU coprocessor registers for suspend/resume support. This contains support for suspend with ARM920, ARM926, SA11x0, PXA25x, PXA27x, PXA3xx, V6 and V7 CPUs. Tested on Assabet and Tegra 2. Tested-by: Colin Cross <ccross@android.com> Tested-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'devel-stable' into develRussell King2011-01-061-0/+1
|\ | | | | | | | | | | Conflicts: arch/arm/mach-pxa/clock.c arch/arm/mach-pxa/clock.h
| * Merge branch 'devel' of ↵Russell King2010-12-221-0/+1
| |\ | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into devel-stable
| | * ARM: pxa: add iwmmx support for PJ4Haojian Zhuang2010-12-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | iwmmxt is used in XScale, XScale3, Mohawk and PJ4 core. But the instructions of accessing CP0 and CP1 is changed in PJ4. Append more files to support iwmmxt in PJ4 core. Signed-off-by: Zhou Zhu <zzhu3@marvell.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Acked-by: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* | | Merge branch 'misc' into develRussell King2011-01-061-1/+3
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/Kconfig arch/arm/common/Makefile arch/arm/kernel/Makefile arch/arm/kernel/smp.c
| * \ \ Merge branch 'smp' into miscRussell King2011-01-061-1/+1
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/kernel/entry-armv.S arch/arm/mm/ioremap.c
| | * | | ARM: SMP: split out software TLB maintainence broadcastingRussell King2010-12-201-1/+1
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | smp.c is becoming too large, so split out the TLB maintainence broadcasting into a separate smp_tlb.c file. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: always build swp_emulate as ARMv7Russell King2010-11-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | swp_emulate is only used on ARMv7+, and includes ARMv7+ assembly instructions. Allow the assembler to accept ARMv7 instructions, but leave the compiler's code generation options alone. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 6396/1: Add SWP/SWPB emulation for ARMv7 processorsLeif Lindholm2010-11-041-0/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SWP instruction was deprecated in the ARMv6 architecture, superseded by the LDREX/STREX family of instructions for load-linked/store-conditional operations. The ARMv7 multiprocessing extensions mandate that SWP/SWPB instructions are treated as undefined from reset, with the ability to enable them through the System Control Register SW bit. This patch adds the alternative solution to emulate the SWP and SWPB instructions using LDREX/STREX sequences, and log statistics to /proc/cpu/swp_emulation. To correctly deal with copy-on-write, it also modifies cpu_v7_set_pte_ext to change the mappings to priviliged RO when user RO. Signed-off-by: Leif Lindholm <leif.lindholm@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Kirill A. Shutemov <kirill@shutemov.name> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | ARM: sched_clock: provide common infrastructure for sched_clock()Russell King2010-12-221-0/+1
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide common sched_clock() infrastructure for platforms to use to create a 64-bit ns based sched_clock() implementation from a counter running at a non-variable clock rate. This implementation is based upon maintaining an epoch for the counter and an epoch for the nanosecond time. When we desire a sched_clock() time, we calculate the number of counter ticks since the last epoch update, convert this to nanoseconds and add to the epoch nanoseconds. We regularly refresh these epochs within the counter wrap interval. We perform a similar calculation as above, and store the new epochs. We read and write the epochs in such a way that sched_clock() can easily (and locklessly) detect when an update is in progress, and repeat the loading of these constants when they're known not to be stable. The one caveat is that sched_clock() is not called in the middle of an update. We achieve that by disabling IRQs. Finally, if the clock rate is known at compile time, the counter to ns conversion factors can be specified, allowing sched_clock() to be tightly optimized. We ensure that these factors are correct by providing an initialization function which performs a run-time check. Acked-by: Peter Zijlstra <peterz@infradead.org> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Will Deacon <will.deacon@arm.com> Tested-by: Mikael Pettersson <mikpe@it.uu.se> Tested-by: Eric Miao <eric.y.miao@gmail.com> Tested-by: Olof Johansson <olof@lixom.net> Tested-by: Jamie Iles <jamie@jamieiles.com> Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: ftrace: function graph tracer supportTim Bird2010-11-191-1/+2
|/ | | | | | | | Cc: Tim Bird <tim.bird@am.sony.com> [rabin@rab.in: rebase on top of latest code, keep code in ftrace.c instead of separate file, check for ftrace_graph_entry also] Signed-off-by: Rabin Vincent <rabin@rab.in>
* ARM: 6358/1: hw-breakpoint: add HAVE_HW_BREAKPOINT to KconfigWill Deacon2010-09-081-0/+1
| | | | | | | | | | If we're targetting a v6 or v7 core and have at least software perf events available, then automatically add support for hardware breakpoints. Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: S. Karthikeyan <informkarthik@gmail.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'devel-stable' into develRussell King2010-07-311-1/+3
|\ | | | | | | | | | | | | Conflicts: arch/arm/kernel/entry-armv.S arch/arm/kernel/setup.c arch/arm/mm/init.c
| * ARM: deprecate support for old way to pass kernel parametersUwe Kleine-König2010-07-071-1/+3
| | | | | | | | | | | | | | | | | | This was deprecated in 2001 and announced to live on for 5 years. For now provide a kernel parameter for those who still need it. Acked-by: Eric Miao <eric.miao@canonical.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
* | ARM: 6120/1: kdump: implement copy_oldmem_page()Mika Westerberg2010-07-091-0/+1
|/ | | | | | | | This function is used by vmcore code to read a page from the old kernel memory. Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'misc2' into develRussell King2010-02-251-0/+1
|\
| * ARM: move LED support code out of arch/arm/kernel/time.cRussell King2010-02-151-0/+1
| | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 5902/4: arm/perfevents: implement perf event support for ARMv6Jamie Iles2010-02-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements support for ARMv6 performance counters in the Linux performance events subsystem. ARMv6 architectures that have the performance counters should enable HW_PERF_EVENTS to get hardware performance events support in addition to the software events. Note: only ARM Ltd ARM cores are supported. This implementation also provides an ARM PMU abstraction layer to allow ARMv7 and others to be supported in the future by adding new a 'struct arm_pmu'. Cc: Jean Pihet <jpihet@mvista.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 5899/2: arm: provide a mechanism to reserve performance countersJamie Iles2010-02-121-0/+1
|/ | | | | | | | | | To add support for perf events and to allow the hardware counters to be shared with oprofile, we need a way to reserve access to the pmu (performance monitor unit). Platforms with PMU interrupts should register the interrupts in arch/arm/kernel/pmu.c Signed-off-by: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'devel' of ↵Russell King2009-12-131-0/+2
|\ | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into devel
| * ARM: 5841/1: a driver for on-chip ETM and ETBAlexander Shishkin2009-12-021-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver implements support for on-chip Embedded Tracing Macrocell and Embedded Trace Buffer. It allows to trigger tracing of kernel execution flow and exporting trace output to userspace via character device and a sysrq combo. Trace output can then be decoded by a fairly simple open source tool [1] which is already sufficient to get the idea of what the kernel is doing. [1]: http://github.com/virtuoso/etm2human Signed-off-by: Alexander Shishkin <virtuoso@slind.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: Add an earlyprintk debug consoleCatalin Marinas2009-12-091-0/+1
|/ | | | | | | | | | | | This patch allows an earlyprintk console if CONFIG_DEBUG_LL is enabled, using the printch asm function. The patch is based on the original work by Sascha Hauer. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Pavel Machek <pavel@ucw.cz>
* Merge branch 'origin' into for-linusRussell King2009-09-241-1/+2
|\ | | | | | | | | Conflicts: MAINTAINERS
| * arm, cris, mips, sparc, powerpc, um, xtensa: fix build with bash 4.0Sam Ravnborg2009-09-201-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Albin Tonnerre <albin.tonnerre@free-electrons.com> reported: Bash 4 filters out variables which contain a dot in them. This happends to be the case of CPPFLAGS_vmlinux.lds. This is rather unfortunate, as it now causes build failures when using SHELL=/bin/bash to compile, or when bash happens to be used by make (eg when it's /bin/sh) Remove the common definition of CPPFLAGS_vmlinux.lds by pushing relevant stuff to either Makefile.build or the arch specific kernel/Makefile where we build the linker script. This is also nice cleanup as we move the information out where it is used. Notes for the different architectures touched: arm - we use an already exported symbol cris - we use a config symbol aleady available [Not build tested] mips - the jiffies complexity has moved to vmlinux.lds.S where we need it. Added a few variables to CPPFLAGS - they are only used by the linker script. [Not build tested] powerpc - removed assignment that is not needed [not build tested] sparc - simplified it using $(BITS) um - introduced a few new exported variables to deal with this xtensa - added options to CPP invocation [not build tested] Cc: Albin Tonnerre <albin.tonnerre@free-electrons.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Mikael Starvik <starvik@axis.com> Cc: Jesper Nilsson <jesper.nilsson@axis.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Jeff Dike <jdike@addtoit.com> Cc: Chris Zankel <chris@zankel.net> Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
* | ARM: 5580/2: ARM TCM (Tightly-Coupled Memory) support v3Linus Walleij2009-09-151-0/+1
|/ | | | | | | | | | | | | This adds the TCM interface to Linux, when active, it will detect and report TCM memories and sizes early in boot if present, introduce generic TCM memory handling, provide a generic TCM memory pool and select TCM memory for the U300 platform. See the Documentation/arm/tcm.txt for documentation. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5613/1: implement CALLER_ADDRESSxUwe Kleine-König2009-07-211-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | From: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> As __builtin_return_address(n) doesn't work for ARM with n > 0, the kernel needs its own implementation. This fixes many warnings saying: warning: unsupported argument to '__builtin_return_address' The new methods and walk_stackframe must not be instrumented because CALLER_ADDRESSx is used in the various tracers and tracing the tracer is a bad idea. What's currently missing is an implementation using unwind tables. This is not fatal though, it's just that the tracers don't get enough information to be really useful. Note that if both ARM_UNWIND and FRAME_POINTER are enabled, walk_stackframe uses unwind information. So in this case the same implementation is used as when FRAME_POINTER is disabled. Cc: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] smp: allow re-use of realview localtimer TWD supportRussell King2009-05-171-0/+1
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] smp: separate SCU support code from realviewRussell King2009-05-171-0/+1
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: add iWMMXt support for pxa168Eric Miao2009-03-231-0/+1
| | | | Signed-off-by: Eric Miao <eric.miao@marvell.com>
* [ARM] 5386/2: unwind: Add Makefile and Kconfig entries for ARM stack unwindingCatalin Marinas2009-02-191-0/+1
| | | | | | | | | This patch also makes the frame pointer default to y only if !ARM_UNWIND. LOCKDEP no longer selects FRAME_POINTER if ARM_UNWIND is enabled. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Improve non-executable supportRussell King2008-10-011-1/+1
| | | | | | | | | Add support for detecting non-executable stack binaries, and adjust permissions to prevent execution from data and stack areas. Also, ensure that READ_IMPLIES_EXEC is enabled for older CPUs where that is true, and for any executable-stack binary. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* kgdb: support for ARCH=armJason Wessel2008-07-231-0/+1
| | | | | | | | | | | | | | | | | | This patch adds the ARCH=arm specific a kgdb backend, originally written by Deepak Saxena <dsaxena@plexity.net> and George Davis <gdavis@mvista.com>. Geoff Levand <geoffrey.levand@am.sony.com>, Nicolas Pitre, Manish Lachwani, and Jason Wessel have contributed various fixups here as well. The KGDB patch makes one change to the core ARM architecture such that the traps are initialized early for use with the debugger or other subsystems. [ mingo@elte.hu: small cleanups. ] [ ben-linux@fluff.org: fixed early_trap_init ] Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Acked-by: Deepak Saxena <dsaxena@plexity.net>
* ftrace: core support for ARMAbhishek Sagar2008-06-021-0/+5
| | | | | | | | Core ftrace support for the ARM architecture, which includes support for dynamic function tracing. Signed-off-by: Abhishek Sagar <sagar.abhishek@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* Merge branch 'merge-fixes' into develRussell King2008-04-191-1/+1
|\
| * Generic semaphore implementationMatthew Wilcox2008-04-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | Semaphores are no longer performance-critical, so a generic C implementation is better for maintainability, debuggability and extensibility. Thanks to Peter Zijlstra for fixing the lockdep warning. Thanks to Harvey Harrison for pointing out that the unlikely() was unnecessary. Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Acked-by: Ingo Molnar <mingo@elte.hu>
* | ARMv7: Add support for the ThumbEE state saving/restoringCatalin Marinas2008-04-181-0/+1
|/ | | | | | | This patch adds the detection and handling of the ThumbEE extension on ARMv7 CPUs. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* [ARM] 4736/1: Export atags to userspace and allow kexec to use customised atagsRichard Purdie2008-02-041-0/+1
| | | | | | | | | | | | | | | | | | | | Currently, the atags used by kexec are fixed to the ones originally used to boot the kernel. This is less than ideal as changing the commandline, initrd and other options would be a useful feature. This patch exports the atags used for the current kernel to userspace through an "atags" file in procfs. The presence of the file is controlled by its own Kconfig option and cleans up several ifdef blocks into a separate file. The tags for the new kernel are assumed to be at a fixed location before the kernel image itself. The location of the tags used to boot the original kernel is unimportant and no longer saved. Based on a patch from Uli Luckas <u.luckas@road.de> Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Acked-by: Uli Luckas <u.luckas@road.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM kprobes: core codeAbhishek Sagar2008-01-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | This is a full implementation of Kprobes including Jprobes and Kretprobes support. This ARM implementation does not follow the usual kprobes double- exception model. The traditional model is where the initial kprobes breakpoint calls kprobe_handler(), which returns from exception to execute the instruction in its original context, then immediately re-enters after a second breakpoint (or single-stepping exception) into post_kprobe_handler(), each time the probe is hit.. The ARM implementation only executes one kprobes exception per hit, so no post_kprobe_handler() phase. All side-effects from the kprobe'd instruction are resolved before returning from the initial exception. As a result, all instructions are _always_ effectively boosted regardless of the type of instruction, and even regardless of whether or not there is a post-handler for the probe. Signed-off-by: Abhishek Sagar <sagar.abhishek@gmail.com> Signed-off-by: Quentin Barnes <qbarnes@gmail.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* ARM kprobes: instruction single-stepping supportQuentin Barnes2008-01-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the code implementing instruction single-stepping for kprobes on ARM. To get around the limitation of no Next-PC and no hardware single- stepping, all kprobe'd instructions are split into three camps: simulation, emulation, and rejected. "Simulated" instructions are those instructions which behavior is reproduced by straight C code. "Emulated" instructions are ones that are copied, slightly altered and executed directly in the instruction slot to reproduce their behavior. "Rejected" instructions are ones that could be simulated, but work hasn't been put into simulating them. These instructions should be very rare, if not unencountered, in the kernel. If ever needed, code could be added to simulate them. One might wonder why this and the ptrace singlestep facility are not sharing some code. Both approaches are fundamentally different because the ptrace code regains control after the stepped instruction by installing a breakpoint after the instruction itself, and possibly at the location where the instruction might be branching to, instead of simulating or emulating the target instruction. The ptrace approach isn't suitable for kprobes because the breakpoints would have to be moved back, and the icache flushed, everytime the probe is hit to let normal code execution resume, which would have a significant performance impact. It is also racy on SMP since another CPU could, with the right timing, sail through the probe point without being caught. Because ptrace single-stepping always result in a different process to be scheduled, the concern for performance is much less significant. On the other hand, the kprobes approach isn't (currently) suitable for ptrace because it has no provision for proper user space memory protection and translation, and even if that was implemented, the gain wouldn't be worth the added complexity in the ptrace path compared to the current approach. So, until kprobes does support user space, both kprobes and ptrace are best kept independent and separate. Signed-off-by: Quentin Barnes <qbarnes@gmail.com> Signed-off-by: Abhishek Sagar <sagar.abhishek@gmail.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Add stacktrace support and make oprofile use itRussell King2007-04-281-2/+2
| | | | | | | | Add support for stacktrace. Use the new stacktrace code with oprofile instead of it's version; there's no point having multiple versions of stacktracing in the kernel. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2007-02-191-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (117 commits) [ARM] 4058/2: iop32x: set ->broken_parity_status on n2100 onboard r8169 ports [ARM] 4140/1: AACI stability add ac97 timeout and retries [ARM] 4139/1: AACI record support [ARM] 4138/1: AACI: multiple channel support for IRQ handling [ARM] 4211/1: Provide a defconfig for ns9xxx [ARM] 4210/1: base for new machine type "NetSilicon NS9360" [ARM] 4222/1: S3C2443: Remove reference to missing S3C2443_PM [ARM] 4221/1: S3C2443: DMA support [ARM] 4220/1: S3C24XX: DMA system initialised from sysdev [ARM] 4219/1: S3C2443: DMA source definitions [ARM] 4218/1: S3C2412: fix CONFIG_CPU_S3C2412_ONLY wrt to S3C2443 [ARM] 4217/1: S3C24XX: remove the dma channel show at startup [ARM] 4090/2: avoid clash between PXA and SA1111 defines [ARM] 4216/1: add .gitignore entries for ARM specific files [ARM] 4214/2: S3C2410: Add Armzone QT2410 [ARM] 4215/1: s3c2410 usb device: per-platform vbus_draw [ARM] 4213/1: S3C2410 - Update definition of ADCTSC_XY_PST [ARM] 4098/1: ARM: rtc_lock only used with rtc_cmos [ARM] 4137/1: Add kexec support [ARM] 4201/1: SMP barriers pair needed for the secondary boot process ... Fix up conflict due to typedef removal in sound/arm/aaci.h
| * [ARM] 4137/1: Add kexec supportRichard Purdie2007-02-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add kexec support to ARM. Improvements like commandline handling could be made but this patch gives basic functional support. It uses the next available syscall number, 347. Once the syscall number is known, userspace support will be finalised/submitted to kexec-tools, various patches already exist. Originally based on a patch by Maxim Syrchin but updated and forward ported by various people. Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [APM] ARM: Convert to use shared APM emulation.Ralf Baechle2007-02-091-1/+0
|/ | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [ARM] 3881/4: xscale: clean up cp0/cp1 handlingLennert Buytenhek2006-12-031-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | XScale cores either have a DSP coprocessor (which contains a single 40 bit accumulator register), or an iWMMXt coprocessor (which contains eight 64 bit registers.) Because of the small amount of state in the DSP coprocessor, access to the DSP coprocessor (CP0) is always enabled, and DSP context switching is done unconditionally on every task switch. Access to the iWMMXt coprocessor (CP0/CP1) is enabled only when an iWMMXt instruction is first issued, and iWMMXt context switching is done lazily. CONFIG_IWMMXT is supposed to mean 'the cpu we will be running on will have iWMMXt support', but boards are supposed to select this config symbol by hand, and at least one pxa27x board doesn't get this right, so on that board, proc-xscale.S will incorrectly assume that we have a DSP coprocessor, enable CP0 on boot, and we will then only save the first iWMMXt register (wR0) on context switches, which is Bad. This patch redefines CONFIG_IWMMXT as 'the cpu we will be running on might have iWMMXt support, and we will enable iWMMXt context switching if it does.' This means that with this patch, running a CONFIG_IWMMXT=n kernel on an iWMMXt-capable CPU will no longer potentially corrupt iWMMXt state over context switches, and running a CONFIG_IWMMXT=y kernel on a non-iWMMXt capable CPU will still do DSP context save/restore. These changes should make iWMMXt work on PXA3xx, and as a side effect, enable proper acc0 save/restore on non-iWMMXt capable xsc3 cores such as IOP13xx and IXP23xx (which will not have CONFIG_CPU_XSCALE defined), as well as setting and using HWCAP_IWMMXT properly. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Add Integrator support for glibc outb() and friendsRussell King2006-08-281-2/+1
| | | | | | | Add the necessary call to register_isa_ports() so that glibc knows where these are found on Integrator platforms. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3707/1: iwmmxt: use the generic thread notifier infrastructureLennert Buytenhek2006-07-011-1/+1
| | | | | | | | | | | Patch from Lennert Buytenhek This patch makes the iWMMXt context switch hook use the generic thread notifier infrastructure that was recently merged in commit d6551e884cf66de072b81f8b6d23259462c40baf. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3370/2: ep93xx: add crunch supportLennert Buytenhek2006-06-281-0/+3
| | | | | | | | | Patch from Lennert Buytenhek Add the necessary kernel bits for crunch task switching. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] nommu: trivial fixups for head-nommu.S and the MakefileHyok S. Choi2006-04-241-1/+1
| | | | | | | | This patch fix compilation problem of start-up codes. (head-nommu.S, arch/arm/kernel/Makefile) Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3109/1: old ABI compat: syscall wrappers for ABI impedance matchingNicolas Pitre2006-01-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre The difference between EABI and the legacy ABI may affect either structure member alignment and/or argument register selection. The patch has the details. Included are wrappers for the following syscalls: sys_stat64 sys_lstat64 sys_fstat64 sys_fcntl64 sys_epoll_ctl sys_epoll_wait sys_ipc sys_semop sys_semtimedop sys_pread64 sys_pwrite64 sys_truncate64 sys_ftruncate64 sys_readahead Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Refine selection of ISA_DMA_API and generic dma.c codeRussell King2006-01-041-1/+2
| | | | | | | | | | | | ISA_DMA_API tells the rest of the kernel if the ISA DMA API is available. Select this symbol only on machine types which make use of the ISA DMA API. Make building of arch/arm/kernel/dma.c depend on this symbol - if a machine does not support the ISA DMA API, it's pointless building this file. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
OpenPOWER on IntegriCloud