| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | ARM: tegra: move serial clock-frequency attr into the Tegra30 dtsi | Stephen Warren | 2013-01-28 | 1 | -1/+0 |
| | | | | | | | | | No Tegra30 Platform is running PLL_P at another rate than 408MHz, nor is any using any other PLL as UART source clock. Move attribute into SoC level dtsi file to slim down board DT files. Signed-off-by: Stephen Warren <swarren@nvidia.com> | ||||
| * | ARM: DT: tegra: Add Tegra30 Beaver board support | Bryan Wu | 2013-01-28 | 1 | -0/+374 |
| This patch adds support for Tegra30 Beaver board in upstream kernel. Beaver board is a Tegra30 SoC based development board, it has following features: - T30 or T33 SoC (Qual core ARM Cortex A9) - 2 GB DDR3L - 16 GB EMMC - 1 SD slot - 1 USB Standart A port and 1 USB micro AB port - PCI-E Gig Ethernet - Audio input/output - SATA port - HDMI output - UART and JTAG Signed-off-by: Bryan Wu <pengw@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> | |||||
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