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* ARM: tegra: Add SPI controller nodes for Tegra124Thierry Reding2013-12-161-0/+90
| | | | | | | | The SPI controllers on Tegra124 are compatible with those found on the Tegra114 SoC. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: add default pinctrl nodes for Venice2Laxman Dewangan2013-12-161-0/+1
| | | | | | | | Add the default pinmux configuration for the Tegra124 based Venice2 platform. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: Add Tegra124 PWM supportThierry Reding2013-12-161-0/+10
| | | | | | | | | The PWM controller on Tegra124 is the same as the one on earlier SoC generations. Signed-off-by: Thierry Reding <treding@nvidia.com> [swarren, added reset properties] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: add audio-related device to Tegra124 DTStephen Warren2013-12-161-0/+103
| | | | | | | | | Tegra124 contains a similar set of audio devices to previous Tegra chips. Specifically, there is an AHUB device which contains DMA FIFOs and audio routing, and which hosts various audio-related components such as I2S controllers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: add I2C controllers to Tegra124 DTStephen Warren2013-12-161-0/+90
| | | | | | | Tegra124 has 6 I2C controllers. The first 5 have identical configuration to Tegra114, but the sixth obviously has different interrupt/... IDs. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: add MMC controllers to Tegra124 DTStephen Warren2013-12-161-0/+40
| | | | | | | | | | | | | | Tegra124 has 4 MMC controllers just like previous versions of the SoC. Note that there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. Also enable the relevant controllers in the Venice2 board DT. power-gpios property suggested by Thierry Reding. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: add Tegra124 pinmux node to DTStephen Warren2013-12-161-0/+6
| | | | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked by: Laxman Dewangan <ldewangan@nvidia.com>
* ARM: tegra: add APB DMA controller to Tegra124 DTStephen Warren2013-12-161-0/+51
| | | | | | | | | Instantiate the APB DMA controller in the Tegra124 DT, and add all DMA-related properties to other DT nodes that rely on (reference) the DMA controller's node. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: add reset properties to Tegra124 DTsStephen Warren2013-12-161-0/+11
| | | | | | | | | The DT bindings now require module resets to be specified. The earlier patches which added these nodes were originally written before that requirement. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: add clock properties for devices of Tegra124Joseph Lo2013-12-161-0/+16
| | | | | | | | | This patch adds clock properties for devices in the DT for basic support of Tegra124 SoC. Signed-off-by: Joseph Lo <josephl@nvidia.com> [swarren, added missing unit address to "clock" node] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: add GPIO controller to tegra124.dtsiStephen Warren2013-10-151-0/+18
| | | | | | | | The Tegra124 GPIO controller is identical to Tegra30, so copy the DT node from tegra30.dtsi to tegra124.dtsi. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: enable Tegra RTC as default for Tegra124Joseph Lo2013-10-111-1/+0
| | | | | | | This patch makes the Tegra RTC enabled as default for Tegra124 platform. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: Add initial device tree for Tegra124Joseph Lo2013-10-081-0/+132
Initial support for Tegra 124 SoC. This is expected to be included in the board DTS files. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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