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* ARM: dts: r8a77470: Add QSPI supportFabrizio Castro2018-11-281-0/+32
| | | | | | | Add QSPI[01] support to the RZ/G1C SoC specific device tree. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a77470: Add CMT SoC specific supportBiju Das2018-11-281-0/+32
| | | | | | | | Add CMT[01] support to r8a77470 SoC DT. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a77470: Add USB-DMAC device nodesBiju Das2018-11-281-0/+56
| | | | | | | | This patch adds USB DMAC nodes. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a77470: Add watchdog support to SoC dtsiBiju Das2018-11-281-0/+10
| | | | | | | | | This patch adds watchdog support to the r8a77470 SoC dtsi. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> [simon: moved node to preserve sort order] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a77470: Add SDHI1 supportFabrizio Castro2018-11-281-0/+11
| | | | | | | | | | | | | | | | | | Althought interface SDHI1 found on the RZ/G1C SoC (a.k.a. r8a77470) is compatible with the R-Car Gen3 ones, its OF compatibility is restricted to the SoC specific compatible string to avoid confusion, as from a more generic perspective the RZ/G1C is sharing the most similarities with the R-Car Gen2 family of SoCs, and there is a combination of R-Car Gen2 compatible SDHI IPs and R-Car Gen3 compatible SDHI IP on this specific chip. This patch adds the SoC specific part of SDHI1 support, and since SDHI1 comes with internal DMA, its DT node looks fairly different from SDHI0 and SDHI2. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a77470: Add SDHI0 supportFabrizio Castro2018-11-281-1/+16
| | | | | | | | | | | | | | | | | RZ/G1C comes with two different types of IP for the SDHI interfaces, SDHI0 and SDHI2 share the same IP type, and such an IP is also compatible with the one found in R-Car Gen2. SDHI1 IP on the other hand is compatible with R-Car Gen3 with internal DMA. This patch completes the SDHI support of the R-Car Gen2 compatible IPs, including fixing the max-frequency definition of SDHI2, as it turns out there is a bug in Section 1.3.9 of the RZ/G1C Hardware User's Manual (Rev. 1.00 Oct. 2017). Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a77470: Add I2C[0123] supportFabrizio Castro2018-11-281-0/+64
| | | | | | | | | | Add device tree nodes for the I2C[0123] controllers. Also, add the aliases node. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a77470: Add I2C4 supportFabrizio Castro2018-09-281-0/+14
| | | | | | | | | | | Add I2C4 support to RZ/G1C (a.k.a. r8a77470) SoC specific device tree. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a77470: Add SDHI2 supportFabrizio Castro2018-09-281-0/+15
| | | | | | | | | Add SoC specific device tree definitions for the SDHI2 interface. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a77470: Add SMP supportFabrizio Castro2018-09-281-0/+16
| | | | | | | | | | Add DT node for the Advanced Power Management Unit (APMU), add the second CPU core, and use "renesas,apmu" as "enable-method". Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a77470: Add GPIO supportBiju Das2018-08-271-0/+91
| | | | | | | | | Describe GPIO blocks in the R8A77470 device tree. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a77470: Add PFC supportBiju Das2018-08-271-0/+5
| | | | | | | | | Define the generic R8A77470 part of the PFC device node. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a77470: Use r8a77470-sysc binding definitionsBiju Das2018-08-271-13/+14
| | | | | | | | | Replace the hardcoded power domain indices by R8A77470_PD_* symbols. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a77470: Use r8a77470-cpg-mssr binding definitionsGeert Uytterhoeven2018-07-231-8/+8
| | | | | | | | Replace the hardcoded clock indices by R8A77470_CLK_* symbols. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a77470: Add EtherAVB supportBiju Das2018-04-301-0/+13
| | | | | | | | Define the generic R8A77470 part of the EtherAVB device node. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a77470: Add SCIF DMA supportBiju Das2018-04-251-0/+18
| | | | | | | | | Add SCIF DMA support for R8A77470 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a77470: Add SCIF supportBiju Das2018-04-251-2/+67
| | | | | | | | | | | Describe SCIF ports in the R8A77470 device tree. Also it fixes the CPG clock index ZS from 6 to 5. Fixes: 6929dfc5918049 ("ARM: dts: r8a77470: Initial SoC device tree") Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a77470: Add IRQC supportBiju Das2018-04-251-0/+20
| | | | | | | | | Describe the IRQC interrupt controller in the R8A77470 device tree. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a77470: Add SYS-DMAC supportBiju Das2018-04-251-0/+66
| | | | | | | | | Describe SYS-DMAC0/1 in the R8A77470 device tree. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a77470: Initial SoC device treeBiju Das2018-04-161-0/+154
The initial R8A77470 SoC device tree including CPU0, GIC, timer, SYSC, RST, CPG, and the required clock descriptions. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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