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* ARM: dts: imx25-pinfunc: Always set SION for eSDHC CMDBenoît Thébaudeau2018-02-121-7/+11
| | | | | | | | | | | | | | | | | | The eSDHC does not work properly if the SION bit is not set for the bidirectional CMD signal, whatever the eSDHC instance and the selected pad. Therefore, setting SION is mandatory for all eSDHC CMD ports. Do this for MX25_PAD_*__ESDHCn_CMD in imx25-pinfunc.h in order to enforce this behavior for all boards. This had already been done for eSDHC1, but not for eSDHC2. Also, define MX25_PAD_FEC_MDC__ESDHC2_CMD so that all the possible cases are covered from now on. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx25-pinfunc: Use consistent naming for eSDHCBenoît Thébaudeau2018-02-121-24/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | This file had several naming inconsistencies for eSDHC: - the instances were named sometimes SDn, sometimes SDHCn, whereas they are named ESDHCn in the reference manual, e.g.: MX25_PAD_SD1_CMD__SD1_CMD MX25_PAD_D15__SDHC1_DAT7 - the data ports were named sometimes DATAn, sometimes DATn like in the reference manual, e.g.: MX25_PAD_SD1_DATA0__SD1_DATA0 MX25_PAD_D15__SDHC1_DAT7 - in one case, the clock port was named DAT_CLK instead of CLK: MX25_PAD_CSI_D7__SDHC2_DAT_CLK This change: - introduces new definitions using the naming from the reference manual, - keeps definitions using the legacy naming in order not to break compatibility for out-of-tree users (they can be removed later), - updates the in-tree files that were using the legacy naming. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx25-pinfunc: Move MX25_PAD_TDO__TDO to a more sensible placeUwe Kleine-König2017-04-101-2/+2
| | | | | | | | | | The pinfunc definitions are ordered by mux_reg and so automatically by conf_reg, too. PAD_TDO is the only pad that has a conf_reg but no mux_reg. Put it to the place where it its in the order of conf_regs instead of the top. Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx25-pinfunc: remove duplicate definitionUwe Kleine-König2017-04-101-1/+0
| | | | | | | | This was introduced in commit 18e2b50407fb ("ARM: dts: imx25-pinfunc: more defines"). Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: imx25-pinfunc: remove SION from all modesUwe Kleine-König2016-06-151-309/+309
| | | | | | | | | | | | | | | | | | | | | | With the SION bit set a pin can be read as GPIO even though it's not muxed as GPIO. This is useful at times. The downside however is that the signal is not only routed to the GPIO IP but also all other IPs that can make use of the pin. This resulted in more than one issue for me in the past. Things like spi transfers that result in usb reenumeration or setting a GPIO to a value that triggers an RTS irq for an UART. This convinces me that the SION bit does more harm than good and so all SION bits are removed that are not known to be needed. Note that this has no influence on GPIOs under Linux as the gpio-mxc driver just reports the level the pin is driven to for outputs and not the level as seen on the pin. If this commit introduces a regression for you, please report which SION bit is essential for your setup. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: imx25-pinfunc: document SION being important for MX25_PAD_SD1_CMD__SD1_CMDUwe Kleine-König2016-06-151-0/+9
| | | | | Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx25-pinfunc: remove SION for pins with an UART handshaking input ↵Uwe Kleine-König2016-04-131-59/+59
| | | | | | | | | | | | | | | | | | mode With SION set the level on such a pin is reported to the UART. So for example when the CS5 pin is configured for GPIO mode and the level changes this triggers an RTS interrupt on uart5. Adding some severity to this issue: The imx uart driver currently doesn't handle correctly irqs for changes on RI and DCD which are enabled automatically when the respective UART is driven in DTE mode (that is, has the fsl,dte-mode property set in the device tree). This results in a stuck machine because the irq isn't cleared and so stalls the CPU. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx25-pinfunc: add all UART mux modesUwe Kleine-König2016-04-131-8/+24
| | | | | | | | | Apart from a few additions this also contains two fixes where the daisy chain input selection register was missing. Moreover dropped _MUX from some pins for consistency. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx25-pinfunc: add some more pin configurationsUwe Kleine-König2015-12-221-0/+3
| | | | | | | | This patch adds some values that are needed for an out-of-tree device tree I'm currently working with. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx25-pinfunc: Add several pinfunctionsMarkus Pargmann2015-03-301-0/+29
| | | | | | | | | | | This patch adds some not yet defined pinfunctions. It also adds two comments about mistakes in the i.MX25 reference manual so it is easier to spot the difference between reference manual and pinfunction definitions. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx25-pinfunc: remove input values for pinfuncs without input registerMarkus Pargmann2015-03-301-7/+7
| | | | | | | | | input values are only useful for pin functions which define a input register. This patch removes all input values of pin functions which do not have an input configuration register. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx25-pinfunc: more definesUwe Kleine-König2015-03-301-5/+30
| | | | | | | | | | | | | Add some defines currently missing, fix ordering to make the list sorted by (mux_reg, mux_val), make sure pins are grouped by mux_reg. The same definitions are missing from the old pinmux header (arch/arm/mach-imx/iomux-mx25.h) but as only legacy machine support uses that and therefor the existing list is obviously good enough I didn't spend the effort to add the corresponding definitions there, too. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx25: fix some wrong iomux definitionsUwe Kleine-König2015-03-301-6/+6
| | | | | | | | Noticed while looking over the pad definitions. None of the bogus definitions is used in-tree. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx25-pinfunc: Add several pin configurationsMichael Grzeschik2014-09-161-2/+31
| | | | | | | | | | | | | | | | This patch adds pin configurations for: - csi aud6 - cspi1 uart3 - csi uart5 - cc - csi sdhc2 - csi cspi3 - sd1 cspi2 - cspi1 pwm Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: dts: imx25: Add pinctrl functions.Denis Carikli2014-02-091-0/+494
Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: devicetree@vger.kernel.org Cc: Sascha Hauer <kernel@pengutronix.de> Cc: linux-arm-kernel@lists.infradead.org Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Eric Bénard <eric@eukrea.com> Signed-off-by: Denis Carikli <denis@eukrea.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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