summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/pinctrl
Commit message (Collapse)AuthorAgeFilesLines
* pinctrl: mediatek: Modify pinctrl bindings for mt2701Biao Huang2016-01-071-4/+5
| | | | | | | Signed-off-by: Biao Huang <biao.huang@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Mathias Brugger <matthias.bgg@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge tag 'samsung-drivers-4.5' of ↵Linus Walleij2015-12-241-0/+1
|\ | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into devel Exynos-specific drivers for 4.5: 1. Add a pinctrl driver for Exynos5410.
| * pinctrl: exynos: add exynos5410 SoC specific dataHakjoo Kim2015-11-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Add Samsung EXYNOS5410 SoC specific data to enable pinctrl support for all platforms based on EXYNOS5410. Signed-off-by: Hakjoo Kim <ruppi.kim@hardkernel.com> [AF: Rebased onto Exynos5260, irq_chip consolidation, const'ification] Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Tested-by: Pavel Fedin <p.fedin@samsung.com> [k.kozlowski: Rebased on current v4.3] Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
* | pinctrl: sunxi: Add A80 special pin controllerMaxime Ripard2015-12-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Like the previous designs, the A80 has a special pin controller for the critical pins, like the PMIC bus. Add a driver for this controller. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> [wens: Add A80 compatible strings to bindings doc; fix pin function names based on v1.3 datasheet; constify of_device_id table] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: rockchip: add support for the rk3228Jeffy Chen2015-12-111-1/+2
| | | | | | | | | | | | | | | | | | | | The pinctrl of rk3228 is much the same as rk3288's, but without pmu. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: sunxi: Add H3 PIO controller supportJens Kuske2015-12-111-0/+1
| | | | | | | | | | | | | | | | | | | | The H3 uses the same pin controller as previous SoC's from Allwinner. Add support for the pins controlled by the main PIO controller. Signed-off-by: Jens Kuske <jenskuske@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Merge branch 'bcm-nsp' into develLinus Walleij2015-12-101-0/+80
|\ \
| * | pinctrl: Broadcom NSP GPIO-a device tree bindingsYendapally Reddy Dhananjaya Reddy2015-12-101-0/+80
| |/ | | | | | | | | | | | | Device tree binding documentation for Broadcom NSP GPIO-a Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yrdreddy@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: qcom: spmi-mpp: Add pm8994 mpp supportStephen Boyd2015-12-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | Update the driver and binding for pm8994-mpp devices. Cc: <devicetree@vger.kernel.org> Cc: "Ivan T. Ivanov" <iivanov@mm-sol.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Björn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: qcom: spmi-gpio: Add pm8994 gpio supportStephen Boyd2015-12-011-0/+2
| | | | | | | | | | | | | | | | | | | | | | Update the binding and driver for pm8994-gpio devices. Cc: <devicetree@vger.kernel.org> Cc: "Ivan T. Ivanov" <iivanov@mm-sol.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Björn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: qcom: Add msm8996 pinctrl driverJoonwoo Park2015-12-011-0/+199
| | | | | | | | | | | | | | | | | | | | | | | | | | Add initial pinctrl driver to support pin configuration with pinctrl framework for msm8996. Cc: <devicetree@vger.kernel.org> Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org> [sboyd@codeaurora.org: Remove duplicate entries and enums] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Björn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl/lantiq: updating devicetree binding descriptionMartin Schiller2015-11-301-8/+102
| | | | | | | | | | | | | | | | | | | | | | This patch adds the new dedicated "lantiq,<chip>-pinctrl" compatible strings to the devicetree bindings Documentation, where <chip> is one of "ase", "danube", "xrx100", "xrx200" or "xrx300" and marks the "lantiq,pinctrl-xway", "lantiq,pinctrl-ase" and "lantiq,pinctrl-xr9" compatible strings as DEPRECATED. Signed-off-by: Martin Schiller <mschiller@tdt.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Documentation: Rename gpio controller name from cygnus to iprocPramod Kumar2015-11-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Renamed gpio controller's driver name from cygnus to iproc to make it more generic so that all iProc based SoCs having the same gpio controller could use this. Signed-off-by: Pramod Kumar <pramodku@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | dt-binding: Add ngpios property to GPIO controller nodePramod Kumar2015-11-301-0/+5
|/ | | | | | | | | | | | Add ngpios property to the gpio controller's DT node so that controller driver extracts total number of in-use gpio lines from DT and removes dependency on driver. Signed-off-by: Pramod Kumar <pramodku@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: cygnus: Add new compatible string for gpio controller driverPramod Kumar2015-10-271-2/+2
| | | | | | | | | | This new compatible string, "brcm,iproc-gpio", should be used for all new iproc-based future SoCs. Signed-off-by: Pramod Kumar <pramodku@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: cygnus: Optional DT property to support pin mappingsPramod Kumar2015-10-271-3/+9
| | | | | | | | | | | | | If GPIO controller's pins are muxed, pin-controller subsystem need to be intimated by defining mapping between gpio and pinmux controller. This patch adds required properties to define this mapping via DT. Signed-off-by: Pramod Kumar <pramodku@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: dt-binding: document berlin4ct SoC pinctrlJisheng Zhang2015-10-161-1/+4
| | | | | | | | | Add berlin4ct to existing berlin pinctrl device tree binding. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: freescale: imx: imx7d iomuxc-lpsr devicetree bindingsAdrian Alonso2015-10-021-1/+62
| | | | | | | | | | | Add iomuxc-lpsr devicetree bindings documentation Provide documentation context as well an example on pheriperals that could use pad from either iomuxc controller supported by iMX7D SoC Signed-off-by: Adrian Alonso <aalonso@freescale.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sunxi: add allwinner A83T PIO controller supportVishnu Patekar2015-10-021-0/+1
| | | | | | | | | | | Allwinner A83T soc port controller has 8 ports. It has 3 IRQ banks namely PB, PG, PH. Pinmuxing are different for some pins as compared to sun8i A23 and A33. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge branch 'sh-pfc-for-v4.4' of ↵Linus Walleij2015-10-021-0/+1
|\ | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
| * pinctrl: sh-pfc: Initial R8A7795 PFC supportTakeshi Kihara2015-10-021-0/+1
| | | | | | | | | | | | | | | | | | | | Add PFC base support for the R8A7795 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [Morimoto-san: updated] Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* | pinctrl: dt-binding: Add DT binding documentation for Atmel PIO4Ludovic Desroches2015-09-211-0/+90
|/ | | | | | | | | Add documentation for the Atmel PIO4 controller introduced with SAMA5D2 chip family. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge tag 'pinctrl-v4.3-1' of ↵Linus Torvalds2015-09-045-26/+164
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v4.3 development cycle. Like with GPIO it's a lot of stuff. If my subsystems are any sign of the overall tempo of the kernel v4.3 will be a gigantic diff. [ It looks like 4.3 is calmer than 4.2 in most other subsystems, but we'll see - Linus ] Core changes: - It is possible configure groups in debugfs. - Consolidation of chained IRQ handler install/remove replacing all call sites where irq_set_handler_data() and irq_set_chained_handler() were done in succession with a combined call to irq_set_chained_handler_and_data(). This series was created by Thomas Gleixner after the problem was observed by Russell King. - Tglx also made another series of patches switching __irq_set_handler_locked() for irq_set_handler_locked() which is way cleaner. - Tglx also wrote a good bunch of patches to make use of irq_desc_get_xxx() accessors and avoid looking up irq_descs from IRQ numbers. The goal is to get rid of the irq number from the handlers in the IRQ flow which is nice. Driver feature enhancements: - Power management support for the SiRF SoC Atlas 7. - Power down support for the Qualcomm driver. - Intel Cherryview and Baytrail: switch drivers to use raw spinlocks in IRQ handlers to play nice with the realtime patch set. - Rework and new modes handling for Qualcomm SPMI-MPP. - Pinconf power source config for SH PFC. New drivers and subdrivers: - A new driver for Conexant Digicolor CX92755. - A new driver for UniPhier PH1-LD4, PH1-Pro4, PH1-sLD8, PH1-Pro5, ProXtream2 and PH1-LD6b SoC pin control support. - Reverse-egineered the S/PDIF settings for the Allwinner sun4i driver. - Support for Qualcomm Technologies QDF2xxx ARM64 SoCs - A new Freescale i.mx6ul subdriver. Cleanup: - Remove platform data support in a number of SH PFC subdrivers" * tag 'pinctrl-v4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (95 commits) pinctrl: at91: fix null pointer dereference pinctrl: mediatek: Implement wake handler and suspend resume pinctrl: mediatek: Fix multiple registration issue. pinctrl: sh-pfc: r8a7794: add USB pin groups pinctrl: at91: Use generic irq_{request,release}_resources() pinctrl: cherryview: Use raw_spinlock for locking pinctrl: baytrail: Use raw_spinlock for locking pinctrl: imx6ul: Remove .owner field pinctrl: zynq: Fix typos in smc0_nand_grp and smc0_nor_grp pinctrl: sh-pfc: Implement pinconf power-source param for voltage switching clk: rockchip: add pclk_pd_pmu to the list of rk3288 critical clocks pinctrl: sun4i: add spdif to pin description. pinctrl: atlas7: clear ugly branch statements for pull and drivestrength pinctrl: baytrail: Serialize all register access pinctrl: baytrail: Drop FSF mailing address pinctrl: rockchip: only enable gpio clock when it setting pinctrl/mediatek: fix spelling mistake in dev_err error message pinctrl: cherryview: Serialize all register access pinctrl: UniPhier: PH1-Pro5: add I2C ch6 pin-mux setting pinctrl: nomadik: reflect current input value ...
| * pinctrl: sh-pfc: Implement pinconf power-source param for voltage switchingBen Hutchings2015-08-241-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The pfc in the R8A7790 (and probably others in the R-Car gen 2 family) supports switching SDHI signals between 3.3V and 1.8V nominal voltage, and the SD driver should do that when switching to and from UHS modes. Add a flag for pins that have configurable I/O voltage and SoC operations to get and set the nominal voltage. Implement the pinconf power-source parameter using these operations. Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: sunxi: Add custom irq_domain_opsMaxime Ripard2015-07-271-1/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current interrupt parsing code was working by accident, because the default was actually parsing the first node of interrupts. While that was mostly working (and the flags were actually ignored), this binding has never been documented, and doesn't work with SoCs that have multiple interrupt banks anyway. Add a proper interrupt xlate function, that uses the same description than the GPIOs (<bank> <pin> <flags>), that will make things less confusing. The EINT number will still be used as the hwirq number, but won't be exposed through the DT. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: dt-binding: document Conexant CX92755 SoCBaruch Siach2015-07-271-0/+86
| | | | | | | | | | | | | | | | Add pinctrl device tree binding documentation for the General Purpose Pin Mapping module of the Conexant CX92755 SoC. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: nomadik: assure GPIO chips are populatedLinus Walleij2015-07-231-2/+5
| | | | | | | | | | | | | | | | | | If the pin controller probes before the GPIO driver it needs to populate the GPIO driver state containers ahead of the actual driver probe as the addresses are used by both halves of the driver. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: qcom: ssbi: Family A gpio & mpp driversBjorn Andersson2015-07-171-0/+5
| | | | | | | | | | | | | | | | | | This introduces pinctrl drivers for gpio and mpp blocks found in family A PMICs. Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: qcom: spmi-mpp: Transpose pinmux functionBjorn Andersson2015-07-171-17/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The "function" of the MPP driver was inherited from the GPIO driver, but the differences between the two hardware blocks makes both the driver and the device tree binding to be awkward. Instead of overloading the "normal" function with various modes this patch transposes the pinmux function to represent the three operating modes of the MPP (digital, analog and current sink). The properties of pin pairing and DTEST routing is moved to separate properties. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: qcom: spmi-mpp: Add support for setting analog output levelBjorn Andersson2015-07-171-0/+7
| | | | | | | | | | | | | | | | When the MPP is configured for analog output the output level is selected by the AOUT_CTL register, this patch makes it possible to control this. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: sh-pfc: Accept standard function, pins and groups propertiesLaurent Pinchart2015-07-161-10/+10
| | | | | | | | | | | | | | | | | | The "function", "pins" and "groups" pinmux and pinctrl properties have been standardized. Support them in addition to the custom "renesas,*" properties. New-style and old-style properties can't be mixed in DT. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: qcom: spmi-mpp: Implement support for sink modeBjorn Andersson2015-07-161-0/+5
| | | | | | | | | | | | | | | | The MPP supports three modes; digital, analog and sink mode. This patch implements support for the latter. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Document: dt: binding: imx: update document for imx6ul supportFrank Li2015-08-111-0/+36
|/ | | | | | | | This part just add necessary change to boot imx6ul. Update clock and pinctrl for imx6ul Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* Merge tag 'devicetree-for-linus' of ↵Linus Torvalds2015-07-012-0/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux Pull devicetree updates from Grant Likely: "A whole lot of bug fixes. Nothing stands out here except the ability to enable CONFIG_OF on every architecture, and an import of a newer version of dtc" * tag 'devicetree-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux: (22 commits) of/irq: Rename "intc_desc" to "of_intc_desc" to fix OF on sh of/irq: Fix pSeries boot failure Documentation: DT: Fix a typo in the filename "lantiq,<chip>-pinumx.txt" of: define of_find_node_by_phandle for !CONFIG_OF of/address: use atomic allocation in pci_register_io_range() of: Add vendor prefix for Zodiac Inflight Innovations dt/fdt: add empty versions of early_init_dt_*_memory_arch of: clean-up unnecessary libfdt include paths of: make unittest select OF_EARLY_FLATTREE instead of depend on it of: make CONFIG_OF user selectable MIPS: prepare for user enabling of CONFIG_OF of/fdt: fix argument name and add comments of unflatten_dt_node() of: return NUMA_NO_NODE from fallback of_node_to_nid() tps6507x.txt: Remove executable permission of/overlay: Grammar s/an negative/a negative/ of/fdt: Make fdt blob input parameters of unflatten functions const of: add helper function to retrive match data of: Grammar s/property exist/property exists/ of: Move OF flags to be visible even when !CONFIG_OF scripts/dtc: Update to upstream version 9d3649bd3be245c9 ...
| * Documentation: DT: Fix a typo in the filename "lantiq,<chip>-pinumx.txt"Thomas Langer2015-06-232-0/+0
| | | | | | | | | | | | | | | | | | To fix it, use the chance to rename according the compatible string, which is "lantiq,pinctrl-falcon" and "lantiq,pinctrl-xway" Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Cc: John Crispin <blogic@openwrt.org> Signed-off-by: Rob Herring <robh@kernel.org>
* | Merge tag 'armsoc-dt' of ↵Linus Torvalds2015-06-262-0/+70
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC DT updates from Kevin Hilman: "As usual, quite a few device-tree updates in ARM land. There was one minor churn in DTs due to relicensing under a dual-license, and lots of little additions of new peripherals, features etc, but nothing really exciting to call to your attention. Some higlights, focsuing on support for new SoCs and boards: - AT91: new boards: Overkiz, Acme Systems' Arietta G25 - tegra: HDA support - bcm: new platforms: Buffalo WXR-1900DHP, SmartRG SR400ac, ASUS RT-AC87U - mvebu: new platforms: Compulab CM-A510, Armada 385-based Linksys boards, DLink DNS-327L - OMAP: new platforms: Baltos IR5221, LogicPD Torpedo, Toby-Churchill SL50 - ARM: added support for Juno r1 board - sunxi: A33 SoC support; new boards: A23 EVB, SinA33, GA10H-A33, Mele A1000G - imx: i.MX7D SoC support; new boards: Armadeus Systems APF6, Gateworks GW5510, and aristainetos2 boards - hisilicon: hi6220 SoC support; new boards: 96boards hikey" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (462 commits) ARM: hisi: revert changes from hisi/hip04-dt branch ARM: nomadik: set proper compatible for accelerometer ARM64: juno: add GPIO keys ARM: at91/dt: sama5d4: fix dma conf for aes, sha and tdes nodes ARM: dts: Introduce STM32F429 MCU ARM: socfpga: dts: enable ethernet for Arria10 devkit ARM: dts: k2l: fix the netcp range size ARM: dts: k2e: fix the netcp range size ARM: dts: k2hk: fix the netcp range size ARM: dts: k2l-evm: Add device bindings for netcp driver ARM: dts: k2e-evm: Add device bindings for netcp driver ARM: dts: k2hk-evm: Add device bindings for netcp driver ARM: BCM5301X: Add DT for Asus RT-AC87U ARM: BCM5301X: add IRQ numbers for PCIe controller ARM: BCM5301X: add NAND flash chip description arm64: dts: Add dts files for Hisilicon Hi6220 SoC clk: hi6220: Document devicetree bindings for hi6220 clock arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC ARM: at91/dt: sama5d4ek: mci0 uses slot 0 ARM: at91/dt: kizbox: fix mismatch LED PWM device ...
| * \ Merge tag 'imx-dt-4.2' of ↵Kevin Hilman2015-06-101-0/+27
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt The i.MX device tree changes for 4.2: - Add device tree for i.MX7D SoC and imx7d-sdb board - New i.MX6 board support: Armadeus Systems APF6, Gateworks GW5510, and aristainetos2 boards - Change LVDS to use simple-panel for nitrogen6x and sabrelite boards - Add Wifi/Bluetooth devices support for cubox-i board - Remove unused regulators and correct OTG roles setting for imx6sl-warp board - Add I2C support for imx23-olinuxino board - Move imx6qdl HDMI device to a better place - Add power-domain for imx6qdl CODA device * tag 'imx-dt-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (24 commits) ARM: dts: imx6dl: add imx6dl gpt specific compatible string ARM: dts: imx6: add DT for aristainetos2 board ARM: dts: cubox-i/hummingboard: Fix the license text ARM: dts: sabrelite: use simple-panel instead of display-timings for LVDS0 ARM: dts: nitrogen6x: use simple-panel instead of display-timings for LVDS0 ARM: dts: add imx7d-sdb support ARM: dts: add imx7d soc dtsi file ARM: dts: Armadeus Systems APF6 family support (i.MX6) ARM: dts: vf610: Nomenclature fixup for PTC12 pin used in RMII mode. ARM: dts: cubox-i: add support for Broadcom Wifi/Bluetooth devices Document: dt: binding: imx: update document for imx7d support ARM: dts: imx6qdl: Add power-domain phandle to CODA device node ARM: dts: Gateworks GW5510 support (i.MX6) ARM: dts: imx6sl-warp: Fix OTG roles ARM: dts: imx6sl-warp: Remove USB regulators ARM: dts: imx6sl-warp: Remove unused regulator ARM: dts: add pinfunc include file to support imx7d ARM: mxs: fix in tree users of ssd1306 ARM: dts: imx6qdl-hummingboard: Add PCIe support ARM: dts: imx23-olinuxino: Add i2c support ...
| | * | Document: dt: binding: imx: update document for imx7d supportFrank Li2015-06-031-0/+27
| | |/ | | | | | | | | | | | | | | | | | | | | | This part just add necessary change to boot imx7d. Update clock, pinctrl and gpt for imx7d Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | Documentation: bindings: move the Berlin pinctrl documentationAntoine Tenart2015-05-161-0/+43
| |/ | | | | | | | | | | | | | | | | | | | | | | | | The Berlin pinctrl documentation was part of the Marvell Berlin SoC documentation because the Berlin pinctrl configuration was inside the chip and the system controllers. With the recent rework of the chip and system controller handling (now an MFD driver registers all sub-devices of the two soc and system controller nodes and each device has its own sub-node), the documentation of the Berlin pinctrl driver can be moved to the generic pinctrl documentation directory. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* | pinctrl: rockchip: add support for the rk3368Heiko Stübner2015-06-171-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | The rk3368 is the first ARM64 soc from Rockchip, but seems to share most peripherals with the ARM32 soc, including the pinctrl functionality. The only notable difference is - as with every Rockchip soc - that the offsets in the General Register Files moved around and a split of the pmu section of the rk3288 into pmu and pmugrf (pmu general register files) sections. The pinctrl driver of course only needs the pmugrf registers for controlling the pin settings. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: sh-pfc: add R8A7794 PFC supportHisashi Nakamura2015-06-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add PFC support for the R8A7794 SoC including pin groups for some on-chip devices such as ETH, I2C, INTC, MSIOF, QSPI, [H]SCIF... Sergei: squashed together several patches, fixed the MLB_CLK typo, added IRQ4.. IRQ9 pin groups, fixed IRQn comments, added ETH B pin group names, removed stray new line and fixed typos in the comments in the pinmux_config_regs[] initializer, removed the platform device ID, took into account limited number of signals in the GPIO1/5/6 controllers, added reasonable and removed unreasonable copyrights, modified the bindings document, renamed, added changelog. Changes in version 5: - resolved rejects, refreshed the patch; - added Laurent Pinchart's ACK. Changes in version 4: - reused the PORT_GP_26() macro to #define PORT_GP_28(). Changes in version 3: - removed the platform device ID; - added PORT_GP_26() and PORT_GP_28() macros, used them for GPIO1/5/6 in the CPU_ALL_PORT() macro. Changes in version 2: - rebased the patch. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: armada-39x: add support for Armada 395 variantThomas Petazzoni2015-06-101-14/+16
| | | | | | | | | | | | | | | | | | | | The Armada 39x SoC family has grown a new variant, the Armada 395, which sits between the Armada 390 and Armada 398 in terms of features. This commit adds support for this additional variant to the Armada 39x pinctrl driver. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: armada-39x: add missing SATA functionsThomas Petazzoni2015-06-101-5/+9
| | | | | | | | | | | | | | | | | | | | The latest version of the Armada 39x datasheet documents several new SATA related functions on various MPP pins. This commit adds the description of these new functions to the Armada 39x pinctrl driver as well as to its DT binding documentation. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: armada-39x: add missing PCIe functionsThomas Petazzoni2015-06-101-2/+2
| | | | | | | | | | | | | | | | | | | | The latest version of the Armada 39x datasheet documents several new PCIe related functions on various MPP pins. This commit adds the description of these new functions to the Armada 39x pinctrl driver as well as to its DT binding documentation. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: armada-38x: add ptp functionsThomas Petazzoni2015-06-101-3/+3
| | | | | | | | | | | | | | | | | | | | The latest version of the Armada 38x datasheet documents several new PTP related functions on various MPP pins. This commit adds the description of these new functions to the Armada 38x pinctrl driver as well as to its DT binding documentation. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: armada-38x: add ua1 functionsThomas Petazzoni2015-06-101-6/+6
| | | | | | | | | | | | | | | | | | | | The latest version of the Armada 38x datasheet documents several new UART1 related functions on various MPP pins. This commit adds the description of these new functions to the Armada 38x pinctrl driver as well as to its DT binding documentation. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: armada-38x: add nand functionsThomas Petazzoni2015-06-101-2/+2
| | | | | | | | | | | | | | | | | | | | The latest version of the Armada 38x datasheet documents several new NAND related functions on various MPP pins. This commit adds the description of these new functions to the Armada 38x pinctrl driver as well as to its DT binding documentation. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: armada-38x: add sata functionsThomas Petazzoni2015-06-101-2/+2
| | | | | | | | | | | | | | | | | | | | The latest version of the Armada 38x datasheet documents several new SATA related functions on various MPP pins. This commit adds the description of these new functions to the Armada 38x pinctrl driver as well as to its DT binding documentation. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: armada-xp: add dram functionsThomas Petazzoni2015-06-101-3/+3
| | | | | | | | | | | | | | | | | | | | The latest Armada XP datasheet documents several new DRAM related functions on various MPPs. This commit adds the description of these new functions in the Armada XP pinctrl driver and its DT binding documentation. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: armada-xp: add nand rb functionThomas Petazzoni2015-06-101-1/+1
| | | | | | | | | | | | | | | | | | The latest version of the Armada XP datasheet documents a new NAND-related MPP function on MPP48, for which this commit adds support. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
OpenPOWER on IntegriCloud