| Commit message (Collapse) | Author | Age | Files | Lines |
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Update Zynq PCI binding documentation with Microblaze node.
[bhelgaas: fix "microbalze_0_intc" typo]
Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
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Good to have it properly describe for c&p cases.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
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This is the driver for Xilinx AXI PCIe Host Bridge Soft IP.
[bhelgaas: minor whitespace fixes]
Signed-off-by: Srikanth Thokala <sthokal@xilinx.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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