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* irqchip: bcm7120-l2: Extend driver to support 64+ bit controllersKevin Cernekee2014-11-091-8/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most implementations of the bcm7120-l2 controller only have a single 32-bit enable word + 32-bit status word. But some instances have added more enable/status pairs in order to support 64+ IRQs (which are all ORed into one parent IRQ input). Make the following changes to allow the driver to support this: - Extend DT bindings so that multiple words can be specified for the reg property, various masks, etc. - Add loops to the probe/handle functions to deal with each word separately - Allocate 1 generic-chip for every 32 IRQs, so we can still use the clr/set helper functions - Update the documentation This uses one domain per bcm7120-l2 DT node. If the DT node defines multiple enable/status pairs (i.e. >=64 IRQs) then the driver will create a single IRQ domain with 2+ generic chips. Multiple generic chips are required because the generic-chip code can only handle one enable/status register pair per instance. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1415342669-30640-12-git-send-email-cernekee@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* Documentation: bcm7120-l2: Add Broadcom BCM7120-style L2 bindingFlorian Fainelli2014-09-141-0/+86
This patch adds the Device Tree binding document for the Broadcom BCM7120-style Set-top-box Level 2 interrupt controller hardware. We provide some ascii art explaining the different roles and reasons why some properties are introduced to represent that interrupt controller. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lkml.kernel.org/r/1410309862-27784-3-git-send-email-f.fainelli@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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