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* dw_dmac: Setting Default Burst length for transfers as 16.Viresh Kumar2011-03-071-2/+2
| | | | | | | | This patch sets default Burst length for all transfer to 16. This will enhance performance when user doesn't have any chan->private data. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dw_dmac: Allow src/dst msize & flow controller to be configured at runtimeViresh KUMAR2011-03-073-6/+39
| | | | | | | | | | | | | Msize or Burst Size is peripheral dependent in case of prep_slave_sg and cyclic_prep transfers, and in case of memcpy transfers it is platform dependent. So msize configuration must come from platform data. Also some peripherals (ex: JPEG), need to be flow controller for dma transfers, so this information in case of slave_sg & cyclic_prep transfers must come from platform data. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dw_dmac: Changing type of src_master and dest_master to u8.Viresh Kumar2011-03-071-2/+4
| | | | | | | | | src_master & dest_master don't required u32 as they have values limited to u8 only. Also their description is missing from doc style comment. This patch fixes above mentioned issues. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dw_dmac: Pass Channel Priority from platform_dataViresh Kumar2011-03-073-2/+16
| | | | | | | | | | In Synopsys designware, channel priority is programmable. This patch adds support for passing channel priority through platform data. By default Ascending channel priority will be followed, i.e. channel 0 will get highest priority and channel 7 will get lowest. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dw_dmac: Pass Channel Allocation Order from platform_dataViresh Kumar2011-03-072-1/+8
| | | | | | | | | | In SPEAr Platform channels 4-7 have more Fifo depth. So we must get better channel first. This patch introduces concept of channel allocation order in dw_dmac. If user doesn't pass anything or 0, than normal (ascending) channel allocation will follow, else channels will be allocated in descending order. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dw_dmac: Mark all tx_descriptors with DMA_CRTL_ACK after xfer finishViresh Kumar2011-03-071-0/+7
| | | | | | | | | | dwc_desc_get checks all descriptors for DMA_CTRL_ACK before allocating them for transfers. And descriptors are not marked with DMA_CRTL_ACK after transfer finishes. Thus descriptor once used is not usable again. This patch marks descriptors with DMA_CRTL_ACK after dma xfer finishes Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dw_dmac: Change value of DWC_MAX_COUNT to 4095.Viresh Kumar2011-03-071-3/+2
| | | | | | | | Every descriptor can transfer a maximum count of 4095 (12 bits, in control reg), So we must have DWC_MAX_COUNT as 4095 instead of 2048. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dw_dmac: Adding support for 64 bit access width for memcpy xfersViresh Kumar2011-03-071-1/+3
| | | | | Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dw_dmac: Calling dwc_scan_descriptors from dwc_tx_status() after taking lockViresh Kumar2011-03-071-0/+2
| | | | | | | | | | Lock must be taken before calling dwc_scan_descriptors, as this may access/modify shared data and queues. dwc_tx_status wasn't taking lock before calling this routine. This patch add code that takes lock before calling dwc_scan_descriptors. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dw_dmac: Move single descriptor from dwc->queue to dwc->active_list in ↵Viresh Kumar2011-03-071-12/+8
| | | | | | | | | | | dwc_complete_all dwc_complete_all and other routines was removing all descriptors from dwc->queue and pushing them to dwc->active_list. Only one was required to be removed. Also we are calling dwc_dostart, once list is fixed. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dw_dmac: Replace module_init() with subsys_initcall()Viresh Kumar2011-03-071-1/+1
| | | | | | | | | | In some cases users of dw_dmac are initialized before dw_dmac, and if they try to use dw_dmac, they simply fail. So its better we register init() routine of driver using subsys_initcall() instead of module_init(), so that dma driver is available at the earliest possible. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dw_dmac: Remove compilation dependency from AVR32 and put on HAVE_CLKViresh Kumar2011-03-071-1/+1
| | | | | | | | | | | | This driver will now be used in atleast two platforms AVR32 & ARM. And there is no actual hardware dependency of this driver over AVR32 or ARM. So this dependency can be removed altogether. Also dw_dmac driver uses clk framework and must have compilation dependency on HAVE_CLK Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: mxs-dma: add dma support for i.MX23/28Shawn Guo2011-03-024-0/+759
| | | | | | | | | | | | | | | | | | | | | | | | | This patch adds dma support for Freescale MXS-based SoC i.MX23/28, including apbh-dma and apbx-dma. * apbh-dma and apbx-dma are supported in the driver as two mxs-dma instances. * apbh-dma is different between mx23 and mx28, hardware version register is used to differentiate. * mxs-dma supports pio function besides data transfer. The driver uses dma_data_direction DMA_NONE to identify the pio mode, and steals sgl and sg_len to get pio words and numbers from clients. * mxs dmaengine has some very specific features, like sense function and the special NAND support (nand_lock, nand_wait4ready). These are too specific to implemented in generic dmaengine driver. * The driver refers to imx-sdma and only a single descriptor is statically assigned to each channel. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* pch_dma: set the number of array correctlyTomoya MORINAGA2011-02-261-2/+2
| | | | | | | set the number of array correctly. Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* pch_dma: fix kernel error issueTomoya MORINAGA2011-02-261-15/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix the following kernel error ------------[ cut here ]------------ WARNING: at kernel/softirq.c:159 _local_bh_enable_ip.clone.5+0x35/0x71() Hardware name: To be filled by O.E.M. Modules linked in: pch_uart pch_dma fuse mga drm cpufreq_ondemand acpi_cpufreq mperf ip6t_REJECT nf_conntrack_ipv6 nf_defrag_ipv6 ip6table_filter ip6_tables ipv6 uinput snd_hda_codec_realtek snd_hda_intel snd_hda_codec matroxfb_base snd_hwdep 8250_pnp snd_seq snd_seq_device matroxfb_DAC1064 snd_pcm joydev 8250 matroxfb_accel snd_timer matroxfb_Ti3026 ppdev pegasus parport_pc snd parport matroxfb_g450 g450_pll serial_core video output matroxfb_misc soundcore snd_page_alloc serio_raw pcspkr ext4 jbd2 crc16 sdhci_pci sdhci mmc_core floppy [last unloaded: scsi_wait_scan] Pid: 0, comm: swapper Not tainted 2.6.37.upstream_check+ #8 Call Trace: [<c0433add>] warn_slowpath_common+0x65/0x7a [<c043825b>] ? _local_bh_enable_ip.clone.5+0x35/0x71 [<c0433b01>] warn_slowpath_null+0xf/0x13 [<c043825b>] _local_bh_enable_ip.clone.5+0x35/0x71 [<c043829f>] local_bh_enable_ip+0x8/0xa [<c06ec471>] _raw_spin_unlock_bh+0x10/0x12 [<f82b57dd>] pd_prep_slave_sg+0xba/0x200 [pch_dma] [<f82f7b7a>] pch_uart_interrupt+0x44d/0x6aa [pch_uart] [<c046fa97>] handle_IRQ_event+0x1d/0x9e [<c047146f>] handle_fasteoi_irq+0x90/0xc7 [<c04713df>] ? handle_fasteoi_irq+0x0/0xc7 <IRQ> [<c04045af>] ? do_IRQ+0x3e/0x89 [<c04035a9>] ? common_interrupt+0x29/0x30 [<c04400d8>] ? sys_getpriority+0x12d/0x1a2 [<c058bb2b>] ? arch_local_irq_enable+0x5/0xb [<c058c740>] ? acpi_idle_enter_bm+0x22a/0x261 [<c0648b11>] ? cpuidle_idle_call+0x70/0xa1 [<c0401f44>] ? cpu_idle+0x49/0x6a [<c06d9fc4>] ? rest_init+0x58/0x5a [<c089e762>] ? start_kernel+0x2d0/0x2d5 [<c089e0ce>] ? i386_start_kernel+0xce/0xd5 Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* Merge branch 'dw_dmac' into dmaengineDan Williams2011-02-143-14/+33
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| * avr32: at32ap700x: specify DMA src and dst mastersJamie Iles2011-01-291-0/+6
| | | | | | | | | | | | | | | | | | | | Now that the dw_dmac DMA driver supports configurable source and destination masters we need to specify which ones to use. This was previously hardcoded to 0 and 1 respectively in the driver. Acked-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * dmaengine/dw_dmac: provide a mechanism to indicate private devicesJamie Iles2011-01-292-0/+5
| | | | | | | | | | | | | | | | | | | | | | Some platforms (e.g. Picochip PC3XX) have multiple DMA controllers where some may be used for slave transfers and others for general purpose memcpy type transfers. Add a .is_private boolean to the platform data structure so that controllers can be marked as private so that the DMA_PRIVATE capability will be set for that controller. Signed-off-by: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * dmaengine/dw_dmac: allow src/dst masters to be configured at runtimeJamie Iles2011-01-292-14/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some platforms have flexible mastering capabilities and this needs to be selected at runtime. If the platform has specified private data in the form of the dw_dma_slave then fetch the source and destination masters from here. If this isn't present, default to the previous of 0 and 1. v2: cleanup whitespace Acked-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Signed-off-by: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * dmaengine/dw_dmac: don't scan descriptors if no xfers in progressJamie Iles2011-01-291-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some hardware (picoChip picoXCell in particular) sometimes has the block transfer complete bit being set for a channel after the whole transfer has completed. If we don't have any transfers in the active list then don't bother to scan the descriptors. This often happens in normal operation and doesn't require the channel to be reset. v2: cleanup whitespace Signed-off-by: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* | Merge branch 'dma40' into dmaengineDan Williams2011-02-144-947/+761
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| * | dma40: cyclic xfer supportRabin Vincent2011-01-303-49/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support cyclic transfers, which are useful for ALSA drivers. Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: stop ongoing transfers in DMA_TERMINATE_ALLRabin Vincent2011-01-301-13/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation of DMA_TERMINATE_ALL leaves ongoing transfers running. Fix it. Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: fix DMA_SG capability and channelsRabin Vincent2011-01-301-37/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DMA_SG cap is enabled on the wrong channel, and the pointers are repeatedly set incorrectly. Fix it and combine the ops settings to a common function. Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: handle failure to allocate first LCLARabin Vincent2011-01-301-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: extract lcla code into separate functionRabin Vincent2011-01-301-42/+50
| | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: use flags to reduce parameter countRabin Vincent2011-01-302-37/+52
| | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: make d40_log_buf_to_lli staticRabin Vincent2011-01-302-8/+1
| | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: unify src/dst addr checkRabin Vincent2011-01-301-13/+16
| | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: pass the info pointer all the way to reduce argument countRabin Vincent2011-01-303-33/+22
| | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: unify d40_log_sg_to_lli funcs for mem and slaveRabin Vincent2011-01-303-85/+29
| | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: combine duplicated code in log_sg_to_devRabin Vincent2011-01-301-29/+23
| | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: move lli_load to main source fileRabin Vincent2011-01-303-35/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These register writes are better placed in the main source file rather than ll.c. Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: combine mem and slave prep_sg functionsRabin Vincent2011-01-301-94/+62
| | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: remove export of stedma40_memcpy_sgRabin Vincent2011-01-302-20/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The dmaengine framework has the API for this now. Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: combine mem and slave sg-to-lli functionsRabin Vincent2011-01-301-110/+84
| | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: remove duplicated dev addr codeRabin Vincent2011-01-301-36/+30
| | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: combine duplicated d40_pool_lli_alloc() callsRabin Vincent2011-01-301-24/+14
| | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: combine desc init functionsRabin Vincent2011-01-301-44/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The desc init code can be shared between the mem and slave prep routines. Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: implement prep_memcpy as a wrapper around memcpy_sgRabin Vincent2011-01-303-110/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To simplify the code. Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: remove unnecessary castsRabin Vincent2011-01-301-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: fix DMA API usage for LLIsRabin Vincent2011-01-301-17/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Map and unmap the LLIs and use dma_sync_single_for_device() appropriately instead of mapping and never unmapping them. Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: fix DMA API usage for LCLARabin Vincent2011-01-301-8/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Map the buffer once and use dma_sync*() appropriately instead of mapping the buffer over and over without unmapping it. Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: use sg_dma_address() instead of sg_phys()Rabin Vincent2011-01-301-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The address to use for DMA should be taken from sg_dma_address() and not sg_phys(). Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: remove unnecessary ALIGN()sRabin Vincent2011-01-301-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ALIGN(x * y, y) == x * y ALIGN(aligned + x * y, y) == aligned + x * y Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: allow realtime and priority for event linesRabin Vincent2011-01-303-0/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DB8500v2's DMA40 (revision 3) allows setting event lines as high priority and real time. Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: fix comment to refer to SOCs rather than boardsRabin Vincent2011-01-301-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | And add DB8500v2 information. Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: use helpers for error functionsRabin Vincent2011-01-301-127/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Almost every use of dev_err in this driver prints the function name. Abstract out wrappers to help with this and reduce code duplication. Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: use helpers for channel type checkRabin Vincent2011-01-301-22/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The somewhat confusing check d40c->log_num == D40_PHY_CHAN and its variants are used in several places to check if a channel is logical or physical. Use appropriately named helpers to do this to make the code more readable. Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | dma40: use helper for channel registers baseRabin Vincent2011-01-301-44/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The register offset computation for accessing channel registers is copy/pasted in several places. Create a helper function to do it. Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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