summaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
* Merge tag 'clk-for-linus-3.11' of git://git.linaro.org/people/mturquette/linuxLinus Torvalds2013-07-0347-415/+2261
|\
| * clk: tegra: fix ifdef for tegra_periph_reset_assert inlineStephen Warren2013-06-241-1/+1
| * clk: tegra: provide tegra_periph_reset_assert alternativeArnd Bergmann2013-06-221-0/+5
| * clk: exynos4: Fix clock aliases for cpufreq related clocksTushar Behera2013-06-221-10/+11
| * clk: samsung: Add MUX_FA macro to pass flag and aliasTushar Behera2013-06-221-0/+3
| * clk: add support for Rockchip gate clocksHeiko Stübner2013-06-204-0/+174
| * clk: vexpress: Make the clock drivers directly available for arm64Pawel Moll2013-06-201-1/+1
| * clk: vexpress: Use full node name to identify individual clocksPawel Moll2013-06-201-2/+2
| * clk: tegra: T114: add DFLL DVCO reset controlPaul Walmsley2013-06-182-0/+39
| * clk: tegra: T114: add DFLL source clocksPaul Walmsley2013-06-181-0/+11
| * clk: tegra: T114: add FCPU clock shaper programming, needed by the DFLLPaul Walmsley2013-06-182-0/+122
| * clk: gate: add CLK_GATE_HIWORD_MASKHaojian Zhuang2013-06-152-6/+24
| * clk: divider: add CLK_DIVIDER_HIWORD_MASK flagHaojian Zhuang2013-06-152-2/+18
| * clk: mux: add CLK_MUX_HIWORD_MASKHaojian Zhuang2013-06-152-2/+20
| * clk: Always notify whole subtree when reparentingSoren Brinkmann2013-06-151-2/+1
| * MAINTAINERS: make drivers/clk entry match subdirsStephen Warren2013-06-111-2/+3
| * clk: honor CLK_GET_RATE_NOCACHE in clk_set_ratePeter De Schrijver2013-06-111-1/+1
| * clk: use clk_get_rate() for debugfsPeter De Schrijver2013-06-111-2/+2
| * clk: tegra: Use override bits when neededPeter De Schrijver2013-06-111-33/+49
| * clk: tegra: override bits for Tegra30 PLLMPeter De Schrijver2013-06-111-0/+18
| * clk: tegra: override bits for Tegra114 PLLMPeter De Schrijver2013-06-111-0/+9
| * clk: tegra: Add fields for override bitsPeter De Schrijver2013-06-111-0/+8
| * clk: tegra: fix sclk_parentsPeter De Schrijver2013-06-111-1/+1
| * clk: tegra: fix pllre initilizationPeter De Schrijver2013-06-111-2/+1
| * clk: tegra: PLL m,n,p init for Tegra114Peter De Schrijver2013-06-111-0/+77
| * clk: tegra: allow PLL m,n,p init from SoC filesPeter De Schrijver2013-06-112-39/+53
| * clk: tegra: pllp_out2 divider is int onlyPeter De Schrijver2013-06-111-2/+2
| * clk: tegra: pllc and pllxc should use pdiv_mapPeter De Schrijver2013-06-111-80/+82
| * clk: divider: do not propagate rate change request when unnecessaryShawn Guo2013-06-101-0/+10
| * clk: ux500: Clocks definition for u8540Philippe Begnic2013-06-061-1/+559
| * mfd: db8500: Update BML clock register for db8580Philippe Begnic2013-06-063-0/+3
| * mfd: db8500: Update register definition for u8540 clockPhilippe Begnic2013-06-062-2/+13
| * clk: ux500: Pass clock base adresses in initcall for u8540 and u9540Philippe Begnic2013-06-064-8/+12
| * clk: tegra114: Fix msenc clock registerMikko Perttunen2013-06-041-1/+1
| * clk: tegra: Use common of_clk_init functionPrashant Gaikwad2013-05-317-36/+8
| * clk: tegra114: correctly output clk_32kAlexandre Courbot2013-05-311-0/+3
| * clk: tegra: fix clk_out parents listPrashant Gaikwad2013-05-312-4/+4
| * clk: Add TI-Nspire clock driversDaniel Tang2013-05-313-0/+178
| * clk: use platform_{get,set}_drvdata()Jingoo Han2013-05-302-3/+3
| * clk: mpc85xx: Update the compatible stringTang Yuantian2013-05-301-1/+1
| * clk: sunxi: "cpu_data" is defined in header files of some architecturesGiacomo A. Catenazzi2013-05-291-2/+2
| * clk: exynos5250: Add sclk_mpll to the parent list of mout_cpu clockTushar Behera2013-05-291-1/+1
| * clk: exynos5250: Update cpufreq related clocks for EXYNOS5250Tushar Behera2013-05-291-3/+3
| * clk: vt8500: Remove unnecessary divisor adjustment in vtwm_dclk_set_rate()Tony Prisk2013-05-291-4/+0
| * clk: vt8500: Add support for clocks on the WM8850 SoCsTony Prisk2013-05-292-0/+73
| * clk: Disable unused clocks after deferred probing is doneSaravana Kannan2013-05-291-1/+1
| * clk: wm831x: Fix wm831x_clkout_get_parentAxel Lin2013-05-281-3/+3
| * clk: wm831x: Fix update wrong register for enable/disable FLLAxel Lin2013-05-281-3/+3
| * clk: si5351: Allow to build without CONFIG_OFSebastian Hesselbarth2013-05-281-1/+0
| * clk: add non CONFIG_OF routines for clk-providerSebastian Hesselbarth2013-05-281-8/+39
OpenPOWER on IntegriCloud