| Commit message (Collapse) | Author | Age | Files | Lines |
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/pm
From Tony Lindgren <tony@atomide.com>:
Here are omap driver changes for v3.6 that were agreed to be merged
via the omap tree. These changes convert omap HDQ1W driver to use
runtime PM, and finally move omap SmartReflex driver from arch/arm
to live under drivers.
* tag 'omap-devel-driver-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: do not allow SmartReflex to be built as a module
ARM: OMAP2: Use hwmod to initialize mmc for 2420
W1: OMAP HDQ1W: use runtime PM
ARM: OMAP2+: HDQ1W: use omap_device
W1: OMAP HDQ1W: use 32-bit register accesses
W1: OMAP HDQ1W: allow driver to be built on all OMAP2+
ARM: OMAP: SmartReflex: Move smartreflex driver to drivers/
ARM: OMAP2+: SmartReflex: add POWER_AVS Kconfig options
ARM: OMAP2+: SmartReflex: Create per-opp debugfs node for errminlimit
ARM: OMAP2+: SmartReflex: Use per-OPP data structure
ARM: OMAP2+: Voltage: Move the omap_volt_data structure to plat
ARM: OMAP2+: SmartReflex: introduce a busy loop condition test macro
ARM: OMAP3: hwmod: rename the smartreflex entries
ARM: OMAP2+: smartreflex: Use the names from hwmod data instead of voltage domains.
ARM: OMAP3+: SmartReflex: class drivers should use struct omap_sr *
ARM: OMAP2+: SmartReflex: move the smartreflex header to include/linux/power
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Disable the module option for POWER_AVS since this is currently not
supported.
This patch fixes these error in the case POWER_AVS is set to 'm':
arch/arm/mach-omap2/built-in.o: In function `sr_class3_configure':
arch/arm/mach-omap2/smartreflex-class3.c:43: undefined reference to `sr_configure_errgen'
arch/arm/mach-omap2/built-in.o: In function `sr_class3_disable':
arch/arm/mach-omap2/smartreflex-class3.c:33: undefined reference to `sr_disable_errgen'
arch/arm/mach-omap2/smartreflex-class3.c:35: undefined reference to `sr_disable'
arch/arm/mach-omap2/built-in.o: In function `sr_class3_enable':
arch/arm/mach-omap2/smartreflex-class3.c:28: undefined reference to `sr_enable'
arch/arm/mach-omap2/built-in.o: In function `sr_class3_init':
arch/arm/mach-omap2/smartreflex-class3.c:59: undefined reference to `sr_register_class'
Reported-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
[tony@atomide.com: updated to use relative paths for the build error]
Signed-off-by: Tony Lindgren <tony@atomide.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into devel-driver
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After a clean-up of the interfaces the OMAP Smartreflex IP driver is now a
generic driver. Move it to drivers/power/avs/.
The build is controlled by the following Kconfig options:
. CONFIG_POWER_AVS: general knob for Adaptive Voltage Scaling support,
. CONFIG_POWER_AVS_OMAP: AVS(Adaptive Voltage Scaling)
support on OMAP containing the version 1 or version 2 of the SmartReflex IP,
. CONFIG_POWER_AVS_OMAP_CLASS3: Class 3 implementation of Smartreflex.
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: J Keerthy <j-keerthy@ti.com>
Acked-by: Rafael J. Wysocki <rjw@sisk.pl>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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Add a Kconfig menu (POWER_AVS) and rename the Kconfig options
for the OMAP SmartReflex implementation:
CONFIG_OMAP_SMARTREFLEX renames to CONFIG_POWER_AVS_OMAP
CONFIG_OMAP_SMARTREFLEX_CLASS3 renames to CONFIG_POWER_AVS_OMAP_CLASS3
This change makes the SmartReflex implementation ready for the move
to drivers/.
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: J Keerthy <j-keerthy@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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Remove the global errminlimit debugfs entry and create per-voltage
entries from the data tables.
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: J Keerthy <j-keerthy@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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The SmartReflex driver incorrectly treats some per-OPP data as data
common to all OPPs (e.g., ERRMINLIMIT). Move this data into a per-OPP
data structure.
Furthermore, in order to make the SmartReflex implementation ready for
the move to drivers/, remove the dependency from the SR driver code
to the voltage layer by querying the data tables only from the SR device
init code.
Based on Paul's original code for the SmartReflex driver conversion.
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: J Keerthy <j-keerthy@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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Move the omap_volt_data structure from mach-omap2/ directory
to arch/arm/plat-omap/include/plat/ so that it is accessible
from both mach-omap2 and drivers directories.
Signed-off-by: J Keerthy <j-keerthy@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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Now that omap_test_timeout is only accessible from mach-omap2/,
introduce a similar function for SR.
This change makes the SmartReflex implementation ready for the move
to drivers/.
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: J Keerthy <j-keerthy@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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Change the name field value to better reflect the smartreflex
integration in the system.
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: J Keerthy <j-keerthy@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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domains.
Associate a name with each SmartReflex instance from the hwmod data,
rather than attempting to reuse the name of a voltage domain. The name
from hwmod better reflects the smartreflex integration in the system.
Also have the name passed to the drivers using pdata, which helps to remove
any dependencies on SoC-specific structures.
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: J Keerthy <j-keerthy@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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Convert SmartReflex "class" functions to take a struct omap_sr *, rather than
a struct voltagedomain *. SmartReflex code should be driver code and not
tightly coupled to OMAP subarchitecture-specific structures.
Based on Paul's original code for the SmartReflex driver conversion.
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: J Keerthy <j-keerthy@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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Move the smartreflex header file
(arch/arm/mach-omap2/smartreflex.h) in a new header file
include/linux/power/smartreflex.h.
This change makes the SmartReflex implementation ready for the move
to drivers/.
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: J Keerthy <j-keerthy@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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This allows us to pass dma request lines in platform data to
MMC driver the same way as we already do for omap2430 and later.
Also note that we need to only build this code if MMC_OMAP
is selected, so change Makefile accordingly and place it near
the MMC_OMAP_HS in the Makefile.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into devel-driver
Convert the OMAP HDQ1W driver to use runtime PM. Make it available on
all OMAP2+ chips that appear to have it integrated. Fix a problem
preventing it from being used on OMAP4.
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Convert the OMAP HDQ driver to use runtime PM. Compile- and boot-tested,
but not tested in actual use.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: NeilBrown <neilb@suse.de>
Cc: Evgeniy Polyakov <zbr@ioremap.net>
Acked-by: Evgeniy Polyakov <zbr@ioremap.net>
Tested-by: NeilBrown <neilb@suse.de>
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Convert the old-style device registration code for HDQ1W to use
omap_device. This will allow the driver to be converted to use PM
runtime and to take advantage of the OMAP IP block management
infrastructure (hwmod, PM, etc.).
A side benefit of this conversion is that it also makes the HDQ device
available on OMAP2420. The previous code only enabled it on 2430 and
3430.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: NeilBrown <neilb@suse.de>
Tested-by: NeilBrown <neilb@suse.de>
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HDQ/1-wire registers are 32 bits long, even if the register contents
fit into 8 bits, so accesses must be 32-bit aligned. Evidently the
OMAP2/3 interconnects allowed the driver to get away with 8 bit accesses,
but the OMAP4 puts a stop to that:
[ 1.488800] Driver for 1-wire Dallas network protocol.
[ 1.495025] Bad mode in data abort handler detected
[ 1.500122] Internal error: Oops - bad mode: 0 [#1] SMP
[ 1.505615] Modules linked in:
[ 1.508819] CPU: 0 Not tainted (3.3.0-rc1-00008-g45030e9 #992)
[ 1.515289] PC is at 0xffff0018
[ 1.518615] LR is at omap_hdq_probe+0xd4/0x2cc
The OMAP4430 ES2 Rev X TRM does warn about this restriction in section
23.2.6.2 "HDQ/1-Wire Registers".
Fixes the crash on OMAP4430 ES2 Pandaboard. Tested also on OMAP34xx and
OMAP2420; it seems to work fine on those chips, although due to the lack
of boards with HDQ/1-wire devices here, a more indepth test was not
possible.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: NeilBrown <neilb@suse.de>
Cc: Evgeniy Polyakov <zbr@ioremap.net>
Acked-by: Evgeniy Polyakov <zbr@ioremap.net>
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Allow the OMAP HDQ1W driver to be built for all OMAP2+ SoCs by
adjusting KConfig dependencies. The previous dependency required
either SOC_OMAP2430 or ARCH_OMAP3 to be set, but the HDQ IP block is
present on OMAP2420 and OMAP44xx SoCs. The driver was still
selectable on multi-OMAP kernel configurations, however; so the
previous prohibition was rather pointless.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Evgeniy Polyakov <zbr@ioremap.net>
Acked-by: Evgeniy Polyakov <zbr@ioremap.net>
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* imx/cpuidle:
ARM: imx: Add imx6q cpuidle driver
ARM: imx: Add imx5 cpuidle
ARM: imx: Add common imx cpuidle init functionality.
ARM: imx: Enable imx53 low power idle
ARM: imx: clean and consolidate imx5 suspend and idle code
ARM: imx: Add comments to tzic_enable_waker()
ARM: imx: Modify IMX_IO_P2V macro
Resolved trivial context conflict in arch/arm/plat-mxc/include/mach/common.h
Signed-off-by: Olof Johansson <olof@lixom.net>
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Add basic imx6q cpuidle driver. For now, only basic WFI state is
supported. Deeper idle states will be added in the future.
Signed-off-by: Robert Lee <rob.lee@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add cpuidle driver for imx5 platform.
Signed-off-by: Robert Lee <rob.lee@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add common cpuidle init functionality that can be used by various
imx platforms.
Signed-off-by: Robert Lee <rob.lee@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add various functionality needed to enable a imx53 low power idle
state. This includes adding the imx53 gpc_dvfs clock and making a
common imx5_late_init function and initializing all imx53
MACHINE_STATE late_init calls to imx5_late_init.
Signed-off-by: Robert Lee <rob.lee@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The imx5 idle code that existed in mm-imx5.c is moved to pm-imx5.c.
The imx5_pm_init call is now exported and called during the
MACHINE_START late_init in supported imx5 platforms.
Remove various enabling/disabling of the gpc_dvfs clock and
enable it once during initialization. This is a very low
power clock that must be enabled during low power operations.
There are only two "suspend_state_t" imx5 low power modes ever
used. STOP_POWER_OFF for suspend to mem and
WAIT_UNCLOCKED_POWER_OFF for idle and suspend to standby. The
latter mode only requires 500 nanoseconds of extra hardware
exit time beyond a basic WFI operation (WAIT_CLOCKED mode) so
no other idle mode is necessary. Given this information, it
is more efficient to keep the registers in the often used
WAIT_UNCLOCKED_POWER_OFF state and only to and from the
STOP_POWER_OFF register state as needed when suspend to
mem is required.
Signed-off-by: Robert Lee <rob.lee@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add additional comments to the tzic_enable_wake() funciton to
clarify its intended usage.
Signed-off-by: Robert Lee <rob.lee@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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A change is needed in the IMX_IO_P2V macro to allow all imx5 platforms
to use common definitions when accessing registers of peripherals on
the AIPS2 bus. With this change, IMX_IO_P2V(MX50_AIPS2_BASE_ADDR) ==
IMX_IO_P2V(MX51_AIPS2_BASE_ADDR) == IMX_IO_P2V(MX53_AIPS2_BASE_ADDR).
This change was tested for mapping conflicts using the iop2v script
found at git://git.pengutronix.de/git/ukl/imx-iop2v.git and by
performing a bootup of a default build using imx_v6_v7_defconfig
on a imx51 babbage board and imx53 loco board. The comments were
modified to reflect the output given by the script which shows the
virtual address mappings.
Signed-off-by: Robert Lee <rob.lee@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Coult -> Could
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Pull KVM fixes from Avi Kivity:
"Fixing a scheduling-while-atomic bug in the ppc code, and a bug which
allowed pci bridges to be assigned to guests."
* git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: PPC: Book3S HV: Drop locks around call to kvmppc_pin_guest_page
KVM: Fix PCI header check on device assignment
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At the moment we call kvmppc_pin_guest_page() in kvmppc_update_vpa()
with two spinlocks held: the vcore lock and the vcpu->vpa_update_lock.
This is not good, since kvmppc_pin_guest_page() calls down_read() and
get_user_pages_fast(), both of which can sleep. This bug was introduced
in 2e25aa5f ("KVM: PPC: Book3S HV: Make virtual processor area
registration more robust").
This arranges to drop those spinlocks before calling
kvmppc_pin_guest_page() and re-take them afterwards. Dropping the
vcore lock in kvmppc_run_core() means we have to set the vcore_state
field to VCORE_RUNNING before we drop the lock, so that other vcpus
won't try to run this vcore.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Avi Kivity <avi@redhat.com>
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The masking was wrong (must have been 0x7f), and there is no need to
re-read the value as pci_setup_device already does this for us.
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=43339
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband
Pull InfiniBand/RDMA fixes from Roland Dreier:
- Fixes to new ocrdma driver
- Typo in test in CMA
* tag 'rdma-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband:
RDMA/cma: QP type check on received REQs should be AND not OR
RDMA/ocrdma: Fix off by one in ocrdma_query_gid()
RDMA/ocrdma: Fixed RQ error CQE polling
RDMA/ocrdma: Correct queue SGE calculation
RDMA/ocrdma: Correct reported max queue sizes
RDMA/ocrdma: Fixed GID table for vlan and events
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The dev->sgid_tbl[] array is allocated in ocrdma_alloc_resources().
It has OCRDMA_MAX_SGID elements so the test here is off by one.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Roland Dreier <roland@purestorage.com>
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Fix RQ/SRQ error CQE polling. Return error CQE to consumer for error
case which was not returned previously.
Signed-off-by: Parav Pandit <parav.pandit@emulex.com>
Signed-off-by: Roland Dreier <roland@purestorage.com>
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Fix max sge calculation for sq, rq, srq for all hardware types.
Signed-off-by: Mahesh Vardhamanaiah <mahesh.vardhamanaiah@emulex.com>
Signed-off-by: Roland Dreier <roland@purestorage.com>
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Fix code to read the max wqe and max rqe values from mailbox response.
Signed-off-by: Mahesh Vardhamanaiah <mahesh.vardhamanaiah@emulex.com>
Signed-off-by: Roland Dreier <roland@purestorage.com>
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1. Fix reporting GID table addition events.
2. Enable vlan based GID entries only when VLAN is enabled at compile
time (test CONFIG_VLAN_8021Q / CONFIG_VLAN_8021Q_MODULE).
Signed-off-by: Parav Pandit <parav.pandit@emulex.com>
Signed-off-by: Roland Dreier <roland@purestorage.com>
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Change || check to the intended && when checking the QP type in a
received connection request against the listening endpoint.
Signed-off-by: Sean Hefty <sean.hefty@intel.com>
Signed-off-by: Roland Dreier <roland@purestorage.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Nothing very controversial in here. Most of the fixes are for OMAP
this time around, with some orion/kirkwood and a tegra patch mixed in."
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: Orion: Fix Virtual/Physical mixup with watchdog
ARM: Kirkwood: clk_register_gate_fn: add fn assignment
ARM: Orion5x - Restore parts of io.h, with rework
ARM: OMAP4: hwmod data: Force HDMI in no-idle while enabled
ARM: OMAP2+: mux: fix sparse warning
ARM: OMAP2+: CM: increase the module disable timeout
ARM: OMAP4: clock data: add clockdomains for clocks used as main clocks
ARM: OMAP4: hwmod data: fix 32k sync timer idle modes
ARM: OMAP4+: hwmod: fix issue causing IPs not going back to Smart-Standby
ARM: OMAP: Fix Beagleboard DVI reset gpio
arm/dts: OMAP2: Fix interrupt controller binding
ARM: OMAP2: Fix tusb6010 GPIO interrupt for n8x0
ARM: OMAP2+: Fix MUSB ifdefs for platform init code
ARM: tegra: make tegra_cpu_reset_handler_enable() __init
ARM: OMAP: PM: Lock clocks list while generating summary
ARM: iconnect: Remove include of removed linux/spi/orion_spi.h
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The orion watchdog is expecting to be passed the physcial address of
the hardware, and will ioremap() it to give a virtual address it will
use as the base address for the hardware. However, when creating the
platform resource record, a virtual address was being used.
Add the necassary #define's so we can pass the physical address as
expected.
Tested on Kirkwood and Orion5x.
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Olof Johansson <olof@lixom.net>
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In commit:
98d9986 ARM: Kirkwood: Replace clock gating
the kirkwood clock gating has been reworked. A custom variant of
clock gating, that calls a custom function before gating the clock
off, has been introduced. However in clk_register_gate_fn() this
custom function "fn" is never assigned.
This patch adds the missing fn assignment.
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@blackshift.org>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Commit 4d5fc58dbe34b78157c05b319669bb3e064ba8bd (ARM: remove bunch of
now unused mach/io.h files) removed the orion5x io.h. Unfortunately,
this is still needed for the definition of IO_SPACE_LIMIT which
overrides the default 64K. All Orion based systems have 1Mbyte of IO
space per PCI[e] bus, and try to request_resource() this size. Orion5x
has two such PCI buses.
It is likely that the original, removed version, was broken. This
version might be less broken. However, it has not been tested on
hardware with a PCI card, let alone hardware with a PCI card with IO
capabilities.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into fixes
From Paul Walmsley (as per Tony Lindgren's request):
"Some uncontroversial OMAP clock, hwmod, and compiler warning fixes for 3.5-rc"
* tag 'omap-fixes-a-for-3.5rc' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending:
ARM: OMAP4: hwmod data: Force HDMI in no-idle while enabled
ARM: OMAP2+: mux: fix sparse warning
ARM: OMAP2+: CM: increase the module disable timeout
ARM: OMAP4: clock data: add clockdomains for clocks used as main clocks
ARM: OMAP4: hwmod data: fix 32k sync timer idle modes
ARM: OMAP4+: hwmod: fix issue causing IPs not going back to Smart-Standby
ARM: OMAP: PM: Lock clocks list while generating summary
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As per the OMAP4 documentation, audio over HDMI must be transmitted in
no-idle mode. This patch adds the HWMOD_SWSUP_SIDLE so that omap_hwmod uses
no-idle/force-idle settings instead of smart-idle mode.
This is required as the DSS interface clock is used as functional clock
for the HDMI wrapper audio FIFO. If no-idle mode is not used, audio could
be choppy, have bad quality or not be audible at all.
Signed-off-by: Ricardo Neri <ricardo.neri@ti.com>
[b-cousson@ti.com: Update the subject and align the .flags
location with the script template]
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Commit bbd707acee279a61177a604822db92e8164d00db ("ARM: omap2: use
machine specific hook for late init") resulted in the addition of this
sparse warning:
arch/arm/mach-omap2/mux.c:791:12: warning: symbol 'omap_mux_late_init' was not declared. Should it be static?
Fix by including the header file containing the prototype.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Tony Lindgren <tony@atomide.com>
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Increase the timeout for disabling an IP block to five milliseconds.
This is to handle the usb_host_fs idle latency, which takes almost
four milliseconds after a host controller reset.
This is the second of two patches needed to resolve the following
boot warning:
omap_hwmod: usb_host_fs: _wait_target_disable failed
Thanks to Sergei Shtylyov <sshtylyov@mvista.com> for finding
an unrelated hunk in a previous version of this patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
Cc: Tero Kristo <t-kristo@ti.com>
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Until the OMAP4 code is converted to disable the use of the clock
framework-based clockdomain enable/disable sequence, any clock used as
a hwmod main_clk must have a clockdomain associated with it. This
patch populates some clock structure clockdomain names to resolve the
following warnings during kernel init:
omap_hwmod: dpll_mpu_m2_ck: missing clockdomain for dpll_mpu_m2_ck.
omap_hwmod: trace_clk_div_ck: missing clockdomain for trace_clk_div_ck.
omap_hwmod: l3_div_ck: missing clockdomain for l3_div_ck.
omap_hwmod: ddrphy_ck: missing clockdomain for ddrphy_ck.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
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The 32k sync timer IP block target idle modes in the hwmod data are
incorrect. The IP block does not support any smart-idle modes.
Update the data to reflect the correct modes.
This problem was initially identified and a diff fragment posted to
the lists by Benoît Cousson <b-cousson@ti.com>. A patch description
bug in the first version was also identified by Benoît.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
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