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* Merge tag 'tegra-for-3.9-soc-ccf' of ↵Olof Johansson2013-02-0567-7651/+6426
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc From Stephen Warren: ARM: tegra: Common Clock Framework rework Tegra already supports the common clock framework, but had issues: 1) The clock driver was located in arch/arm/mach-tegra/ rather than drivers/clk/. 2) A single "Tegra clock" type was implemented, rather than separate clock types for PLL, mux, divider, ... type in HW. 3) Clock lookups by device drivers were still driven by device name and connection ID, rather than through device tree. This pull request solves all three issues. This required some DT changes to add clocks properties, and driver changes to request clocks more "correctly". Finally, this rework allows all AUXDATA to be removed from Tegra board files, and various duplicate clock lookup entries to be removed from the driver. This pull request is based on the previous pull request, with tag tegra-for-3.9-cleanup. * tag 'tegra-for-3.9-soc-ccf' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (31 commits) clk: tegra30: remove unused TEGRA_CLK_DUPLICATE()s clk: tegra20: remove unused TEGRA_CLK_DUPLICATE()s ARM: tegra30: remove auxdata ARM: tegra20: remove auxdata ASoC: tegra: remove auxdata staging: nvec: remove use of clk_get_sys ARM: tegra: paz00: add clock information to DT ARM: tegra: add clock properties to Tegra30 DT ARM: tegra: add clock properties to Tegra20 DT spi: tegra: do not use clock name to get clock ARM: tegra: remove legacy clock code ARM: tegra: migrate to new clock code clk: tegra: add clock support for Tegra30 clk: tegra: add clock support for Tegra20 clk: tegra: add Tegra specific clocks ARM: tegra: define Tegra30 CAR binding ARM: tegra: define Tegra20 CAR binding ARM: tegra: move tegra_cpu_car.h to linux/clk/tegra.h ARM: tegra: add function to read chipid ARM: tegra: fix compile error when disable CPU_IDLE ... Signed-off-by: Olof Johansson <olof@lixom.net> Conflicts: arch/arm/mach-tegra/board-dt-tegra20.c arch/arm/mach-tegra/board-dt-tegra30.c arch/arm/mach-tegra/common.c arch/arm/mach-tegra/platsmp.c drivers/clocksource/Makefile
| * clk: tegra30: remove unused TEGRA_CLK_DUPLICATE()sPrashant Gaikwad2013-01-281-70/+0
| | | | | | | | | | | | | | | | | | With device tree support added for Tegra clocks look up is done from device tree, remove unused TEGRA_CLK_DUPLICATE()s. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * clk: tegra20: remove unused TEGRA_CLK_DUPLICATE()sPrashant Gaikwad2013-01-281-17/+0
| | | | | | | | | | | | | | | | | | With device tree support added for Tegra clocks look up is done from device tree, remove unused TEGRA_CLK_DUPLICATE()s. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra30: remove auxdataPrashant Gaikwad2013-01-281-30/+1
| | | | | | | | | | | | | | Remove AUXDATA as clocks are initialized from device node. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra20: remove auxdataPrashant Gaikwad2013-01-281-24/+0
| | | | | | | | | | | | | | Remove AUXDATA as clock are initialized from device node. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ASoC: tegra: remove auxdataPrashant Gaikwad2013-01-281-12/+2
| | | | | | | | | | | | | | | | | | Configlink clock information is added to device tree. Get the clocks using device node. Remove AUXDATA. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * staging: nvec: remove use of clk_get_sysPrashant Gaikwad2013-01-282-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | As clock information is added to device tree clock can be looked up using clk_get. Remove use of clk_get_sys. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Marc Dietrich <marvin24@gmx.de> Acked-by: Julian Andres Klode <jak@jak-linux.org> [swarren: updated TODO file to remove entry that requested this change] Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: paz00: add clock information to DTPrashant Gaikwad2013-01-281-0/+2
| | | | | | | | | | | | | | Add clock i2c clock information to device node. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: add clock properties to Tegra30 DTPrashant Gaikwad2013-01-281-1/+55
| | | | | | | | | | | | | | | | Add clock information to device nodes. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: added second clock to 3d node] Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: add clock properties to Tegra20 DTPrashant Gaikwad2013-01-281-0/+44
| | | | | | | | | | | | | | Add clock information to device nodes. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * spi: tegra: do not use clock name to get clockPrashant Gaikwad2013-01-282-2/+2
| | | | | | | | | | | | | | | | | | Since Tegra spi devices do not have multiple clocks, no need to use clock name to get the clock. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: remove legacy clock codePrashant Gaikwad2013-01-2811-7141/+0
| | | | | | | | | | | | | | Remove all legacy clock code from mach-tegra. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: migrate to new clock codePrashant Gaikwad2013-01-2821-142/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Migrate Tegra clock support to drivers/clk/tegra, this involves moving: 1. definition of tegra_cpu_car_ops to clk.c 2. definition of reset functions to clk-peripheral.c 3. change parent of cpu clock. 4. Remove legacy clock initialization. 5. Initialize clocks using DT. 6. Remove all instance of mach/clk.h Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: use to_clk_periph_gate().] Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * clk: tegra: add clock support for Tegra30Prashant Gaikwad2013-01-283-0/+2064
| | | | | | | | | | | | | | | | | | | | | | Add Tegra30 clock support based on common clock framework. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: ensure all OF lookups return valid cookies i.e. an explicit error pointer or valid pointer not NULL, adapt to renames in earlier patches, fixed some checkpatch issues.] Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * clk: tegra: add clock support for Tegra20Prashant Gaikwad2013-01-283-0/+1281
| | | | | | | | | | | | | | | | | | | | | | | | Add Tegra20 clock support based on common clock framework. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: s/1GHz/100MHz/ in call to tegra_clk_plle() to fix PCIe, implemented KBC clock, ensure all OF lookups return valid cookies i.e. an explicit error pointer or valid pointer not NULL, adapt to renames in earlier patches, fixed some checkpatch issues.] Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * clk: tegra: add Tegra specific clocksPrashant Gaikwad2013-01-2811-0/+2126
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Tegra specific clocks, pll, pll_out, peripheral, frac_divider, super. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: alloc sizeof(*foo) not sizeof(struct foo), add comments re: storing pointers to stack variables, make a timeout loop more idiomatic, use _clk_pll_disable() not clk_disable_pll() from _program_pll() to avoid redundant lock operations, unified tegra_clk_periph() and tegra_clk_periph_nodiv(), unified tegra_clk_pll{,e}, rename all clock registration functions so they don't have the same name as the clock structs, return -EINVAL from clk_plle_enable when matching table rate not found, pass ops to _tegra_clk_register_pll rather than a bool.] Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: define Tegra30 CAR bindingPrashant Gaikwad2013-01-282-0/+268
| | | | | | | | | | | | | | | | | | The device tree binding models Tegra30 CAR (Clock And Reset) as a single monolithic clock provider. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: fixed typo in binding doc] Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: define Tegra20 CAR bindingStephen Warren2013-01-282-0/+211
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra20 CAR (Clock And Reset) Controller controls most aspects of most clocks within Tegra20. The device tree binding models this as a single monolithic clock provider, which exports many clocks. This reduces the number of nodes needed in device tree to represent these clocks. This binding is only useful for Tegra20; the set of clocks that exists on Tegra30 is sufficiently different to merit its own binding. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> [pgaikwad: Added mux clk ids and sorted CAR node] Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: move tegra_cpu_car.h to linux/clk/tegra.hPrashant Gaikwad2013-01-2810-12/+12
| | | | | | | | | | | | | | | | tegra_cpu_car_ops struct is going to be accessed from drivers/clk/tegra. Move the tegra_cpu_car_ops to include/linux/clk/tegra.h. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: add function to read chipidPrashant Gaikwad2013-01-282-1/+29
| | | | | | | | | | | | | | | | | | Add function to read chip id from APB MISC registers. This function will also get called from clock driver to flush write operations on apb bus. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: fix compile error when disable CPU_IDLEJoseph Lo2013-01-281-1/+1
| | | | | | | | | | | | | | | | | | | | The "sleep.S" file has many functions that be shared by different module currently. Not just for CPU idle driver. Make it build as default now. Reported-by: Rhyland Klein <rklein@nvidia.com> Signed-off-by: Joseph Lo <josephl@nvidia.com> [swarren: add sleep.o to separate line so each line only contains 1 file] Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra30: make the wait time of CPU power up to proportional to HZJoseph Lo2013-01-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | It would rather to use the API of time_to_jiffies than a constant number of jiffies for the wait time of CPU power up. Based on the work by: Sang-Hun Lee <sanlee@nvidia.com> Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: make device can run on UPJoseph Lo2013-01-286-223/+246
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The reset handler code is used for either UP or SMP. To make Tegra device can compile for UP. It needs to be moved to another file that is not SMP only. This is because the reset handler also be needed by CPU idle "powered-down" mode. So we also need to put the reset handler init function in non-SMP only and init them always. And currently the implementation of the reset handler to know which CPU is OK to bring up was identital with "cpu_present_mask". But the "cpu_present_mask" did not initialize yet when the reset handler init function was moved to init early function. We use the "cpu_possible_mask" to replace "cpu_present_mask". Then it can work on both UP and SMP case. Signed-off-by: Joseph Lo <josephl@nvidia.com> [swarren: dropped the move of v7_invalidate_l1() from one file to another, to avoid conflicts with Pavel's cleanup of this function, adjust Makefile so each line only contains 1 file.] Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: clean up the CPUINIT sectionJoseph Lo2013-01-283-7/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are some redundant codes in the CPUINIT section that was caused by some codes not be organized well in "headsmp.S". Currently all the codes in "headsmp.S" were put into CPUINIT section. But actually it doesn't need to be loacted in CPUINIT section. There is no fuction access them in CPUINIT section and we will relocate them to IRAM. These codes also caused some unnecessary functions that access these codes been put into CPUINIT section too. This patch clean it up and put them into normal text section. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: moving the clock gating procedure to tegra_cpu_killJoseph Lo2013-01-283-6/+13
| | | | | | | | | | | | | | | | | | | | | | The tegra_cpu_die was be executed by the CPU itslf. So the clock gating procedure won't be executed after the CPU hardware shutdown code. Moving the clock gating procedure to tegra_cpu_kill that will be run by another CPU after the CPU died. Signed-off-by: Joseph Lo <josephl@nvidia.com> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: update the cache maintenance order for CPU shutdownJoseph Lo2013-01-285-9/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updating the cache maintenance order before CPU shutdown when doing CPU hotplug. The old order: * clean L1 by flush_cache_all * exit SMP * CPU shutdown Adapt to: * disable L1 data cache by clear C bit * clean L1 by v7_flush_dcache_louis * exit SMP * CPU shutdown For CPU hotplug case, it's no need to do "flush_cache_all". And we should disable L1 data cache before clean L1 data cache. Then leaving the SMP coherency. Signed-off-by: Joseph Lo <josephl@nvidia.com> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra30: fix power up sequence for boot_secondaryJoseph Lo2013-01-281-1/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The power up sequence is different on the cold boot CPU and the CPU that resumed from the hotplug. For the cold boot CPU, it was been power gated as default. To power up the cold boot CPU, the power should be un-gated by un toggling the power gate register manually. For the CPU that resumed from the hotplug, after un-halted the CPU. The flow controller will un-gate the power of the CPU. No need to manually control, just wait the power be resumed and continue the power up sequence after the CPU power is ready. Based on the work by: Varun Wadekar <vwadekar@nvidia.com> Signed-off-by: Joseph Lo <josephl@nvidia.com> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: cpufreq: move clk_get/put out of function tegra_cpu_init/exitRichard Zhao2013-01-281-20/+20
| | | | | | | | | | | | | | | | | | tegra_cpu_init/exit will be called every time one cpu core is online or offline. And all cpu cores share same clocks, redundant clk_get/put wast time, so I move them out. Signed-off-by: Richard Zhao <linuxzsc@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: fix Kconfig warnings when !SMPStephen Warren2013-01-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | Fix: warning: (ARCH_TEGRA_2x_SOC) selects ARM_ERRATA_754327 which has unmet direct dependencies (CPU_V7 && SMP) warning: (ARCH_TEGRA_2x_SOC) selects ARM_ERRATA_742230 which has unmet direct dependencies (CPU_V7 && SMP) by selecting options only if SMP. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: Make variables staticHiroshi Doyu2013-01-285-12/+12
| | | | | | | | | | | | | | | | No need to be public. Checked with: $ touch arch/arm/mach-tegra/*[ch] && make C=1 Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * clocksource: tegra: cosmetic: Fix error messageHiroshi Doyu2013-01-281-1/+1
| | | | | | | | | | | | | | Add missing \n. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: move timer.c to drivers/clocksource/Stephen Warren2013-01-287-9/+8
| | | | | | | | | | | | | | | | Move arch/arm/mach-tegra/timer.c to drivers/clocksource/tegra20_timer.c so that the code is co-located with other clocksource drivers, and to reduce the size of the mach-tegra directory. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * Merge remote-tracking branch 'korg_arm-soc/timer/cleanup' into for-3.9/cleanupStephen Warren2013-01-28531-1510/+939
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* | \ Merge tag 'renesas-soc3-for-v3.9' of ↵Olof Johansson2013-02-051-1/+2
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc From Simon Horman: Third round of Renesas ARM-based SoC changes for v3.9 A fix for r8a7779 clocks. * tag 'renesas-soc3-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7779: Correct TMU clock support
| * | | ARM: shmobile: r8a7779: Correct TMU clock supportSimon Horman2013-02-051-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During code review it was noticed that the clock value for TMU01 was incorrect and the value for TMU02 was missing. For reference: As of 3.8-rc6 there are no in-tree consumes of these clocks. Reported-by: Denis Oliver Kropp <dok@directfb.org> Reviewed-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | | | Merge tag 'drivers_for_v3.9' of git://git.infradead.org/users/jcooper/linux ↵Olof Johansson2013-02-0414-17/+84
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into next/soc From Jason Cooper: mvebu drivers for v3.9 - use rtc-mv in mvebu armv7 SoCs - add pci-e hotplug for kirkwood Depends on: - tags/mvebu_fixes_for_v3.8-rc6 * tag 'drivers_for_v3.9' of git://git.infradead.org/users/jcooper/linux: cpuidle: kirkwood: Move out of mach directory rtc: Add support of rtc-mv for MVEBU SoCs ARM: Kirkwood: Support basic hotplug for PCI-E arm: mvebu: i2c come back in defconfig arm: plat-orion: fix printing of "MPP config unavailable on this hardware" Dove: activate GPIO interrupts in DT
| * | | | cpuidle: kirkwood: Move out of mach directoryAndrew Lunn2013-01-319-8/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the Kirkwood cpuidle driver out of arch/arm/mach-kirkwood and into drivers/cpuidle. Convert the driver into a platform driver. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * | | | rtc: Add support of rtc-mv for MVEBU SoCsGregory CLEMENT2013-01-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Armada 370 and Armada XP Socs have the same controller that the one used in the orion platforms. This patch enables the selection of rtc-mv with mvebu platforms. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Florian Fainelli <florian@openwrt.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * | | | ARM: Kirkwood: Support basic hotplug for PCI-EJason Gunthorpe2013-01-301-7/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unconditionally register the PCI-E bus, even if the link is currently down. When the link is brought up the bus can be scanned through /sys/bus/pci/rescan or otherwise. Since the HW has no interrupt for link up, userspace will have to take care of the timing. An earlier version of this was contingent on CONFIG_HOTPLUG, but that is being removed from the kernel. This also fixes printing the link up/down message to be displayed on one line (structured logging broke this?) Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * | | | Merge tag 'tags/mvebu_fixes_for_v3.8-rc6' into mvebu/driversJason Cooper2013-01-303-1/+5
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fixes for v3.8-rc6 - add missing gpio interrupt lines to dove dt - fix bad logic for printing MPP error message on orion boards - build proper serial port driver after changing mvebu DT compatible property - This is a change to mvebu_defconfig that I wouldn't usually push out as a fix. However, the commit b24212f arm: mvebu: Use dw-apb-uart instead of ns16650 as UART driver changed the serial driver for the board in the dts file. without the patch I've included in this pull, users won't see any log messages.
| | * | | | arm: mvebu: i2c come back in defconfigGregory CLEMENT2013-01-231-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the patch "arm: mvebu: Use dw-apb-uart instead of ns16650 as UART driver" was applied to a git tree and became the commit b24212fbfba25 it wrongly removed the i2c support. This patch reintroduce it. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | | | arm: plat-orion: fix printing of "MPP config unavailable on this hardware"Gerlando Falauto2013-01-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | refactored printing of the kernel warning: "orion_mpp_conf: requested MPP%u config unavailable on this hardware\n" which is not to be printed in case of variant_mask = 0 (unknown variant). This check should be performed using a logical AND (&&) as opposed to a bitwise AND (&). Otherwise, test would fail (and message would not be printed) if variant_mask != 1 Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Olof Johansson <olof@lixom.net> Cc: Nicolas Pitre <nico@linaro.org> Cc: Holger Brunck <holger.brunck@keymile.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | | | Dove: activate GPIO interrupts in DTJean-Francois Moine2013-01-231-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In a DT, the interrupts of an interrupt-controller are not usable when #interrupt-cells is missing. This patch activates the interrupts of the GPIOs 0 and 1 for the Marvell Dove SoC. Signed-off-by: Jean-François Moine <moinejf@free.fr> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | | | | | Merge tag 'v3.8-rc6' into next/socOlof Johansson2013-02-04811-4657/+14143
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | Linux 3.8-rc6
| * | | | | | Linux 3.8-rc6v3.8-rc6Linus Torvalds2013-02-011-2/+2
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| * | | | | | Merge tag 'dm-3.8-fixes-2' of ↵Linus Torvalds2013-02-012-14/+5
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/agk/linux-dm Pull more device-mapper fixes from Alasdair G Kergon: "A fix for stacked dm thin devices and a fix for the new dm WRITE SAME support." * tag 'dm-3.8-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agk/linux-dm: dm: fix write same requests counting dm thin: fix queue limits stacking
| | * | | | | | dm: fix write same requests countingAlasdair G Kergon2013-01-311-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When processing write same requests, fix dm to send the configured number of WRITE SAME requests to the target rather than the number of discards, which is not always the same. Device-mapper WRITE SAME support was introduced by commit 23508a96cd2e857d57044a2ed7d305f2d9daf441 ("dm: add WRITE SAME support"). Signed-off-by: Alasdair G Kergon <agk@redhat.com> Acked-by: Mike Snitzer <snitzer@redhat.com>
| | * | | | | | dm thin: fix queue limits stackingMike Snitzer2013-01-311-12/+1
| | |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | thin_io_hints() is blindly copying the queue limits from the thin-pool which can lead to incorrect limits being set. The fix here simply deletes the thin_io_hints() hook which leaves the existing stacking infrastructure to set the limits correctly. When a thin-pool uses an MD device for the data device a thin device from the thin-pool must respect MD's constraints about disallowing a bio from spanning multiple chunks. Otherwise we can see problems. If the raid0 chunksize is 1152K and thin-pool chunksize is 256K I see the following md/raid0 error (with extra debug tracing added to thin_endio) when mkfs.xfs is executed against the thin device: md/raid0:md99: make_request bug: can't convert block across chunks or bigger than 1152k 6688 127 device-mapper: thin: bio sector=2080 err=-5 bi_size=130560 bi_rw=17 bi_vcnt=32 bi_idx=0 This extra DM debugging shows that the failing bio is spanning across the first and second logical 1152K chunk (sector 2080 + 255 takes the bio beyond the first chunk's boundary of sector 2304). So the bio splitting that DM is doing clearly isn't respecting the MD limits. max_hw_sectors_kb is 127 for both the thin-pool and thin device (queue_max_hw_sectors returns 255 so we'll excuse sysfs's lack of precision). So this explains why bi_size is 130560. But the thin device's max_hw_sectors_kb should be 4 (PAGE_SIZE) given that it doesn't have a .merge function (for bio_add_page to consult indirectly via dm_merge_bvec) yet the thin-pool does sit above an MD device that has a compulsory merge_bvec_fn. This scenario is exactly why DM must resort to sending single PAGE_SIZE bios to the underlying layer. Some additional context for this is available in the header for commit 8cbeb67a ("dm: avoid unsupported spanning of md stripe boundaries"). Long story short, the reason a thin device doesn't properly get configured to have a max_hw_sectors_kb of 4 (PAGE_SIZE) is that thin_io_hints() is blindly copying the queue limits from the thin-pool device directly to the thin device's queue limits. Fix this by eliminating thin_io_hints. Doing so is safe because the block layer's queue limits stacking already enables the upper level thin device to inherit the thin-pool device's discard and minimum_io_size and optimal_io_size limits that get set in pool_io_hints. But avoiding the queue limits copy allows the thin and thin-pool limits to be different where it is important, namely max_hw_sectors_kb. Reported-by: Daniel Browning <db@kavod.com> Signed-off-by: Mike Snitzer <snitzer@redhat.com> Cc: stable@vger.kernel.org Signed-off-by: Alasdair G Kergon <agk@redhat.com>
| * | | | | | Merge branch 'for-3.8/upstream-fixes' of ↵Linus Torvalds2013-02-014-1/+16
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid PullHID fixes from Jiri Kosina: - fix i2c-hid and hidraw interaction, by Benjamin Tissoires - a quirk to make a particular device (Formosa IR receiver) work properly, by Nicholas Santos * 'for-3.8/upstream-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid: HID: i2c-hid: fix i2c_hid_output_raw_report HID: usbhid: quirk for Formosa IR receiver HID: remove x bit from sensor doc
| | * | | | | | HID: i2c-hid: fix i2c_hid_output_raw_reportBenjamin Tissoires2013-01-311-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i2c_hid_output_raw_report is used by hidraw to forward set_report requests. The current implementation of i2c_hid_set_report needs to take the report_id as an argument. The report_id is stored in the first byte of the buffer in argument of i2c_hid_output_raw_report. Not removing the report_id from the given buffer adds this byte 2 times in the command, leading to a non working command. Reported-by: Andrew Duggan <aduggan@synaptics.com> Signed-off-by: Benjamin Tissoires <benjamin.tissoires@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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