| Commit message (Collapse) | Author | Age | Files | Lines |
|---|
| |
|
|
|
|
|
|
|
|
|
| |
As noted by Michał Mirosław <mirqus@gmail.com>, the voltages should
cover the supported voltage range, or support only one voltage.
As all these boards are using a GPIO to enable the power, chances
are that only 3.3V cards are supported on these boards.
Reported-by: Michał Mirosław <mirqus@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Commit 346a5c890 (OMAP: control: move plat-omap/control.h
to mach-omap2/control.h) in the linux-omap tree removed
plat/control.h and most of its callers. This one slipped
through - breaking the build as below when
CONFIG_SND_OMAP_SOC_MCPDM is defined. Fix this.
CC sound/soc/omap/omap-mcpdm.o
sound/soc/omap/omap-mcpdm.c:35: fatal error: plat/control.h: No such file or directory
compilation terminated.
make[3]: *** [sound/soc/omap/omap-mcpdm.o] Error 1
make[2]: *** [sound/soc/omap] Error 2
make[1]: *** [sound/soc] Error 2
make: *** [sound] Error 2
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Cc: Misael Lopez Cruz <misael.lopez@ti.com>
Cc: Liam Girdwood <lrg@slimlogic.co.uk>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Paul Walmsley <paul@pwsan.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |
|
|
|
|
|
|
|
| |
"ret" is unsigned, so check for (ret < 0) made no sense.
Made it signed.
Signed-off-by: Vasiliy Kulikov <segooon@gmail.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Implement the suggested workaround for OMAP3 regarding to sDMA draining
issue, when the channel is disabled on the fly.
This errata affects the following configuration:
sDMA transfer is source synchronized
Buffering is enabled
SmartStandby is selected.
The issue can be easily reproduced by creating overrun situation while
recording audio.
Either introduce load to the CPU:
nice -19 arecord -D hw:0 -M -B 10000 -F 5000 -f dat > /dev/null & \
dd if=/dev/urandom of=/dev/null
or suspending the arecord, and resuming it:
arecord -D hw:0 -M -B 10000 -F 5000 -f dat > /dev/null
CTRL+Z; fg; CTRL+Z; fg; ...
In case of overrun audio stops DMA, and restarts it (without reseting
the sDMA channel). When we hit this errata in stop case (sDMA drain did
not complete), at the coming start the sDMA will not going to be
operational (it is still draining).
This leads to DMA stall condition.
On OMAP3 we can recover with sDMA channel reset, it has been observed
that by introducing unrelated sDMA activity might also help (reading
from MMC for example).
The same errata exists for OMAP2, where the suggestion is to disable the
buffering to avoid this type of error.
On OMAP3 the suggestion is to set sDMA to NoStandby before disabling
the channel, and wait for the drain to finish, than configure sDMA to
SmartStandby again.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by : Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by : Manjunath Kondaiah G <manjugk@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
An errata workaround for omap24xx is not setting the buffering disable bit
25 what is the purpose but channel enable bit 7 instead.
Background for this fix is the DMA stalling issue with ASoC omap-mcbsp
driver. Peter Ujfalusi <peter.ujfalusi@nokia.com> has found an issue in
recording that the DMA stall could happen if there were a buffer overrun
detected by ALSA and the DMA was stopped and restarted due that. This
problem is known to occur on both OMAP2420 and OMAP3. It can recover on
OMAP3 after dma free, dma request and reconfiguration cycle. However, on
OMAP2420 it seems that only way to recover is a reset.
Problem was not visible before the commit c12abc0. That commit changed that
the McBSP transmitter/receiver is released from reset only when needed. That
is, only enabled McBSP transmitter without transmission was able to prevent
this DMA stall problem in receiving side and underlying problem did not show
up until now. McBSP transmitter itself seems to no be reason since DMA
stall does not recover by enabling the transmission after stall.
Debugging showed that there were a DMA write active during DMA stop time and
it never completed even when restarting the DMA. Experimenting showed that
the DMA buffering disable bit could be used to avoid stalling when using
source synchronized transfers. However that could have performance hit and
OMAP3 TRM states that buffering disable is not allowed for destination
synchronized transfers so subsequent patch will implement a method to
complete DMA writes when stopping.
This patch is based on assumtion that complete lock-up on OMAP2420 is
different but related problem. I don't have access to OMAP2420 errata but
I believe this old workaround here is put for a reason but unfortunately
a wrong bit was typed and problem showed up only now.
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Manjunath Kondaiah G <manjugk@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The omap2plus_defconfig doesn't boot up when built with CONFIG_PM
disabled on the latest linux-omap master. Below are the observations
1. OMAP3 reboots in the middle of boot
--------------------------------------------------
[ 0.000000] Calibrating delay loop... 494.72 BogoMIPS (lpj=1933312)
[ 0.000000] pid_max: default: 32768 minimum: 301
[ 0.000000] Security Framework initialized
[ 0.000000] Mount-cache hash table entries: 512
[ 0.000000] CPU: Testing write buffer coherency: ok
[ 0.000000] Brought up 1 CPUs
[ 0.000000] SMP: Total of 1 processors activated (494.72 BogoMIPS).
[ 0.000000] regulator: core version 0.5
[ 0.000000] NET: Registered protocol family 16
U-Boot 1.1.4 (Feb 11 2009 - 16:10:23)
OMAP3430-GP rev 2, CPU-OPP2 L3-165MHz
TI 3430SDP 1.0 Version + mDDR (Boot NOR)
DRAM: 128 MB
Flash: 128 MB
NAND:128 MiB
--------------------------------------------------
2. OMAP4 does a kernel PANIC
-------------------------------------
[ 0.000000] Calibrating delay loop... 1195.29 BogoMIPS (lpj=4669440)
[ 0.000000] pid_max: default: 32768 minimum: 301
[ 0.000000] Security Framework initialized
[ 0.000000] Mount-cache hash table entries: 512
[ 0.000000] CPU: Testing write buffer coherency: ok
[ 0.000000] L310 cache controller enabled
[ 0.000000] l2x0: 16 ways, CACHE_ID 0x410000c2, AUX_CTRL 0x0e050000
[ 0.000000] CPU1: Booted secondary processor
[ 0.000000] Brought up 2 CPUs
[ 0.000000] SMP: Total of 2 processors activated (2395.78 BogoMIPS).
[ 0.000000] regulator: core version 0.5
[ 0.000000] NET: Registered protocol family 16
[ 0.000000] mux: Could not set signal i2c2_scl.i2c2_scl
[ 0.000000] mux: Could not set signal i2c2_sda.i2c2_sda
[ 0.000000] mux: Could not set signal i2c3_scl.i2c3_scl
[ 0.000000] mux: Could not set signal i2c3_sda.i2c3_sda
[ 0.000000] mux: Could not set signal i2c4_scl.i2c4_scl
[ 0.000000] mux: Could not set signal i2c4_sda.i2c4_sda
-------------------------------------
This is happening because 'omap_serial_init()' is hanging in the boot.
On OMAP3 the watchdog is generating reboot because devices_init doesn't
happens where as on OMAP4 it just hangs without reboot.
The uart clock is not getting enabled after omap_device_idle as part
of omap_serial_init.
The omap_device_idle(will disable the clock) then omap_uart_block_sleep()
should enable clock back disabled during the boot up phase.
But omap_uart_block_sleep() stuffed version is binded only under
CONFIG_PM and other version is just empty. Hence it is not enabling
clock back as expected
This patch adds uart clock enable code to omap_uart_block_sleep() function
built with CONFIG_PM disabled.
Thanks to Charulatha and Govindraj for their help on this debug.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Commit 914bab936fe0388a529079679e2f137aa4ff548d (OMAP: mach-omap2: Fix
incorrect assignment warnings) changed a pointer from 'u32 *' to
'void *' without also fixing up the pointer arithmetic.
Fix the scratchpad offsets so they are byte offsets instead of
word offsets and thus work correctly with a void pointer base.
Special thanks to Jean Pihet for taking the time track down this
problem and propose an initial solution.
Tested with off-idle and off-suspend on 36xx/Zoom3 and 34xx/omap3evm.
Cc: Manjunath Kondaiah G <manjugk@ti.com>
Reported-by: Jean Pihet <jean.pihet@newoldbits.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Jean Pihet <jean.pihet@newoldbits.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |\
| |
| |
| | |
into omap-for-linus
|
| | |
| |
| |
| |
| |
| |
| |
| | |
It seems these comments where accidentally added so remove them.
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
This is just a readability and debugging improvement. As selection bit in
DEVCONF register is cleared when using 96 MHz PRCM source and set when using
external CLKS pin, change definitions to be sync with these.
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
|
| | |
| |
| |
| |
| |
| |
| |
| |
| | |
Fix bit clear. Now it clears all other bits than mask bit where it should
clear only it.
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
unused clocks
Reduce the amount of debugging generated by default when unused clocks
are being disabled by the clock code. The previous code would only
generate debug-level messages, but some people who wished to run
production kernels with debug-level messages enabled reported that the
large number of clock disable messages were slowing boot. Now to
enable clock-by-clock disable messages, DEBUG needs to be defined in
mach-omap2/clock.c.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tuukka Tikkanen <tuukka.tikkanen@nokia.com>
Cc: Tim Bird <tim.bird@am.sony.com>
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Only OMAP2+ platforms have the System Control Module (SCM) IP block.
In the past, we've kept the SCM header file in plat-omap. This has
led to abuse - device drivers including it; includes being added that
create implicit dependencies on OMAP2+ builds; etc.
In response, move the SCM headers into mach-omap2/.
As part of this, remove the direct SCM access from the OMAP UDC
driver. It was clearly broken. The UDC code needs an indepth review for
use on OMAP2+ chips.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Cory Maccarrone <darkstar6262@gmail.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Split plat-omap/common.c into three pieces:
1. the 32KiHz sync timer and clocksource code, which now lives in
plat-omap/counter_32k.c;
2. the OMAP2+ common code, which has been moved to mach-omap2/common.c;
3. and the remainder of the OMAP-wide common code, which includes the
deprecated ATAGs code and a deprecated video RAM reservation function.
The primary motivation for doing this is to move the OMAP2+-specific parts
into an OMAP2+-specific file, so that build breakage related to the
System Control Module code can be resolved.
Benoît Cousson <b-cousson@ti.com> suggested a new filename and found
some bugs in the counter_32k.c comments - thanks Benoît.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Previously the OMAP McBSP ASoC driver implemented CLKS switching by
using omap_ctrl_{read,write}l() directly. This is against policy; the OMAP
System Control Module functions are not intended to be exported to drivers.
These symbols are no longer exported, so as a result, the OMAP McBSP ASoC
driver does not build as a module.
Resolve the CLKS clock changing portion of this problem by creating a
clock parent changing function that lives in
arch/arm/mach-omap2/mcbsp.c, and modify the ASoC driver to use it.
Due to the unfortunate way that McBSP support is implemented in ASoC
and the OMAP tree, this symbol must be exported for use by
sound/soc/omap/omap-mcbsp.c.
Going forward, the McBSP device driver should be moved from
arch/arm/*omap* into drivers/ or sound/soc/* and the CPU DAI driver
should be implemented as a platform_driver as many other ASoC CPU DAI
drivers are. These two steps should resolve many of the layering
problems, which will rapidly reappear during a McBSP hwmod/PM runtime
conversions.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
The OMAP ASoC McBSP code implemented CLKR and FSR signal muxing via
direct System Control Module writes on OMAP2+. This required the
omap_ctrl_{read,write}l() functions to be exported, which is against
policy: the only code that should call those functions directly is
OMAP core code, not device drivers. omap_ctrl_{read,write}*() are no
longer exported, so the driver no longer builds as a module.
Fix the pinmuxing part of the problem by removing calls to
omap_ctrl_{read,write}l() from the OMAP ASoC McBSP code and
implementing signal muxing functions in arch/arm/mach-omap2/mcbsp.c.
Due to the unfortunate way that McBSP support is implemented in ASoC
and the OMAP tree, these symbols must be exported for use by
sound/soc/omap/omap-mcbsp.c.
Going forward, the McBSP device driver should be moved from
arch/arm/*omap* into drivers/ or sound/soc/*, and the CPU DAI driver
should be implemented as a platform_driver as many other ASoC CPU DAI
drivers are. These two steps should resolve many of the layering
problems, which will rapidly reappear during a McBSP hwmod/PM runtime
conversion.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
The OMAP3 clock tree already contains the infrastructure to support
clock framework-based McBSP functional clock source switching. But it
did not contain the clkdev aliases for the McBSP code to refer to the
parent clocks in an SoC integration-neutral way. So, add the clkdev
aliases for the parent clocks.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
| | |
| |
| |
| |
| |
| |
| |
| |
| | |
Add the MCBSP_CLKS clock and the clksel structures needed to support clock
framework-based source switching for McBSPs 1-5. Also, add clkdev
aliases on the parent clocks for the McBSP source switching code, added
in a subsequent patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
| | |
| |
| |
| |
| |
| |
| |
| |
| | |
Add the MCBSP_CLKS clock and the clksel structures needed to support clock
framework-based source switching for McBSP 1 and 2. Also, add clkdev
aliases on the parent clocks for the McBSP source switching code, added
in a subsequent patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
| | |
| |
| |
| |
| |
| |
| |
| | |
Conform the OMAP2420_CTRL_BASE macro name to the standard of the rest of the
OMAP*_CTRL_BASE macro names. This fixes a bug in the OMAP2420 SCM code that
prevented OMAP242X_CTRL_REGADDR from working.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
| | |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
currently-selected SoC
Currently, if, for example, CONFIG_ARCH_OMAP2420 is not selected, OMAP2420
board files can still be included in the build. This results in link errors:
arch/arm/mach-omap2/built-in.o: In function `omap_generic_map_io':
.../arch/arm/mach-omap2/board-generic.c:51: undefined reference to `omap2_set_globals_242x'
arch/arm/mach-omap2/built-in.o: In function `omap_h4_init':
.../arch/arm/mach-omap2/board-h4.c:330: undefined reference to `omap2420_mux_init'
arch/arm/mach-omap2/built-in.o: In function `omap_h4_map_io':
.../arch/arm/mach-omap2/board-h4.c:373: undefined reference to `omap2_set_globals_242x'
arch/arm/mach-omap2/built-in.o: In function `omap_apollon_init':
.../arch/arm/mach-omap2/board-apollon.c:325: undefined reference to `omap2420_mux_init'
arch/arm/mach-omap2/built-in.o: In function `omap_apollon_map_io':
.../arch/arm/mach-omap2/board-apollon.c:353: undefined reference to `omap2_set_globals_242x'
make: *** [.tmp_vmlinux1] Error 1
Fix this by making the boards depend on the Kconfig option for the
specific SoC that they use.
Also, while here, fix the mach-omap2/board-generic.c file to remove the
dependency on OMAP2420.
Charulatha Varadarajan <charu@ti.com> caught a typo - thanks Charu.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Charulatha Varadarajan <charu@ti.com>
|
| | |
| |
| |
| |
| |
| |
| |
| |
| | |
The OMAP4 PandaBoard has EHCI port1 hooked up to an external
SMSC3320 transciever. GPIO 1 is used to power on the transceiver
and GPIO 62 for reset on the transceiver.
Signed-off-by: David Anders <x0132446@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| | |
| |
| |
| |
| |
| |
| |
| | |
Avoid possible crash if CONFIG_MMC_OMAP_HS is not set.
Signed-off-by: David Anders <x0132446@ti.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |/
|
|
|
|
|
|
|
|
| |
remove the second hsmmc definition as it is only used on the
expansion header of the PandaBoard and can be mux for other
functions.
Signed-off-by: David Anders <x0132446@ti.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |
|
|
|
|
|
|
|
|
|
|
| |
With the omap-serial the device has changed from ttyS to ttyO as
the system may have both omap-serial and 8250 ports.
Note that systems using omap-serial need to be updated to use ttyO[012]
instead of ttyS[012] in the bootloader, CONFIG_CMDLINE, /etc/inittab,
and the root file system with mknod. Also you may need to add ttyO[012]
to /etc/securetty.
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |
|
|
|
|
|
|
|
|
| |
As is done on OMAP3, check omap_uart_can_sleep() as one of the
pre-conditions for entering the idle loop. Without this check,
entering idle introduces large latencies on active UARTs, and is
especially noticable on serial console.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
| |
Some modules which have 16bit registers can cause imprecise
aborts if a __raw_readl/writel is used to read/write 32 bits.
Add an additional flag to identify modules which have such
hard requirement, and handle it in the hwmod framework.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |
|
|
|
|
|
| |
Remove duplicated include.
Signed-off-by: Nicolas Kaiser <nikai@nikai.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Inorder to avoid any assumptions from bootloader, the watchdog
timer module is reset during init. This enables the watchdog
timer.
Therefore, it is required to disable WDT after it is reset
during init. Otherwise the system would reboot as per the default
watchdog timer registers settings.
Later, when the watchdog driver is loaded, the watchdog timer settings
is adjusted as per the default timer_margin set in the driver and the
driver would supports the normal operations supported by OMAP watchdog
timer.
Signed-off-by: Charulatha V <charu@ti.com>
Reported-by: Kevin Hilman <khilman@deeprootsystems.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |
|
|
|
|
|
|
| |
VMMC2 regulator is configured but it's not used for the IGEP v2, so
remove this regulator from board.
Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |
|
|
|
|
|
|
|
| |
Add i2c eeprom driver to access monitor EDID binary information
from user space, something that is required by 'decode-edid' and
'parse-edid'.
Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Some GPIO's used by WLAN-BT combo on IGEP v2 depends on hardware
revision. This patch handles these GPIO's.
----------------------------------------------------------
| Hw Rev. | WIFI_NPD | WIFI_NRESET | BT_NRESET |
----------------------------------------------------------
| B | gpio94 | gpio95 | - |
| B/C (B-compatible) | gpio94 | gpio95 | gpio137 |
| C | gpio138 | gpio139 | gpio137 |
----------------------------------------------------------
Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
There are currently two versions of IGEP v2 board, this patch introduces a
function to detect the hardware revision of IGEP board.
--------------------------
| Id. | Hw Rev. | GPIO 28 |
--------------------------
| 0 | B/C | high |
| 1 | C | low |
--------------------------
Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |
|
|
|
|
|
|
|
|
| |
The IGEP v2 board has four leds, this patch allows control all
of these LEDs using the LED class if CONFIG_LEDS_GPIO is selected
or using the General Purpose Input/Output (GPIO) interface if
CONFIG_LEDS_GPIO is not selected.
Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |
|
|
|
|
|
|
|
| |
GPIO for various devices are missing from the board initialization.
This patch adds support for the VBUS and over current gpios. Without this
patch, input/outputs from these two sources are ignored.
Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |
|
|
|
|
|
|
|
|
| |
The OMAP3 IGEP module is a low-power, high performance production-ready
system-on-module (SOM) based on TI's OMAP3 family. More about this
board at www.igep.es.
Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
[tony@atomide.com: updated for the mmc changes and to be selected by default]
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| |\
| |
| |
| | |
ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus
|
| | |\ |
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Initialize all omap-uarts for zoom boards. Now zoom_peripheral_init
will initialise all uarts for 3630. 3630sdp_board_init call
zoom_peripheral_init so we can now remove serial_init from 3630sdp
board init as zoom_peripheral_init now will do that the same.
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Enable omap-serial driver in /mach-omap2/Kconfig and
move 8250 driver selection for zoom boards. With omap-serial
driver addition all omap-uarts can be handled with
omap-serial driver.
With addition of omap-serial driver console parameter
needs be changed in bootargs from ttyS* should be
replaced with ttyO* [O --> OMAP not ZERO]
For example: ttyS0[UART1 on 3430SDP] changes to ttyO0.
But with some boards that do not use omap-uart as console uart.
we need to handle them with 8250 driver. Ex: ZOOM2/3.
For zoom2/3 board we need to use 8250 serial driver and
console parameter will remain ttyS0 which basically uses
a Quad uart placed on the debug board connected through a
gpio line.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
This patch adds driver support for OMAP2/3/4 high speed UART.
The driver is made separate from 8250 driver as we cannot
over load 8250 driver with omap platform specific configuration for
features like DMA, it makes easier to implement features like DMA and
hardware flow control and software flow control configuration with
this driver as required for the omap-platform.
This patch involves only the core driver and its dependent.
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Acked-by: Alan Cox <alan@linux.intel.com>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
This patch makes the following:
- Adds missing wakeup padding register handling.
- Fixes a hardcode to use PER module ONLY on UART3.
Signed-off-by: Sergio Aguirre <saaguirre@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | | |
Add prepare idle and resume idle call for uart4 used by 3630.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
To standarize among other uarts (1 to 3), we shall now:
- Enable uart4 autodile bit.
- Enable uart4 wakeup in PER.
- Allow uart4 to wakeup the MPU.
Signed-off-by: Sergio Aguirre <saaguirre@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
This is only valid for omap 36xx family of chips.
Signed-off-by: Sergio Aguirre <saaguirre@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Since the UART enable/idle is done during the idle path (with
interrupts disabled), use the non-locking versions of the hwmod
enable/idle functions.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Since the omap_device for UART is currently managed inside the idle
path itself, don't let the bus-level code suspend/resume the UART.
To prevent this, pm_runtime_get() is used when preparing for suspend
and pm_runtime_put() is used when finished with suspend.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Remove set_uart_globals function as this will not be needed as
physical address for uarts will be taken from hwmod data file.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Major rework of OMAP UART init for omap_device conversion as well as
use with either 8250 driver or new omap-serial driver.
In preparation for a new omap-serial driver, remove 8250 assumptions
and dependencies from the serial core.
Convert UART core and PM support to use omap_device layer. Also add
support for both console on 8250 or omap-serial driver.
omap_device conversion:
- Convert clock API calls to omap_device calls
- Remove all static platform_data setup and configuration. This is
all done by the omap_device build phase.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
| | | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
This patch adds omap_hwmod data for UARTs on OMAP2 and OMAP3
platforms.
UART4 support for 3630 and OMAP2 hwmod data added by Govindraj R.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
