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* drm/radeon/dpm: add debugfs support for rv6xxAlex Deucher2013-07-013-0/+28
| | | | | | | This allows you to look at the current DPM state via debugfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add infrastructure to support debugfs infoAlex Deucher2013-07-012-13/+29
| | | | | | | This lays the frameworks to report realtime power level feedback. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: re-enable state transitions for CaymanAlex Deucher2013-07-011-5/+0
| | | | | | | | Was disabled due to stability issues on certain boards caused by the a bug in the parsing of the atom mc reg tables. That's fixed now so re-enable. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: re-enable state transitions for BTCAlex Deucher2013-07-011-3/+0
| | | | | | | | Was disabled due to stability issues on certain boards caused by the a bug in the parsing of the atom mc reg tables. That's fixed now so re-enable. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: fix typo in radeon_atom_init_mc_reg_table()Alex Deucher2013-07-011-1/+2
| | | | | | | Bad pointer math. Fixes hangs in state transitions with BTC+ asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/atom: fix endian bug in radeon_atom_init_mc_reg_table()Alex Deucher2013-07-011-1/+1
| | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: remove sumo dpm/uvd bringup leftoversAlex Deucher2013-07-011-17/+0
| | | | | | Function doesn't do anything useful. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* Merge branch 'drm-nouveau-next' of ↵Dave Airlie2013-07-01138-5449/+7058
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next - Various fixes that make surviving concurrent piglit more possible. - Buffer object deletion no longer synchronous - Context/register initialisation updates that have been reported to solve some stability issues (particularly on some problematic GF119 chips) - Kernel side support for VP2 video decoding engines * 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (44 commits) drm/nvd0-/disp: handle case where display engine is missing/disabled drm/gr/nvc0-: merge nvc0/nve0 ucode, and use cpp instead of m4 drm/nouveau/bsp/nv84: initial vp2 engine implementation drm/nouveau/vp/nv84: initial vp2 engine implementation drm/nouveau/core: xtensa engine base class implementation drm/nouveau/vdec: fork vp3 implementations from vp2 drm/nouveau/core: move falcon class to engine/ drm/nouveau/kms: don't fail if there's no dcb table entries drm/nouveau: remove limit on gart drm/nouveau/vm: perform a bar flush when flushing vm drm/nvc0/gr: cleanup register lists, and add nvce/nvcf to switches drm/nvc8/gr: update initial register/context values drm/nvc4/gr: update initial register/context values drm/nvc1/gr: update initial register/context values drm/nvc3/gr: update initial register/context values drm/nvc0/gr: update initial register/context values drm/nvd9/gr: update initial register/context values drm/nve4/gr: update initial register/context values drm/nvc0-/gr: bump maximum gpc/tpc limits drm/nvf0/gr: initial register/context setup ...
| * drm/nvd0-/disp: handle case where display engine is missing/disabledMaarten Lankhorst2013-07-016-7/+17
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/gr/nvc0-: merge nvc0/nve0 ucode, and use cpp instead of m4Ben Skeggs2013-07-0114-2587/+1270
| | | | | | | | | | | | No code changes, proven by envyas producing identical binaries. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/bsp/nv84: initial vp2 engine implementationIlia Mirkin2013-07-013-14/+16
| | | | | | | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/vp/nv84: initial vp2 engine implementationIlia Mirkin2013-07-014-14/+17
| | | | | | | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/core: xtensa engine base class implementationIlia Mirkin2013-07-013-0/+209
| | | | | | | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/vdec: fork vp3 implementations from vp2Ilia Mirkin2013-07-016-14/+204
| | | | | | | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/core: move falcon class to engine/Ben Skeggs2013-07-0111-24/+21
| | | | | | | | | | | | | | | | Not really "core" per-se. About to merge Ilia's work adding another similar class for the VP2 xtensa engines, so, seems like a good time to move all these to engine/. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/kms: don't fail if there's no dcb table entriesBen Skeggs2013-07-012-7/+9
| | | | | | | | | | | | Fixes module not loading on Tesla K20. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau: remove limit on gartMaarten Lankhorst2013-07-011-5/+0
| | | | | | | | | | | | | | | | Most graphics cards nowadays have a multiple of this limit as their vram, so limiting GART doesn't seem to make much sense. Signed-off-by: Maarten >Lnkhorst <maarten.lankhorst@canonical.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/vm: perform a bar flush when flushing vmMaarten Lankhorst2013-07-012-0/+8
| | | | | | | | | | | | | | | | | | | | Appears to fix the regression from "drm/nvc0/vm: handle bar tlb flushes internally". nvidia always seems to do this flush after writing values. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvc0/gr: cleanup register lists, and add nvce/nvcf to switchesBen Skeggs2013-07-016-600/+344
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvc8/gr: update initial register/context valuesBen Skeggs2013-07-016-10/+74
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvc4/gr: update initial register/context valuesBen Skeggs2013-07-016-9/+62
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvc1/gr: update initial register/context valuesBen Skeggs2013-07-016-35/+80
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvc3/gr: update initial register/context valuesBen Skeggs2013-07-016-12/+112
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvc0/gr: update initial register/context valuesBen Skeggs2013-07-016-544/+1042
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd9/gr: update initial register/context valuesBen Skeggs2013-07-016-74/+482
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nve4/gr: update initial register/context valuesBen Skeggs2013-07-014-157/+31
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvc0-/gr: bump maximum gpc/tpc limitsBen Skeggs2013-07-011-2/+4
| | | | | | | | | | | | | | Needed for GK110, separate commit to catch any unexpected breaks to other parts of the code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvf0/gr: initial register/context setupBen Skeggs2013-07-016-482/+1057
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nve7/gr: update initial register/context valuesBen Skeggs2013-07-014-3/+12
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nve6/gr: update initial register/context valuesBen Skeggs2013-07-014-113/+383
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau: delay busy bo vma removal until fence signalsBen Skeggs2013-07-014-15/+108
| | | | | | | | | | | | | | As opposed to an explicit wait. Allows userspace to not stall waiting on buffer deletion. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/vm: make each vma take a reference on its parent vmBen Skeggs2013-07-011-1/+4
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/core: remove nouveau_mm.mutex, no more usersBen Skeggs2013-07-013-5/+2
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/vm: take subdev mutex, not the mm, protects against race with ↵Ben Skeggs2013-07-011-16/+17
| | | | | | | | | | | | | | | | | | vm/nvc0 nvc0_vm_flush() accesses the pgd list, which will soon be able to race with vm_unlink() during channel destruction. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvc0/vm: handle bar tlb flushes internallyBen Skeggs2013-07-013-34/+28
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nv50-/vm: take mutex rather than irqsave spinlockBen Skeggs2013-07-012-10/+4
| | | | | | | | | | | | | | | | | | | | These operations can take quite some time, and we really don't want to have to hold a spinlock for too long. Now that the lock ordering for vm and the gr/nv84 hw bug workaround has been reversed, it's possible to use a mutex here. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nv50/vm: remove explicit vm knowledge from enginesBen Skeggs2013-07-019-66/+31
| | | | | | | | | | | | This reverses the lock ordering between VM and gr/nv84:nvc0. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nv50/vm: handle bar tlb flushes internallyBen Skeggs2013-07-013-5/+13
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvc0/gr: port mp trap handling from calim's kepler codeBen Skeggs2013-07-011-6/+38
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nve0/gr: attempt to resume after sm trapsBen Skeggs2013-07-011-16/+6
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nve0/gr: s/tp/tpc/Ben Skeggs2013-07-011-26/+27
| | | | | | | | | | | | NVIDIA's name... Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nve0/fifo: create our playlists up-front, at startupBen Skeggs2013-07-011-14/+14
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nva3/clk: minor improvements to fractional N calculationBen Skeggs2013-07-011-3/+11
| | | | | | | | | | | | | | Helps us to get identical numbers to the binary driver for (at least) Kepler memory PLLs, and fixes a rounding error. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/fb: initialise vram controller as pfb sub-objectBen Skeggs2013-07-0145-733/+1313
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/clk: change init ordering, no longer needed by devinitBen Skeggs2013-07-011-2/+2
| | | | | | | | | | | | | | And, will depend on FB/VOLT/DAEMON being ready when it gets initialised so that it can set/restore clocks. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/devinit: move simple pll setting routines to devinitBen Skeggs2013-07-0124-487/+628
| | | | | | | | | | | | | | | | | | These are pretty much useless for reclocking purposes. Lets make it clearer what they're for and move them to DEVINIT to signify they're for the very simple PLL setting requirements of running the init tables. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau: pass generic subdev to calculation routinesBen Skeggs2013-07-017-18/+17
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nve0/ce: stub interrupt handlerBen Skeggs2013-07-012-0/+17
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nve0/ce: link ce2 to its engine, rather than from graphicsBen Skeggs2013-07-012-2/+2
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nve0/fifo: copy engine context stored in ramfc, not externallyBen Skeggs2013-07-011-8/+14
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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