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* MIPS: AR7: use strlcat() for the command line argumentsYoichi Yuasa2010-02-271-16/+6
| | | | | | | Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/871/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Nuke trailing blank linesRalf Baechle2010-02-2731-31/+0
| | | | | | | Recent git versions now warn about those and they've always been a bit of an annoyance. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Cleanup switches with cases that can be mergedRoel Kluin2010-02-277-27/+5
| | | | | | | | | Signed-off-by: Roel Kluin <roel.kluin@gmail.com> To: linux-mips@linux-mips.org To: Andrew Morton <akpm@linux-foundation.org> To: LKML <linux-kernel@vger.kernel.org> Patchwork: http://patchwork.linux-mips.org/patch/860/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Decode c0_config4 for large TLBs.David Daney2010-02-272-0/+19
| | | | | | | | | | For processors that have more than 64 TLBs, we need to decode both config1 and config4 to determine the total number TLBs. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/866/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Remove probe_tlb().David Daney2010-02-271-31/+0
| | | | | | | | | | | | | The function probe_tlb() only does anything for processors that are not PRID_COMP_LEGACY. This is precisely the set of processors for which decode_configs() is called to do identical tlbsize probing calculations. Therefore probe_tlb() is completely redundant and may be removed. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/865/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: add readl/write_be accessorsFlorian Fainelli2010-02-271-0/+18
| | | | | | | | | | | | | | | MIPS currently lacks the readl_be and writel_be accessors which are required by BCM63xx for OHCI and EHCI support. Let's define them globally for MIPS. This also fixes the compilation of the bcm63xx defconfig against USB. Signed-off-by: Florian Fainelli <ffainelli@freebox.fr> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Patchwork: http://patchwork.linux-mips.org/patch/793/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Lemote-2F: update defconfigWu Zhangjin2010-02-271-294/+670
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Changes: o Serial port related configuration Disable EARLY_PRINTK, CONFIG_SYS_SUPPORTS_ZBOOT_UART16550 Enable the serial port support as module. o PM related support Enable CPUFreq as module, use the external timer(MFGPT) instead of r4k timer. Enable Suspend support Enable Run Time PM support o Enable SM7XX Video Driver Disable the buggy 2d acceleration o Enable CONFIG_OPROFILE as module o Use GZIP instead of LZMA, which need less decompression time o Enable more USB devices support o Enable initrd support(needed by gNewsense) o Enable more crypto support Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/830/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Change the Email address of Wu ZhangjinWu Zhangjin2010-02-2741-62/+48
| | | | | | | | | | | | Currently wuzj@lemote.com is not usable; change it to wuzhangjin@gmail.com. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/829/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Fixup mem.c indentationWu Zhangjin2010-02-271-3/+4
| | | | | | | | | | | | Replace whitespace by tabs. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/828/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: arch/mips/Makefile: Add missing whitespaceWu Zhangjin2010-02-271-3/+3
| | | | | | | | | | | | | This patch add missing whitespace after every "+=" in the loongson related part of arch/mips/Makefile. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/827/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Cleanup of the environment variablesWu Zhangjin2010-02-272-5/+22
| | | | | | | | | | | | | | | | | Changes: o Move bus_clock into prom_init_env() o Initialize the cpu_clock_freq to the default values for the correspoding processor revisions if no such environment variable passed by BIOS/Bootloader. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/826/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Move prom_argc and prom_argv into prom_init_cmdline()Wu Zhangjin2010-02-271-4/+3
| | | | | | | | | | | | | prom_argc and prom_argv are only used by prom_init_cmdline(), move them into the function. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/825/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Remove the serial port output of compressed kernel supportWu Zhangjin2010-02-271-1/+1
| | | | | | | | | | | | | | | The compressed kernel support on loongson family machines is stable now, so, remove the debug information via using SYS_SUPPORTS_ZBOOT instead of SYS_SUPPORTS_ZBOOT_UART16550. This may reduce the image size and speedup the booting. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/824/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Convert loongson_halt() to use unreachable()Wu Zhangjin2010-02-271-3/+2
| | | | | | | | | | | | Use the new unreachable() macro instead of while(1); Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/823/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Lemote-2F: USB: Not Emulate Non-Posted WritesWu Zhangjin2010-02-271-1/+1
| | | | | | | | | | | | | | | Without this patch, when copying large amounts of data between the USB storage devices and the hard disk, the USB device will disconnect regularly. Signed-off-by: Hu Hongbing <huhb@lemote.com> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/822/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Lemote-2F: Get the machine type from PMON_VERWu Zhangjin2010-02-273-3/+54
| | | | | | | | | | | | | | | | | | | | | | | | | Lemote have used the PMON_VER strings to indicate the loongson-2f machine series: PMON_VER=LM8089 Lemote 8.9'' netbook LM8101 Lemote 10.1'' netbook (The above two netbooks have the same kernel support) LM6XXX Lemote FuLoong(2F) box series LM9XXX Lemote LynLoong PC series Before the machtype is supported by the PMON, we can get the machine type from the PMON_VER for these machines, this will help the users a lot. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Cc: Wu Zhangjin <wuzhangjin@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/821/ Patchwork: http://patchwork.linux-mips.org/patch/908/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Staging: Octeon Ethernet: Use constants from in.hDavid Daney2010-02-272-7/+4
| | | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: gregkh@suse.de Patchwork: http://patchwork.linux-mips.org/patch/837/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Staging: Octeon Ethernet: Enable scatter-gather.David Daney2010-02-272-9/+55
| | | | | | | | | | | | | | Octeon ethernet hardware can handle NETIF_F_SG, so we enable it. A gather list of up to six fragments will fit in the SKB's CB structure, so no extra memory is required. If a SKB has more than six fragments, we must linearize it. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: gregkh@suse.de Patchwork: http://patchwork.linux-mips.org/patch/838/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Staging: Octeon Ethernet: Convert to NAPI.David Daney2010-02-275-163/+235
| | | | | | | | | | | | | | | | | Convert the driver to be a reasonably well behaved NAPI citizen. There is one NAPI instance per CPU shared between all input ports. As receive backlog increases, NAPI is scheduled on additional CPUs. Receive buffer refill code factored out so it can also be called from the periodic timer. This is needed to recover from temporary buffer starvation conditions. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: gregkh@suse.de Patchwork: http://patchwork.linux-mips.org/patch/839/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Staging: Octeon Ethernet: Rewrite transmit code.David Daney2010-02-275-123/+150
| | | | | | | | | | | | | Stop the queue if too many packets are queued. Restart it from a high resolution timer. Rearrange and simplify locking and SKB freeing code Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: gregkh@suse.de Patchwork: http://patchwork.linux-mips.org/patch/843/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Staging: Octeon Ethernet: Fix memory allocation.David Daney2010-02-272-20/+31
| | | | | | | | | | | | | | | | After aligning the blocks returned by kmalloc, we need to save the original pointer so they can be correctly freed. There are no guarantees about the alignment of SKB data, so we need to handle worst case alignment. Since right shifts over subtraction have no distributive property, we need to fix the back pointer calculation. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/884/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Staging: Octeon Ethernet: Remove unused code.David Daney2010-02-276-284/+55
| | | | | | | | | | Remove unused code, reindent, and join some spilt strings. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: gregkh@suse.de Patchwork: http://patchwork.linux-mips.org/patch/842/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Fix EOI handling.David Daney2010-02-271-6/+34
| | | | | | | | | | | | | | | | If an interrupt handler disables interrupts, the EOI function will just reenable them. This will put us in an endless loop when the upcoming Ethernet driver patches are applied. Only reenable the interrupt on EOI if it is not IRQ_DISABLED. This requires that the EOI function be separate from the ENABLE function. We also rename the ACK functions to correspond with their function. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: gregkh@suse.de Patchwork: http://patchwork.linux-mips.org/patch/840/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Use optimized memory barrier primitives.David Daney2010-02-272-13/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to achieve correct synchronization semantics, the Octeon port had defined CONFIG_WEAK_REORDERING_BEYOND_LLSC. This resulted in code that looks like: sync ll ... . . . sc ... . . sync The second SYNC was redundant, but harmless. Octeon has a SYNCW instruction that acts as a write-memory-barrier (due to an erratum in some parts two SYNCW are used). It is much faster than SYNC because it imposes ordering on the writes, but doesn't otherwise stall the execution pipeline. On Octeon, SYNC stalls execution until all preceeding writes are committed to the coherent memory system. Using: syncw;syncw ll . . . sc . . Has identical semantics to the first sequence, but is much faster. The SYNCW orders the writes, and the SC will not complete successfully until the write is committed to the coherent memory system. So at the end all preceeding writes have been committed. Since Octeon does not do speculative reads, this functions as a full barrier. The patch removes CONFIG_WEAK_REORDERING_BEYOND_LLSC, and substitutes SYNCW for SYNC in write-memory-barriers. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/850/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: New macro smp_mb__before_llsc.David Daney2010-02-276-25/+32
| | | | | | | | | | | | | | | | | Replace some instances of smp_llsc_mb() with a new macro smp_mb__before_llsc(). It is used before ll/sc sequences that are documented as needing write barrier semantics. The default implementation of smp_mb__before_llsc() is just smp_llsc_mb(), so there are no changes in semantics. Also simplify definition of smp_mb(), smp_rmb(), and smp_wmb() to be just barrier() in the non-SMP case. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/851/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Remove unused macros from barrier.hDavid Daney2010-02-271-2/+0
| | | | | | | | | | The smp_llsc_rmb() and smp_llsc_wmb() macros are not used in the tree, remove them. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/848/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Register some devices on the I2C bus.David Daney2010-02-271-0/+13
| | | | | | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: linux-i2c@vger.kernel.org To: ben-linux@fluff.org To: khali@linux-fr.org Cc: Rade Bozic <rade.bozic.ext@nsn.com> Patchwork: http://patchwork.linux-mips.org/patch/845/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: I2C: Add driver for Cavium OCTEON I2C ports.Rade Bozic2010-02-273-0/+662
| | | | | | | | | | | | | | Signed-off-by: Rade Bozic <rade.bozic.ext@nsn.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: Michael Lawnick <michael.lawnick.ext@nsn.com> To: linux-mips@linux-mips.org To: linux-i2c@vger.kernel.org To: ben-linux@fluff.org To: khali@linux-fr.org Cc: rade.bozic.ext@nsn.com Cc: Michael Lawnick <michael.lawnick.ext@nsn.com> Patchwork: http://patchwork.linux-mips.org/patch/890/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Add I2C platform device.David Daney2010-02-272-0/+77
| | | | | | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: linux-i2c@vger.kernel.org To: ben-linux@fluff.org To: khali@linux-fr.org Cc: Rade Bozic <rade.bozic.ext@nsn.com> Patchwork: http://patchwork.linux-mips.org/patch/847/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Simplify param.h by using <asm-generic/param.h>Robert P. J. Day2010-02-271-16/+1
| | | | | | | Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/810/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: get rid of common/reset.cManuel Lauss2010-02-278-225/+99
| | | | | | | | | | | | | Implement reset / poweroff in the board code instead. The peripheral reset code is gone too since YAMON which all in-tree boards use does the same work when it boots. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/783/ Patchwork: http://patchwork.linux-mips.org/patch/882/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Two-level pagetables for 64-bit kernels with 64KB pages.David Daney2010-02-278-35/+71
| | | | | | | | | | | | | For 64-bit kernels with 64KB pages and two level page tables, there are 42 bits worth of virtual address space This is larger than the 40 bits of virtual address space obtained with the default 4KB Page size and three levels, so there are no draw backs for using two level tables with this configuration. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/761/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: irq: use runtime CPU type detectionManuel Lauss2010-02-271-43/+54
| | | | | | | | | Use runtime CPU detection instead of relying on preprocessor symbols. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/701/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Only build AU1000 INTC code for compatible cpusManuel Lauss2010-02-273-10/+12
| | | | | | | | | | Use the GPIO config symbol to only build Au1000 interrupt code on chips with compatible hw. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/670/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: use runtime cpu detection in GPIO code.Manuel Lauss2010-02-272-49/+51
| | | | | | | | | | | Remove the cpu subtype cpp macros in favor of runtime detection, to improve compile coverage of the alchemy common code. (Increases kernel size by 700 bytes). Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/699/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* NET: au1000-eth: Convert to platform_driver modelFlorian Fainelli2010-02-272-218/+232
| | | | | | | | | | | | | | | | This patch converts the au1000-eth driver to become a full platform-driver as it ought to be. We now pass PHY-speficic configurations through platform_data but for compatibility the driver still assumes the default settings (search for PHY1 on MAC0) when no platform_data is passed. Tested on my MTX-1 board. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Acked-by: David S. Miller <davem@davemloft.net> Patchwork: http://patchwork.linux-mips.org/patch/619/ Patchwork: http://patchwork.linux-mips.org/patch/963/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Add au1000-eth platform deviceFlorian Fainelli2010-02-273-0/+124
| | | | | | | | | | | | | | This patch makes the board code register the au1000-eth platform device. The au1000-eth platform data can be overriden with the au1xxx_override_eth_cfg function like it has to be done for the Bosporus board which uses a different MAC/PHY setup. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: David Miller <davem@davemloft.net> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Patchwork: http://patchwork.linux-mips.org/patch/618/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: DB1200 defconfig updateManuel Lauss2010-02-271-631/+850
| | | | | | Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS/SOUND: Alchemy: DB1200 AC97+I2S audio support.Manuel Lauss2010-02-275-150/+200
| | | | | | | | | | | | | Machine driver for DB1200 AC97 and I2S audio systems, intended as a proper reference asoc machine for Alchemy-based systems. AC97/I2S can be selected at boot time by setting switch S6.7. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Cc: alsa-devel@alsa-project.org Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Extended DB1200 board support.Manuel Lauss2010-02-278-75/+654
| | | | | | | | | | | | | | | | | | | Create own directory for DB1200 code and update it with new features. - SPI support: - tmp121 temperature sensor - SPI flash on DB1200 - I2C support - NE1619 sensor - AT24 eeprom - I2C/SPI can be selected at boot time via switch S6.8 - Carddetect IRQs for SD cards. - gen_nand based NAND support. - hexleds count sleep/wake transitions. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: physmap-flash for all devboardsManuel Lauss2010-02-2711-173/+163
| | | | | | | | | | | Replace the devboard NOR MTD mapping driver with physmap-flash support. Also honor the "swapboot" switch settings wrt. to the layout of the NOR partitions. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Acked-By: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Don't include <linux/smp_lock.h> unnecessarily.Ralf Baechle2010-02-274-4/+0
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* SERIAL 8250: Fixes for Alchemy UARTs.Manuel Lauss2010-02-271-7/+8
| | | | | | | | | | | | | | | | | | Limit the amount of address space claimed for Alchemy serial ports to 0x1000. On the Au1300, ports are only 0x1000 apart, and the registers only extend to 0x110 at most on all supported alchemy models. On the Au1300 the autodetect logic no longer works and this makes it necessary to specify the port type through platform data. Because of this the MSR quirk needs to be moved outside the autoconfig() function which will no longer be called when UPF_FIXED_TYPE is specified. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Andrew Morton <akpm@linux-foundation.org>, Cc: linux-serial@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: UARTs are of type 16550AManuel Lauss2010-02-271-1/+3
| | | | | | | | | UART autodetection breaks on the Au1300 but the IP blocks are identical, at least according to the datasheets. Help the 8250 driver by passing on uart type information via platform data. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Turn on -Werror for devboards and xss1500Florian Fainelli2010-02-272-0/+4
| | | | | | | | Warnings being suppressed, we can now turn on -Werror for boards which did not have it already (devboards and xss1500). Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Fix warnings in DB1x00 / PB1000 / PB1550 board setup codeFlorian Fainelli2010-02-273-5/+10
| | | | | | | | | This patch fixes warnings due to potentially unused variables in board setup code or mixed variables declaration and code (forbidden by ISO C90). Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: remove unused SYS area structureManuel Lauss2010-02-271-49/+0
| | | | | | | Nothing in-tree uses it, so get rid of it. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: get rid of superfluous UART definitionsManuel Lauss2010-02-272-115/+21
| | | | | | | Remove unused uart bit definitions and base macros. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: prom_putchar is board dependentManuel Lauss2010-02-277-69/+51
| | | | | | | | | | | | | | | This patch replaces the general alchemy prom_putchar() implementation in favor of board-specific versions: The UART where the output of prom_putchar is directed to really depends on the board, the current implementation hardcodes this on a per-SoC basis which is just wrong. So a generic uart tx function is provided in the alchemy headers, and the boards can provide their own prom_putchar with custom destination uart, and all in-kernel alchemy boards support early printk. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: change dbdma to accept physical memory addressesManuel Lauss2010-02-277-26/+26
| | | | | | | | | | DMA can only be done from physical addresses; move the "virt_to_phys" source/destination buffer address translation from the dbdma queueing functions (since the hardware can only DMA to/from physical addresses) to their respective users. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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