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* pinctrl/u300/coh901: stop spawning pinctrl from GPIOLinus Walleij2012-11-213-9/+1
| | | | | | | | | | | | Let's stop spawning the pinctrl driver from the GPIO driver, we have these two mechanisms broken apart now, and they can each probe in isolation. If the GPIO driver cannot find its pin controller (pinctrl-u300), the pin controller core will tell it to defer probing. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/u300/coh901: let the gpio_chip register the rangeLinus Walleij2012-11-212-53/+49
| | | | | | | | | | | | | Instead of having the pinctrl driver register the GPIO range for the gpio_chip, making it necessary to instantiate the pin controller from the GPIO driver and pass the GPIO chip as platform data, now let the GPIO chip driver register it's own ranges and have the pinctrl driver look up the GPIO chip from the pinctrl core as necessary. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: add function to retrieve range from pinLinus Walleij2012-11-212-0/+27
| | | | | | | | | | | | | | This adds a function to the pinctrl core to retrieve the GPIO range associated with a certain pin for a certain controller. This is needed when a pinctrl driver want to look up the corresponding struct gpio_chip for a certain pin. As the GPIO drivers can now create these ranges themselves, the pinctrl driver no longer knows about all its associated GPIO chips. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpiolib: return any error code from range creationLinus Walleij2012-11-211-1/+2
| | | | | | | | | | | If we try to create a range for a certain GPIO chip and the target pin controller is not yet available it may return a probe deferral error code, so handle this all the way our by checking the error code. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: make range registration defer properlyLinus Walleij2012-11-211-1/+6
| | | | | | | | | | | | This makes the pinctrl_find_and_add_gpio_range() return -EPROBE_DEFER if the range hosting pin controller cannot be located. We may assume that the common case for why adding a range fails is that the targe pin controller device has not probed yet. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpiolib: rename find_pinctrl_*Linus Walleij2012-11-213-4/+4
| | | | | | | | | | Rename the function find_pinctrl_and_add_gpio_range() to pinctrl_find_and_add_gpio_range() so as to be consistent with the rest of the functions. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpiolib: let gpiochip_add_pin_range() specify offsetLinus Walleij2012-11-214-6/+47
| | | | | | | | | | | | | | | | | | Like with commit 3c739ad0df5eb41cd7adad879eda6aa09879eb76 it is not always enough to specify all the pins of a gpio_chip from offset zero to be added to a pin map range, since the mapping from GPIO to pin controller may not be linear at all, but need to be broken into a few consecutive sub-ranges or 1-pin entries for complicated cases. The ranges may also be sparse. This alters the signature of the function to accept offsets into both the GPIO-chip local pinspace and the pin controller local pinspace. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: nomadik: Staticize non-exported symbolsAxel Lin2012-11-151-14/+12
| | | | | | | | They are not referenced outside of this file, make them static. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: nomadik: Prevent NULL dereference if of_match_device returns NULLAxel Lin2012-11-151-3/+8
| | | | | | | | of_match_device() may return NULL. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: single: dump pinmux register valueHaojian Zhuang2012-11-151-4/+4
| | | | | | | | | | | | Dump pinmux register value, not only function part in the pinmux register. Also fix the issue on caluclating pin offset. The last parameter should be pin number, not register offset. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Pinctrl/spear: plgpio: don't call prepare/unprepareViresh Kumar2012-11-151-4/+15
| | | | | | | | | SPEAr SoC's don't do anything in clk_prepare() of plgpio driver, so there is no need to call this routine multiple times. Just call it once at probe. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: plgpio: Call clk_disable_unprepare only if clk_prepare_enable is calledAxel Lin2012-11-151-1/+2
| | | | | | | | | | This driver allows clk_get() failure, and still work without it. This patch adds !IS_ERR(plgpio->clk) checking in plgpio_request() error path so we only call clk_disable_unprepare() if clk_prepare_enable() is called. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: spear: Make get_gpio_pingroup return NULL when no gpio_pingroup foundAxel Lin2012-11-151-3/+3
| | | | | | | | | | | Currently get_gpio_pingroup() may return NULL or ERR_PTR(-EINVAL) when no gpio_pingroup found. The caller in gpio_request_endisable() only checks if the return value is NULL. Return ERR_PTR(-EINVAL) for get_gpio_pingroup() causes problem and seems not necessary. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: coh901: Return proper error if irq_domain_add_linear() failsAxel Lin2012-11-151-2/+4
| | | | | | | Return -ENOMEM instead of 0 if irq_domain_add_linear fails. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: spear: Fix the logic of setting reg in pmx_init_gpio_pingroup_addrAxel Lin2012-11-151-3/+3
| | | | | | | | Current code does not work if count > 1, fix it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: imx: Fix the logic checking if not able to find pin reg mapAxel Lin2012-11-151-1/+1
| | | | | | | | | Current code sets "pin_reg = &info->pin_regs[i];" in each loop iteration, so in the case of no-match, pin_reg is not NULL. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: tegra: Staticize non-exported symbolsAxel Lin2012-11-151-10/+12
| | | | | | | | They are not referenced outside of this file, make them static. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/nomadik: db8540: split clkout groupPatrice Chotard2012-11-151-5/+10
| | | | | | | | | The clkout group is split into groups clkout1 and clkout2 which allows pins cklkout1 and clkout2 to be muxed separately. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/nomadik: db8500: split clkout groupPatrice Chotard2012-11-151-7/+14
| | | | | | | | | The clkout group is split into groups clkout1 and clkout2 which allows pins cklkout1 and clkout2 to be muxed separately. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: pxa3xx: Remove phy_base and phy_size from struct pxa3xx_pinmux_infoAxel Lin2012-11-152-4/+0
| | | | | | | They are not used, remove them. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: pxa3xx: Use devm_request_and_ioremapAxel Lin2012-11-151-8/+2
| | | | | | | | Use managed resources API to simplify the code. Also ensure we do request mem_region before ioremap. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: tegra: Make PINCTRL_TEGRA select PINMUX && PINCONFAxel Lin2012-11-151-4/+2
| | | | | | | | | Then we can remove "select PINMUX && PINCONF" from PINCTRL_TEGRA{20,30}. This simplifies the dependency. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mxs: Make PINCTRL_MXS select PINMUX && PINCONFAxel Lin2012-11-131-4/+2
| | | | | | | | | Then we can remove "select PINMUX && PINCONF" from PINCTRL_IMX{23,28}. This simplifies the dependency. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: spear: Staticize non-exported symbolsAxel Lin2012-11-131-5/+7
| | | | | | | | They are not referenced outside of this file, make them static. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: pinmux: Release all taken pins in pinmux_enable_setting error pathsAxel Lin2012-11-111-7/+21
| | | | | | | | | Currently pinmux_enable_setting does not release all taken pins if ops->enable() returns error. This patch ensures all taken pins are released in any error paths. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: lantiq: Staticize non-exported symbolsAxel Lin2012-11-111-6/+6
| | | | | | | | | Both ltq_pinctrl_dt_node_to_map() and ltq_pinctrl_dt_free_map() are not referenced outside of this file. Make them static. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: John Crispin <blogic@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: lantiq: Remove ltq_pmx_disable() functionAxel Lin2012-11-111-11/+0
| | | | | | | | | | | | | | Current code adds empty ltq_pmx_disable() because pinmux_check_ops() requires this callback to be defined. This is not required since commit 02b50ce4cb1 "pinctrl: make pinmux disable function optional". Thus remove ltq_pmx_disable() function. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: John Crispin <blogic@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: SPEAr: Add SoC specific gpio configuration routinesShiraz Hashim2012-11-113-14/+53
| | | | | | | | | | | | | | | | | Different SPEAr SoCs have different approach to configure pins as gpios. Some configure a group of gpios with single register bit and others have one bit per gpio pin. Only earlier one is implemented till now, this patch adds support for later one. Here we add callbacks to SoC specific code to configure gpios in gpio_request_enable(). That will do additional SoC specific configuration to enable gpio pins. We also implement this callback for SPEAr1340 in this patch. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: Staticize pinconf_opsAxel Lin2012-11-117-7/+7
| | | | | | | | | | | | | They are not referenced outside respective driver. Signed-off-by: Axel Lin <axel.lin@ingics.com> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Simon Arlott <simon@fire.lp0.eu> Cc: John Crispin <blogic@openwrt.org> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge branch 'nomadik' into develLinus Walleij2012-11-1115-165/+303
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| * pinctrl/nomadik: db8540: fix moduartstmmux_oc4_1 pin group definition.Jean-Nicolas Graux2012-11-091-0/+1
| | | | | | | | | | | | | | One group definition was missing, so add it. Signed-off-by: Jean-Nicolas Graux <jean-nicolas.graux@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl/nomadik: make independent of prcmu driverJonas Aaberg2012-11-091-20/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently there are some unnecessary criss-cross dependencies between the PRCMU driver in MFD and a lot of other drivers, mainly because other drivers need to poke around in the PRCM register range. In cases like this there are actually just a few select registers that the pinctrl driver need to read/modify/write, and it turns out that no other driver is actually using these registers, so there are no concurrency issues whatsoever. So: don't let the location of the register range complicate things, just poke into these registers directly and skip a layer of indirection. Take this opportunity to add kerneldoc to the pinctrl state container. Cc: Loic Pallardy <loic.pallardy@st.com> Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * ARM: ux500: add PRCM register base for pinctrlJonas Aaberg2012-11-082-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | This adds the PRCM register range base as a resource to the pinctrl driver do we can break the dependency to the PRCMU driver and handle these registers in the driver alone. Cc: arm@kernel.org Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: nomadik: Add terminating entry for platform_device_id tableAxel Lin2012-11-051-0/+1
| | | | | | | | | | | | | | The platform_device_id table is supposed to be zero-terminated. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl/nomadik: db8500: fix kp pin groupPatrice Chotard2012-10-281-1/+2
| | | | | | | | | | | | | | | | kp_a_2 pin group was defined but was not declared as a group of kp function. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl/nomadik: debugfs display of other alternate-C functionsJean-Nicolas Graux2012-10-281-4/+41
| | | | | | | | | | | | | | In pinctrl debug pins file, enable display of AltCx functions. Signed-off-by: Jean-Nicolas Graux <jean-nicolas.graux@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl/nomadik: update other alternate-C functions on DB8500Jean-Nicolas Graux2012-10-281-5/+96
| | | | | | | | | | | | | | | | In pinctrl-nomadik-db8500.c, add missing definitions that deal with other alternate-C functions. Signed-off-by: Jean-Nicolas Graux <jean-nicolas.graux@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl/nomadik: merge old pincfg headerLinus Walleij2012-10-287-180/+159
| | | | | | | | | | | | | | | | This merges the old <plat/pincfg.h> header into <linux/platform_data/pinctrl-nomadik.h> and rids us of yet one more <plat/*> include. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl/nomadik: move the platform data headerLinus Walleij2012-10-2811-12/+11
| | | | | | | | | | | | | | This moves the platform data header for the Nomadik pin controller to <linux/platform_data/pinctrl-nomadik.h>. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl/nomadik: allow to support several ranges per GPIO bankPatrice Chotard2012-10-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With DB8500 the number of GPIO chips = number GPIO bank = number of GPIO ranges. With DB8540, a new GPIO range configuration is used, some GPIO banks can have several GPIO ranges. For example, DB8540 GPIO bank0 (GPIO0 to GPIO32) have 2 GPIO ranges: - GPIO0 to GPIO17 : routed - GPIO18 to GPIO21 : hole - GPIO22 to GPIO28 : routed - GPIO29 to GPIO32 : hole Previously, during nmk_pinctrl_probe(), all GPIO ranges were parsed, as GPIO ranges are larger than the number of GPIO chips, a warning occurs. This commit allows each bank to have several GPIO ranges. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * ARM: plat-nomadik: move NMK_GPIO_PER_CHIP into gpio-nomadik.hPatrice Chotard2012-10-282-2/+3
| | | | | | | | | | | | | | | | Move NMK_GPIO_PER_CHIP to gpio-nomadik.h and define it with a shift operator. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * ARM: plat-nomadik: Introduce new DB8540 GPIO registersMaxime Coquelin2012-10-281-0/+3
| | | | | | | | | | | | | | | | DB8540's GPIO controller introduce level detection support for both interrupts and wakeups. Signed-off-by: Maxime Coquelin <maxime.coquelin@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Merge branch 'at91' into develLinus Walleij2012-11-1142-446/+2794
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| * | pinctrl: at91: Staticize non-exported symbolsAxel Lin2012-11-051-10/+12
| | | | | | | | | | | | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl/at91: remove unused variable in at91_dt_node_to_map()Wei Yongjun2012-10-281-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The variable pin is initialized but never used otherwise, so remove the unused variable. dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl/at91: using for_each_set_bit to simplify the codeWei Yongjun2012-10-281-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using for_each_set_bit() to simplify the code. dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl/at91: remove duplicated include from pinctrl-at91.cWei Yongjun2012-10-281-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove duplicated include. dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | MAINTAINERS: add pinctrl atmel at91 entryJean-Christophe PLAGNIOL-VILLARD2012-10-281-0/+6
| | | | | | | | | | | | | | | | | | Cc: linux-kernel@vger.kernel.org Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl/: at91: fix warningsJean-Christophe PLAGNIOL-VILLARD2012-10-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | /opt/work/linux-2.6/drivers/pinctrl/pinctrl-at91.c: In function 'at91_pinctrl_probe_dt': /opt/work/linux-2.6/drivers/pinctrl/pinctrl-at91.c:952:12: warning: assignment discards qualifiers from pointer target type /opt/work/linux-2.6/drivers/pinctrl/pinctrl-at91.c: In function 'at91_gpio_probe': /opt/work/linux-2.6/drivers/pinctrl/pinctrl-at91.c:1517:17: warning: assignment discards qualifiers from pointer target type Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio/at91: auto request and configure the pio as input when the interrupt is ↵Jean-Christophe PLAGNIOL-VILLARD2012-10-241-1/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | used via DT If we do this interrupt-parent = <&pioA>; interrupts = <7 0x0>; The current core map the irq correctly but the gpio is not configured as input. The pinctrl configure the pin as gpio with the correct mux parameter but is not responsible to configure it as input. So do it during the xlate Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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