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* Documentation: dt: gpio-omap: Move interrupt-controller from ↵Javier Martinez Canillas2013-04-091-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | #interrupt-cells description The binding documentation for the OMAP GPIO controller has the "#interrupt-cells" property listed before "#interrupt-controller" property but its description after. This is confusing so we move "#interrupt-cells" after the "interrupt-controller" property so is followed by its description. While being there, change the properties order to be consistent with Documentation/devicetree/bindings/interrupt-controller/interrupts.txt and Documentation/devicetree/bindings/gpio/gpio.txt. According with these docs, the order of the properties for a gpio-omap device node should be: gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; Reported-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: OMAP2+: hwmod: Don't call _init_mpu_rt_base if no syscSantosh Shilimkar2013-04-091-1/+2
| | | | | | | | | | | | | | | OMAP hwmod layer does the reset of the IPs in early code so that we have SOC in sane state. To do the soft-reset, it needs to ioremap() the IP address space to be able to write to sysconfig registers. But there are few hwmod which doesn't have sysconfig registers and hence no need to ioremap() them in early init code. Prevent calling the _init_mpu_rt_base() conditional based on sysc availability. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: OMAP2+: hwmod: extract module address space from DT blobSantosh Shilimkar2013-04-091-3/+42
| | | | | | | | | | | | Patch adds the code for extracting the module ocp address space from device tree blob in case the hwmod address space look up fails. The idea is to remove the address space data from hwmod and extract it from DT blob. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP5: Add watchdog timer nodeLokesh Vutla2013-04-091-0/+7
| | | | | | | | Add watchdog timer DT node for OMAP5 devices. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP4/5: Update l3-noc DT nodesSantosh Shilimkar2013-04-092-0/+10
| | | | | | | | | | | | | | | | Add l3-noc node for OMAP4 and OMAP5 devices. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [jon-hunter@ti.com: Fix the problem caused by adding 32 to the interrupt number for the L3 interrupts to account for per processor interrupts (PPI) and software generated interrupts (SGI) which typically are mapped to the first 32 interrupts in the ARM GIC. This is not necessary because the first parameter of the ARM GIC interrupt property specifies the GIC interrupt type (ie. SGI, PPI, etc). Hence, fix the interrupt number for the L3 interrupts by substracting 32] Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* Documentation: dt: OMAP: l3-noc: Add *reg* in required propertiesSantosh Shilimkar2013-04-091-0/+1
| | | | | | | | OMAP L3 driver needs reg address space for its operation and hence its a required property. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP5: Update keypad reg propertySantosh Shilimkar2013-04-091-0/+1
| | | | | | | Add missing OMAP keypad reg property information. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP5: Update the timer and GIC nodes for HYP kernel supportSantosh Shilimkar2013-04-091-2/+6
| | | | | | | | To be able to run kernel in HYP mode, virtual timer and GIC node information needs to be populated. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP5: Move the gic node out of ocp spaceSantosh Shilimkar2013-04-091-8/+11
| | | | | | | | GIC is not part of OCP space so move the gic DT node out of ocp DT address space. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP5: Specify nonsecure PPI IRQ for arch timerRajendra Nayak2013-04-091-2/+3
| | | | | | | | | | | Specify both secure as well as nonsecure PPI IRQ for arch timer. This fixes the following errors seen on DT OMAP5 boot.. [ 0.000000] arch_timer: No interrupt available, giving up Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP5: Align the local timer dt node as per the current binding codeSantosh Shilimkar2013-04-091-12/+7
| | | | | | | | | | It has been decided to not duplicate banked modules dt nodes and that is how the current arch timer dt extraction code is. Update the OMAP5 DT file accordingly. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap5-evm: Update available memory to 2032 MBSantosh Shilimkar2013-04-091-1/+1
| | | | | | | | | On OMAP5 to detect invalid/bad memory accesses, 16MB of DDR is used as a trap. Hence available memory for linux OS is 2032 MB on boards popullated with 2 GB memory. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap3-devkit8000: Add NAND DT nodeAnil Kumar2013-04-091-0/+52
| | | | | | | | | | Add the needed sections to enable nand support on Devkit8000. Add nand partitions information. Signed-off-by: Anil Kumar <anilk4.v@gmail.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap3-devkit8000: Enable audio supportAnil Kumar2013-04-091-4/+19
| | | | | | | | Add the needed sections to enable audio support on Devkit8000 when booted with DT blob. Signed-off-by: Anil Kumar <anilk4.v@gmail.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: Add minimal DT support for DevKit8000Anil Kumar2013-04-093-0/+104
| | | | | | | | | | | | | | | | | DevKit8000 is a beagle board clone from Timll, sold by armkits.com. The DevKit8000 has RS232 serial port, LCD, DVI-D, S-Video, Ethernet, SD/MMC, keyboard, camera, SPI, I2C, USB and JTAG interface. Add the basic DT support for devkit8000. It includes: - twl4030 (PMIC) - MMC1 - I2C1 - leds Signed-off-by: Anil Kumar <anilk4.v@gmail.com> Tested-by: Thomas Weber <thomas@tomweber.eu> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP2+: Add SDMA Audio IPs bindingsSebastien Guiriec2013-04-095-0/+67
| | | | | | | | Populate DMA client information for McBSP DMIC and McPDM periperhal on OMAP2+ devices. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP3: Add support for OMAP3430 SDP boardJon Hunter2013-04-092-0/+142
| | | | | | | | | Adds basic device-tree support for OMAP3430 SDP board which has 256MB of RAM, 128MB ONENAND flash, 256MB NAND flash and uses the TWL4030 power management IC. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP3: Add reg and interrupt properties for gpioJon Hunter2013-04-091-0/+12
| | | | | | | | The OMAP3 gpio bindings are currently missing the reg and interrupt properties and so add these properties. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP3+: Correct gpio #interrupts-cells propertyJon Hunter2013-04-093-20/+20
| | | | | | | | | | | | | | | The OMAP gpio binding documention [1] states that the #interrupts-cells property for gpio controllers should be 2. Currently, for OMAP3+ devices the #interrupt-cells is set to 1. By setting this property to 2, it allows clients to pass a 2nd parameter indicating the sensitivity (level or edge) and polarity (high or low) of the interrupt. The OMAP gpio controllers support these options and so update the #interrupt-cells property for OMAP3+ devices to 2. [1] Documentation/devicetree/bindings/gpio/gpio-omap.txt Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: Add OMAP2 gpio bindingsJon Hunter2013-04-092-0/+99
| | | | | | | Add gpios bindings for OMAP2420 and OMAP2430 devices. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: Add GPMC node for OMAP2, OMAP4 and OMAP5Jon Hunter2013-04-094-0/+44
| | | | | | | Add the device-tree node for GPMC on OMAP2, OMAP4 and OMAP5 devices. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP2+: Add SDMA controller bindings and nodesJon Hunter2013-04-094-0/+134
| | | | | | | | | | | | | Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP2+: Add PMU nodesJon Hunter2013-04-094-0/+31
| | | | | | | | | | | | | Add PMU nodes for OMAP2, OMAP3 and OMAP4460 devices. Please note that the node for OMAP4460 has been placed in a separate header file for OMAP4460, because the node is not compatible with OMAP4430. The node for OMAP4430 is not included because PMU is not currently supported on OMAP4430 due to the absence of a cross-trigger interface driver. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: OMAP2+: Prepare for device-tree PMU supportJon Hunter2013-04-091-3/+11
| | | | | | | | | | | | | | If device-tree is present, then do not create the PMU device from within the OMAP specific PMU code. This is required to allow device-tree to create the PMU device from the PMU device-tree node. PMU is not currently supported for OMAP4430 (due to a dependency on having a cross-trigger interface driver) and so ensure that this indicated on boot with or without device-tree. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP5: add dwc3 omap and dwc3 core dataKishon Vijay Abraham I2013-04-091-0/+18
| | | | | | | | | | | | | | Add dwc3 omap glue data to the omap5 dt data file. The information about the dt node added here is available @ Documentation/devicetree/bindings/usb/omap-usb.txt. Also added dwc3 core dt data as a subnode to dwc3 omap glue data in omap5 dt data file. The information for the entered data node is available @ Documentation/devicetree/bindings/usb/dwc3.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP5: Add omap-usb3 and omap-usb2 dataKishon Vijay Abraham I2013-04-091-0/+14
| | | | | | | | | | Add omap-usb3 and omap-usb2 data node in OMAP5 device tree file. The information for the node added here is available @ Documentation/devicetree/bindings/usb/usb-phy.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP5: Add ocp2scp dataKishon Vijay Abraham I2013-04-091-0/+8
| | | | | | | | | | Add ocp2scp data node in omap5 device tree file. The information for the node added here can be found @ Documentation/devicetree/bindings/bus/omap-ocp2scp.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP5: Add OMAP control usb dataKishon Vijay Abraham I2013-04-091-0/+8
| | | | | | | | | | | | Add omap control usb data in OMAP5 device tree file. This will have the register address of registers to power on the USB2 PHY and USB3 PHY. The information for the node added here is available in Documentation/devicetree/bindings/usb/omap-usb.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP: Add usb_otg and glue data to OMAP3+ boardsKishon Vijay Abraham I2013-04-099-1/+57
| | | | | | | | | | | | | | | Add usb otg data node in omap4/omap3 device tree file. Also update the node with board specific setting in omapx-<board>.dts file. The dt data specifies among others the interface type (ULPI or UTMI), mode which is mostly OTG, power that specifies the amount of power this can supply when in host mode. The information about usb otg node is available @ Documentation/devicetree/bindings/usb/omap-usb.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP4: Add omap-usb2 dataKishon Vijay Abraham I2013-04-091-0/+5
| | | | | | | | | | | Add omap-usb2 data node in omap4 device tree file. Since omap-usb2 is connected to ocp2scp, omap-usb2 dt data is added as a child node of ocp2scp. The information about this data node is availabe @ Documentation/devicetree/bindings/usb/usb-phy.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP4: Add omap control usb dataKishon Vijay Abraham I2013-04-091-0/+8
| | | | | | | | | | Add omap control usb data in omap4 device tree file. This will have the register address of registers to power on the PHY and to write to mailbox. The information about this data node is available @ Documentation/devicetree/bindings/usb/omap-usb.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP3: reduce GPMC mapped registers address spaceJavier Martinez Canillas2013-04-091-1/+1
| | | | | | | | | | | | | | | | | | | Currently the OMAP General-Purpose Memory Controller (GPMC) device node maps 16 MB of address space for its hardware registers. This is because the OMAP Technical Reference Manual says that the GPMC module register address space size is 16 MB. But in practice the maximum address offset used by a GPMC register is 0x02d0. So, there is no need to map such a big address space for GPMC regs. This change was suggested by Jon Hunter [1]. [1]: https://patchwork.kernel.org/patch/2057111/ Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP3: Add GPMC controllerFlorian Vaussard2013-04-091-0/+10
| | | | | | | Add device-tree support for the GPMC controller on the OMAP3. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap5-evm: Add mcspi dataSourav Poddar2013-04-091-0/+46
| | | | | | | | | Add mcspi node and pinmux data for omap5 mcspi controller. Tested on omap5430 evm with 3.8-rc6 custom kernel. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP5: Add SPI nodesFelipe Balbi2013-04-091-0/+40
| | | | | | | | | Add all 4 mcspi instances to omap5.dtsi file. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> [benoit.cousson@linaro.org: Update the subject] Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap4-panda: Add I2c pinctrl dataSourav Poddar2013-04-091-0/+40
| | | | | | | | | | | | | | | | | | | | | | | Booting 3.8-rc6 on omap4 panda results in the following error [ 0.444427] omap_i2c 48070000.i2c: did not get pins for i2c error: -19 [ 0.445770] omap_i2c 48070000.i2c: bus 0 rev0.11 at 400 kHz [ 0.473937] omap_i2c 48072000.i2c: did not get pins for i2c error: -19 [ 0.474670] omap_i2c 48072000.i2c: bus 1 rev0.11 at 400 kHz [ 0.474822] omap_i2c 48060000.i2c: did not get pins for i2c error: -19 [ 0.476379] omap_i2c 48060000.i2c: bus 2 rev0.11 at 100 kHz [ 0.477294] omap_i2c 48350000.i2c: did not get pins for i2c error: -19 [ 0.477996] omap_i2c 48350000.i2c: bus 3 rev0.11 at 400 kHz [ 0.483398] Switching to clocksource 32k_counter This happens because omap4 panda dts file is not adapted to use i2c through pinctrl framework. Populating i2c pinctrl data to get rid of the error. Tested on omap4460 panda with 3.8-rc6 kernel. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reported-by: Luciano Coelho <coelho@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap5-evm: Add I2c pinctrl dataSourav Poddar2013-04-091-0/+62
| | | | | | | | | | | | | | | | | | | | | Booting 3.8-rc6 on omap 5430evm results in the following error omap_i2c 48070000.i2c: did not get pins for i2c error: -19 [ 1.024261] omap_i2c 48070000.i2c: bus 0 rev0.12 at 100 kHz [ 1.030181] omap_i2c 48072000.i2c: did not get pins for i2c error: -19 [ 1.037384] omap_i2c 48072000.i2c: bus 1 rev0.12 at 400 kHz [ 1.043762] omap_i2c 48060000.i2c: did not get pins for i2c error: -19 [ 1.050964] omap_i2c 48060000.i2c: bus 2 rev0.12 at 100 kHz [ 1.056823] omap_i2c 4807a000.i2c: did not get pins for i2c error: -19 [ 1.064025] omap_i2c 4807a000.i2c: bus 3 rev0.12 at 400 kHz This happens because omap5 dts file is not adapted to use i2c through pinctrl framework. Populating i2c pinctrl data to get rid of the error. Tested on omap5430 evm with 3.8-rc6 kernel. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap3-overo: Add audio supportFlorian Vaussard2013-04-091-0/+14
| | | | | | | Add the needed sections to enable audio support on Overo. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap4-sdp: Add I2c pinctrl dataSourav Poddar2013-04-091-0/+40
| | | | | | | | | | | | | | | | | | | | | | Booting 3.8-rc6 on omap 4430sdp results in the following error omap_i2c 48070000.i2c: did not get pins for i2c error: -19 [ 1.024261] omap_i2c 48070000.i2c: bus 0 rev0.12 at 100 kHz [ 1.030181] omap_i2c 48072000.i2c: did not get pins for i2c error: -19 [ 1.037384] omap_i2c 48072000.i2c: bus 1 rev0.12 at 400 kHz [ 1.043762] omap_i2c 48060000.i2c: did not get pins for i2c error: -19 [ 1.050964] omap_i2c 48060000.i2c: bus 2 rev0.12 at 100 kHz [ 1.056823] omap_i2c 4807a000.i2c: did not get pins for i2c error: -19 [ 1.064025] omap_i2c 4807a000.i2c: bus 3 rev0.12 at 400 kHz This happens because omap4 dts file is not adapted to use i2c through pinctrl framework. Populating i2c pinctrl data to get rid of the error. Tested on omap4430 sdp with 3.8-rc6 kernel. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reported-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap3-overo: Add support for pwm-ledsFlorian Vaussard2013-04-091-4/+5
| | | | | | | | Convert the on-board LED connected to the TWL4030 (LEDB) to use pwm-leds. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap4-sdp: Add support for pwm-backlightPeter Ujfalusi2013-04-091-0/+11
| | | | | | | Section to describe the backlight for the LCD panels. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap4-sdp: Add support for pwm-leds (keypad and charging LED)Peter Ujfalusi2013-04-091-0/+15
| | | | | | | Sections to describe the pwm-leds in the system. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap3-beagle-xm: Use pwm-leds for pmu_stat LEDPeter Ujfalusi2013-04-091-4/+10
| | | | | | | | We have proper driver stack to handle the pmu_stat LED which is connected PWMB of twl4030. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: twl6030: Add PWM supportPeter Ujfalusi2013-04-091-0/+12
| | | | | | | Enable support for the PWMs and LED as PWM drivers. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: twl4030: Add PWM supportPeter Ujfalusi2013-04-091-0/+10
| | | | | | | Enable support for the PWMs and LEDs as PWM drivers. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: AM33XX: Add memory resource to d_can nodeAnilKumar Ch2013-04-091-2/+4
| | | | | | | | | | | | | | | | Add a new address space/memory resource to d_can device tree node. D_CAN RAM initialization is achieved through RAMINIT register which is part of AM33XX control module address space. D_CAN RAM init or de-init should be done by writing instance corresponding value to control module register. Till we have a separate control module driver to write to control module, d_can driver will handle the register writes to control module by itself. So a new address space to represent this control module register is added to d_can driver. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: AM33XX: Add d_can instances to aliasesAnilKumar Ch2013-04-091-0/+2
| | | | | | | | | | | | | | | | | | Add d_can instances to aliases node to get the D_CAN instance number from the driver. To initialize D_CAN message RAM, corresponding instance number is required. To initialize instance 0 message RAM then 0x1 should be written and for instance 1 message RAM, 0x2 should be written to control module register. With device-tree framework ip instance number is "-1" by default for all instances. To get device id/instance number then modules should be added to DT "aliases" node. of_alias_get_id() gives the device id number based on number of alias nodes present in "aliases node". Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap3-igep: Add uart1 and uart2 to igep boardsMatthias Brugger2013-04-091-0/+24
| | | | | | | | | | | | This is a follow-up to Javier Martinez effort adding initial device tree support to IGEP technology devices [1]. It adds uart1 and uart2 bindings to the generic dtsi for the IGEP boards. [1] http://www.spinics.net/lists/linux-omap/msg83409.html Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap3: Add support for IGEP COM ModuleJavier Martinez Canillas2013-04-092-0/+45
| | | | | | | | | | | | ISEE IGEP COM Module is an TI OMAP3 SoC computer on module. This patch adds an initial device tree support to boot an IGEP COM Module from the MMC/SD. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com> [b-cousson@ti.com: Update the Makefile for 3.8-rc2] Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap3: Add support for IGEPv2 boardJavier Martinez Canillas2013-04-092-0/+57
| | | | | | | | | | | | | | | ISEE IGEPv2 is an TI OMAP3 SoC based embedded board. This patch adds an initial device tree support to boot an IGEPv2 from the MMC/SD. Currently is working everything that is supported by DT on OMAP3 SoCs (MMC/SD, GPIO LEDs, EEPROM, TWL4030 audio). Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com> [benoit.cousson@linaro.org: Update the Makefile for 3.8-rc2] Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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