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* ARM: SPEAr: DT: Modify DT bindings for STMMACDeepak Sikri2012-11-265-0/+8
| | | | | | | | | This patch modifies the DT bindings for the GMAC IP existings for the SPEAr family. The DT bindings now additionally pass the phy mode as a configuration parameter for the ethernet device. Signed-off-by: Deepak Sikri <deepak.sikri@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
* ARM: SPEAr: DT: Fix existing DT supportVipul Kumar Samar2012-11-269-38/+45
| | | | | | | | | | | | | | | | | This patch fixes existing DT support for all SPEAr SoC's. This includes: - Removing few nodes from board files - Updating DT data of few nodes - Updating ranges of few busses - Moving devices to correct parent bus Signed-off-by: Bhavna Yadav <bhavna.yadav@st.com> Signed-off-by: Deepak Sikri <deepak.sikri@st.com> Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Vijay Kumar Mishra <vijay.kumar@st.com> Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
* ARM: SPEAr: DT: Update partition info for MTD devicesVipin Kumar2012-11-266-30/+128
| | | | | | | | | | This patch enhances partition information of MTD devices like fsmc-nand and spear-smi. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
* ARM: SPEAr: DT: Update pinctrl listVipul Kumar Samar2012-11-263-25/+39
| | | | | | | | This patch updates pinctrl configuration for SPEAr SoC's. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
* ARM: SPEAr13xx: DT: Add spics gpio controller nodesShiraz Hashim2012-11-262-0/+26
| | | | | | | | | | | | | | SPEAr platform provides a provision to control chipselects of ARM PL022 Prime Cell spi controller through its system registers, which otherwise remains under PL022 control which some protocols do not want. This patch adds spics controller nodes in device tree for various SPEAr13xx SoCs. Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Reviewed-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
* Merge commit 'gpio-lw/devel' into spear-for-3.8Viresh Kumar2012-11-2621-181/+931
|\ | | | | | | This merges dependency branch gpio-lw/devel for SPEAr DT updates.
| * gpio: SPEAr: add spi chipselect control driverShiraz Hashim2012-11-185-0/+276
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPEAr platform provides a provision to control chipselects of ARM PL022 Prime Cell spi controller through its system registers, which otherwise remains under PL022 control which some protocols do not want. This commit intends to provide the spi chipselect control in software over gpiolib interface. spi chip drivers can use the exported gpiolib interface to define their chipselect through DT or platform data. Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Reviewed-by: Vipin Kumar <vipin.kumar@st.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: gpio-max710x: Support device tree probingRoland Stigge2012-11-171-6/+6
| | | | | | | | | | | | | | | | | | For probing via device tree, we need to support the case without platform_data. In this case, chip.base is set to -1 for automatic numbering. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: twl4030: Use only TWL4030_MODULE_LED for LED configurationPeter Ujfalusi2012-11-171-17/+18
| | | | | | | | | | | | | | | | | | | | | | Avoid using the TWL4030_MODULE_PWMA/B as module ID. The LEDEN, PWMA ON/OFF and PWMB ON/OFF registers are in a continuous range starting from LED base. This is going to be helpful for further cleanup in the twl stack. No functional changes. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: tegra: read output value when gpio is set in direction_outLaxman Dewangan2012-11-171-0/+5
| | | | | | | | | | | | | | | | | | | | Read the output value when gpio is set for the output mode for gpio_get_value(). Reading input value in direction out does not give correct value. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: pca953x: Add compatible strings to gpio-pca953x driverMaxime Ripard2012-11-171-0/+29
| | | | | | | | | | | | | | | | Even though the device tree binding code was already written, the compatible strings were not yet in the driver. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: pca953x: Register an IRQ domainMaxime Ripard2012-11-171-6/+20
| | | | | | | | | | | | | | | | The PCA953x used to register no IRQ domain, which made it impossible to use it as an interrupt-parent from the device tree. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: mvebu: Set free callback for gpio_chipAxel Lin2012-11-081-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | We call pinctrl_request_gpio() in request callback, thus we need to call pinctrl_free_gpio() in free callback. Both mvebu_gpio_request() and mvebu_gpio_free() are not referenced outside of this file, make them static. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: tegra: Drop exporting static functionsAxel Lin2012-11-081-2/+0
| | | | | | | | | | | | | | | | | | Both tegra_gpio_enable() and tegra_gpio_disable() are static functions, it does not make sense to export them. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: tegra: Staticize non-exported symbolsAxel Lin2012-11-081-2/+2
| | | | | | | | | | | | | | | | | | Both tegra_gpio_request() and tegra_gpio_free() are not referenced outside of this file, make them static. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: tegra: fix suspend/resume apisLaxman Dewangan2012-11-081-5/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Following are changes done to fix the suspend/resume functionality of tegra gpio driver: - Protect suspend/resume callbacks with CONFIG_PM_SLEEP because CONFIG_PM doesn't actually enable any of the PM callbacks, it only allows to enable CONFIG_PM_SLEEP and CONFIG_PM_RUNTIME. This means if CONFIG_PM is used to protect system sleep callbacks then it may end up unreferenced if only runtime PM is enabled. - Fix the suspend/resume APIs declaration as per callback prototype. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio-pch: Set parent dev for gpio chipAlexander Stein2012-11-041-0/+1
| | | | | | | | | | | | | | | | This will show the gpio chip as a child node under /sys/bus/pci/devices/xxxx:xx:xx.x/ Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: em: Fix build errorsAxel Lin2012-11-041-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix below build errors: CC [M] drivers/gpio/gpio-em.o drivers/gpio/gpio-em.c: In function 'em_gio_probe': drivers/gpio/gpio-em.c:306: error: 'err' undeclared (first use in this function) drivers/gpio/gpio-em.c:306: error: (Each undeclared identifier is reported only once drivers/gpio/gpio-em.c:306: error: for each function it appears in.) drivers/gpio/gpio-em.c:308: error: label 'err3' used but not defined drivers/gpio/gpio-em.c:279: error: label 'err2' used but not defined drivers/gpio/gpio-em.c:265: error: label 'err1' used but not defined drivers/gpio/gpio-em.c:250: error: label 'err0' used but not defined drivers/gpio/gpio-em.c:309: warning: no return statement in function returning non-void drivers/gpio/gpio-em.c: At top level: drivers/gpio/gpio-em.c:311: error: expected identifier or '(' before 'if' drivers/gpio/gpio-em.c:317: error: expected identifier or '(' before 'if' drivers/gpio/gpio-em.c:323: warning: data definition has no type or storage class drivers/gpio/gpio-em.c:323: warning: type defaults to 'int' in declaration of 'ret' drivers/gpio/gpio-em.c:323: error: 'gpio_chip' undeclared here (not in a function) drivers/gpio/gpio-em.c:323: error: initializer element is not constant drivers/gpio/gpio-em.c:324: error: expected identifier or '(' before 'if' drivers/gpio/gpio-em.c:328: error: expected identifier or '(' before 'return' drivers/gpio/gpio-em.c:330: error: expected '=', ',', ';', 'asm' or '__attribute__' before ':' token drivers/gpio/gpio-em.c:332: error: expected '=', ',', ';', 'asm' or '__attribute__' before ':' token drivers/gpio/gpio-em.c:334: error: expected '=', ',', ';', 'asm' or '__attribute__' before ':' token drivers/gpio/gpio-em.c:336: error: expected '=', ',', ';', 'asm' or '__attribute__' before ':' token drivers/gpio/gpio-em.c:338: error: expected '=', ',', ';', 'asm' or '__attribute__' before ':' token drivers/gpio/gpio-em.c:340: error: expected '=', ',', ';', 'asm' or '__attribute__' before ':' token drivers/gpio/gpio-em.c:342: error: expected '=', ',', ';', 'asm' or '__attribute__' before ':' token drivers/gpio/gpio-em.c:344: error: expected identifier or '(' before '}' token drivers/gpio/gpio-em.c: In function 'em_gio_remove': drivers/gpio/gpio-em.c:361: error: implicit declaration of function 'em_gio_irq_domain_cleanup' make[2]: *** [drivers/gpio/gpio-em.o] Error 1 make[1]: *** [drivers/gpio] Error 2 make: *** [drivers] Error 2 Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * GPIO: clps711x: use platform_device_unregister in gpio_clps711x_init()Wei Yongjun2012-10-271-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | platform_device_unregister() only calls platform_device_del() and platform_device_put(), thus use platform_device_unregister() to simplify the code. Also the documents in platform.c shows that platform_device_del and platform_device_put must _only_ be externally called in error cases. All other usage is a bug. dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio/tc3589x: convert to use the simple irqdomainLinus Walleij2012-10-261-11/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The special checks for whether we have a base IRQ offset or not is surplus if we use the simple IRQ domain. The IRQ offset zero will be interpreted as a linear domain case. Plus this makes sure we allocate descriptors where need be, or warn if they are preallocated with SPARSE_IRQ. Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio/em: convert to linear IRQ domainLinus Walleij2012-10-261-39/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code in the em driver seems to want to try to do the job of the linear IRQ domain (allocate descriptors and grab a virtual range). So why not just use the linear IRQ domain? The code is now cut down so we don't need isolated functions for this. Also note that we use irq_create_mapping() to make sure descriptors are allocated for these IRQs. Also fixed the FIXME to remove the domain after use. Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Magnus Damm <damm@opensource.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio/mvebu: convert to use irq_domain_add_simple()Linus Walleij2012-10-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | The MVEBU driver probably just wants a few IRQs. Using the simple domain has the upside of allocating IRQ descriptors if need be, especially in a SPARSE_IRQ environment. Cc: Rob Herring <rob.herring@calxeda.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio/tegra: convert to use linear irqdomainLinus Walleij2012-10-261-9/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra driver tries to do the work of irq_domain_add_linear() by reserving a bunch of descriptors somewhere and keeping track of the base offset, then calling irq_domain_add_legacy(). Let's stop doing that and simply use the linear IRQ domain. For this to work: use irq_create_mapping() in the IRQ iterator so that the descriptors get allocated here. Cc: Rob Herring <rob.herring@calxeda.com> Cc: Grant Likely <grant.likely@secretlab.ca> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpiolib: unlock on error in gpio_export()Dan Carpenter2012-10-261-1/+2
| | | | | | | | | | | | | | We need to unlock here before returning. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpiolib: add gpio get direction callback supportMathias Nyman2012-10-262-2/+41
| | | | | | | | | | | | | | | | | | | | | | | | Add .get_direction callback to gpio_chip. This allows gpiolib to check the current direction of a gpio. Used to show the correct gpio direction in sysfs and debug entries. If callback is not set then gpiolib will work as previously; e.g. guessing everything is input until a direction is set. Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * GPIO: clps711x: Fix direction logic for PORTDAlexander Shiyan2012-10-261-14/+51
| | | | | | | | | | | | | | | | PORTD have different direction logic, i.e. "0" is output and "1" is input. This patch fix this issue. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * GPIO: clps711x: Fix return value for gpio_clps711x_getAlexander Shiyan2012-10-241-1/+1
| | | | | | | | | | Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpiolib: Refactor gpio_exportRyan Mallon2012-10-231-39/+46
| | | | | | | | | | | | | | | | | | | | | | | | The gpio_export function uses nested if statements and the status variable to handle the failure cases. This makes the function logic difficult to follow. Refactor the code to abort immediately on failure using goto. This makes the code slightly longer, but significantly reduces the nesting and number of split lines and makes the code easier to read. Signed-off-by: Ryan Mallon <rmallon@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * GPIO: vt8500: Add extended gpio bank for WM8505/WM8650Tony Prisk2012-10-191-0/+2
| | | | | | | | | | | | | | | | | | These SoC's have an extended bank of GPIO's seperate to the main GPIO block. This patch adds the additional 5 GPIO's located in this block which control I2C and PWMOUT. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: clps711x: delete local <mach/gpio.h> headerLinus Walleij2012-10-151-13/+0
| | | | | | | | | | | | | | | | | | | | | | This header file is unused and we shall not add new headers to the <mach/*> namespace. The macro may be reintroduced when there is a user for it. Cc: Alexander Shiyan <shc_work@mail.ru> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * GPIO: Add support for GPIO on CLPS711X-target platformAlexander Shiyan2012-10-155-0/+182
| | | | | | | | | | | | | | | | | | | | | | The CLPS711X CPUs provide some GPIOs for use in the system. This driver provides support for these via gpiolib. Due to platform limitations, driver does not support interrupts, only inputs and outputs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * DA9055 GPIO driverAshish Jangam2012-10-153-0/+216
| | | | | | | | | | | | | | | | | | | | | | This is the GPIO patch for the DA9055 PMIC. This patch has got dependency on the DA9055 MFD core. This patch is functionally tested on SMDK6410 board. Signed-off-by: David Dajun Chen <dchen@diasemi.com> Signed-off-by: Ashish Jangam <ashish.jangam@kpitcummins.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio/gpio-omap: Use existing pointer to struct deviceTobias Klauser2012-10-151-1/+1
| | | | | | | | | | | | | | | | | | A pointer to "pdev->dev" is already stored in "dev", so use it in devm_kzalloc. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Acked-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio/gpio-pl061: Covert to use devm_* functionsTobias Klauser2012-10-151-37/+22
| | | | | | | | | | | | | | | | Use the devm_* family of functions during probe to reduce the error handling code footprint. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Merge commit 'pinctrl/devel 4ddb1c2' into spear-for-3.8Viresh Kumar2012-11-2646-273/+1826
|\ \ | | | | | | | | | This merges dependency branch pinctrl/devel for SPEAr DT updates.
| * | ARM: SPEAr: Add plgpio node in device tree dtsi filesViresh Kumar2012-11-117-2/+108
| | | | | | | | | | | | | | | | | | | | | This patch adds plgpio nodes in SPEAr DT files. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: SPEAr: Add gpio ranges supportViresh Kumar2012-11-118-17/+447
| | | | | | | | | | | | | | | | | | | | | | | | | | | Most of SPEAr SoCs, which support pinctrl, can configure & use pads as gpio. This patch gpio enable support for SPEAr pinctrl drivers. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpiolib: iron out include ladder mistakesLinus Walleij2012-11-112-25/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The <*/gpio.h> includes are updated again: now we need to account for the problem introduced by commit: 595679a8038584df7b9398bf34f61db3c038bfea "gpiolib: fix up function prototypes etc" Actually we need static inlines in include/asm-generic/gpio.h as well since we may have GPIOLIB but not PINCTRL. Make sure to move all the CONFIG_PINCTRL business to the end of the file so we are sure we have declared struct gpio_chip. And we need to keep the static inlines in <linux/gpio.h> but here for the !CONFIG_GENERIC_GPIO case, and then we may as well throw in a few warnings like the other prototypes there, if someone would have the bad taste of compiling without GENERIC_GPIO even. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpiolib: separation of pin concernsLinus Walleij2012-11-116-28/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fact that of_gpiochip_add_pin_range() and gpiochip_add_pin_range() share too much code is fragile and will invariably mean that bugs need to be fixed in two places instead of one. So separate the concerns of gpiolib.c and gpiolib-of.c and have the latter call the former as back-end. This is necessary also when going forward with other device descriptions such as ACPI. This is done by: - Adding a return code to gpiochip_add_pin_range() so we can reliably check whether this succeeds. - Get rid of the custom of_pinctrl_add_gpio_range() from pinctrl. Instead create of_pinctrl_get() to just retrive the pin controller per se from an OF node. This composite function was just begging to be deleted, it was way to purpose-specific. - Use pinctrl_dev_get_name() to get the name of the retrieved pin controller and use that to call back into the generic gpiochip_add_pin_range(). Now the pin range is only allocated and tied to a pin controller from the core implementation in gpiolib.c. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpiolib: call pin removal in chip removal functionLinus Walleij2012-11-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes us call gpiochio_remove_pin_ranges() in the gpiochip_remove() function, so we get rid of ranges when freeing the chip. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpiolib: remove duplicate pin range codeLinus Walleij2012-11-111-12/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 69e1601bca88809dc118abd1becb02c15a02ec71 "gpiolib: provide provision to register pin ranges" Introduced both of_gpiochip_remove_pin_range() and gpiochip_remove_pin_ranges(). But the contents are exactly the same so remove the OF one and rely on the range deletion in the core. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpiolib-of: staticize the pin range callsLinus Walleij2012-11-111-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 69e1601bca88809dc118abd1becb02c15a02ec71 "gpiolib: provide provision to register pin ranges" Declared the of_gpiochip_[add|remove]_pin_range() global while they should be static as they are only ever used in this file. Let's convert them to static. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpiolib: fix up function prototypes etcLinus Walleij2012-11-113-11/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 69e1601bca88809dc118abd1becb02c15a02ec71 "gpiolib: provide provision to register pin ranges" Got most of it's function prototypes wrong, so fix this up by: - Moving the void declarations into static inlines in <linux/gpio.h> (previously the actual prototypes were declared here...) - Declare the gpiochip_add_pin_range() and gpiochip_remove_pin_ranges() functions in <asm-generic/gpio.h> together with the pin range struct declaration itself. - Actually only implement these very functions in gpiolib.c if CONFIG_PINCTRL is set. - Additionally export the symbols since modules will need to be able to do this. Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: sirf: Staticize non-exported symbolAxel Lin2012-11-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Staticize sirfsoc_gpio_irq_map() function. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: u300: Staticize non-exported symbolsAxel Lin2012-11-111-6/+4
| | | | | | | | | | | | | | | | | | | | | Staticize u300_pin_config_get() and u300_pin_config_set() functions. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl/u300: use managed resourcesLinus Walleij2012-11-111-28/+4
| | | | | | | | | | | | | | | | | | | | | This converts the U300 pin controller to use managed resources (devm_*) for it's memory region. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl/coh901: convert to use managed resourcesLinus Walleij2012-11-111-43/+19
| | | | | | | | | | | | | | | | | | | | | This switches the COH 901 pin controller to use managed resources (devm_*) for memory remaps, clocks, etc. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl/coh901: use irqdomain, allocate irqdescsLinus Walleij2012-11-114-27/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This switches the COH 901 pinctrl driver to allocate its GPIO IRQs dynamically, and start to use a linear irqdomain to map from the hardware IRQs. This way we can cut away the complex allocation of IRQ numbers from the <mach/irqs.h> file. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | ARM: U300: bump IRQs to offset 32Linus Walleij2012-11-112-59/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The U300 IRQs were bumped once to offset to 1 (in order to avoid using IRQ 0 which is now NO_IRQ). This was OK as we were still passing the number of irqs in the .nr_irqs field of the machine, with descriptors allocated at boot time. However .nr_irqs should be 0, leading the system to reserve the first 16 IRQs. Then the VIC driver will complain that IRQs 1 thru 15 are pre-allocated, so to avoid this and use free descriptors, move all IRQs up to offset 32. This will all be done away with as we migrate to device tree, so it is an interim solution. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: SPEAr: Add plgpio driverViresh Kumar2012-11-113-0/+754
| | | | | | | | | | | | | | | | | | | | | | | | | | | Most of SPEAr SoCs, which support pinctrl, can configure & use pads as gpio. This patch adds plgpio driver for configuring these pads as gpio. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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