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* mmc: sdhci-pci: add broken HS200 quirk for Intel MerrifieldDavid Cohen2014-01-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to unknown hw issue so far, Merrifield is unable to enable HS200 support. This patch adds quirk to avoid SDHCI to initialize with error below: [ 53.850132] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 3.12.0-rc6-00037-g3d7c8d9-dirty #36 [ 53.850150] Hardware name: Intel Corporation Merrifield/SALT BAY, BIOS 397 2013.09.12:11.51.40 [ 53.850167] 00000000 00000000 ee409e48 c18816d2 00000000 ee409e78 c123e254 c1acc9b0 [ 53.850227] 00000000 00000000 c1b14148 000003de c16c03bf c16c03bf ee75b480 ed97c54c [ 53.850282] ee75b480 ee409e88 c123e292 00000009 00000000 ee409ef8 c16c03bf c1207fac [ 53.850339] Call Trace: [ 53.850376] [<c18816d2>] dump_stack+0x4b/0x79 [ 53.850408] [<c123e254>] warn_slowpath_common+0x84/0xa0 [ 53.850436] [<c16c03bf>] ? sdhci_send_command+0xb4f/0xc50 [ 53.850462] [<c16c03bf>] ? sdhci_send_command+0xb4f/0xc50 [ 53.850490] [<c123e292>] warn_slowpath_null+0x22/0x30 [ 53.850516] [<c16c03bf>] sdhci_send_command+0xb4f/0xc50 [ 53.850545] [<c1207fac>] ? native_sched_clock+0x2c/0xb0 [ 53.850575] [<c14c1f93>] ? delay_tsc+0x73/0xb0 [ 53.850601] [<c14c1ebe>] ? __const_udelay+0x1e/0x20 [ 53.850626] [<c16bdeb3>] ? sdhci_reset+0x93/0x190 [ 53.850654] [<c16c05b0>] sdhci_finish_data+0xf0/0x2e0 [ 53.850683] [<c16c130f>] sdhci_irq+0x31f/0x930 [ 53.850713] [<c12cb080>] ? __buffer_unlock_commit+0x10/0x20 [ 53.850740] [<c12cbcd7>] ? trace_buffer_unlock_commit+0x37/0x50 [ 53.850773] [<c1288f3c>] handle_irq_event_percpu+0x5c/0x220 [ 53.850800] [<c128bc96>] ? handle_fasteoi_irq+0x16/0xd0 [ 53.850827] [<c128913a>] handle_irq_event+0x3a/0x60 [ 53.850852] [<c128bc80>] ? unmask_irq+0x30/0x30 [ 53.850878] [<c128bcce>] handle_fasteoi_irq+0x4e/0xd0 [ 53.850895] <IRQ> [<c1890b52>] ? do_IRQ+0x42/0xb0 [ 53.850943] [<c1890a31>] ? common_interrupt+0x31/0x38 [ 53.850973] [<c12b00d8>] ? cgroup_mkdir+0x4e8/0x580 [ 53.851001] [<c1208d32>] ? default_idle+0x22/0xf0 [ 53.851029] [<c1209576>] ? arch_cpu_idle+0x26/0x30 [ 53.851054] [<c1288505>] ? cpu_startup_entry+0x65/0x240 [ 53.851082] [<c18793d5>] ? rest_init+0xb5/0xc0 [ 53.851108] [<c1879320>] ? __read_lock_failed+0x18/0x18 [ 53.851138] [<c1bf6a15>] ? start_kernel+0x31b/0x321 [ 53.851164] [<c1bf652f>] ? repair_env_string+0x51/0x51 [ 53.851190] [<c1bf6363>] ? i386_start_kernel+0x139/0x13c [ 53.851209] ---[ end trace 92777f5fe48d33f2 ]--- [ 53.853449] mmcblk0: error -84 transferring data, sector 11142162, nr 304, cmd response 0x0, card status 0x0 [ 53.853476] mmcblk0: retrying using single block read [ 55.937863] sdhci: Timeout waiting for Buffer Read Ready interrupt during tuning procedure, falling back to fixed sampling clock [ 56.207951] sdhci: Timeout waiting for Buffer Read Ready interrupt during tuning procedure, falling back to fixed sampling clock [ 66.228785] mmc0: Timeout waiting for hardware interrupt. [ 66.230855] ------------[ cut here ]------------ Signed-off-by: David Cohen <david.a.cohen@linux.intel.com> Reviewed-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Acked-by: Dong Aisheng <b29396@freescale.com> Cc: stable <stable@vger.kernel.org> # [3.13] Signed-off-by: Chris Ball <chris@printf.net>
* mmc: sdhci: add quirk for broken HS200 supportDavid Cohen2014-01-132-1/+4
| | | | | | | | | | This patch defines a quirk for platforms unable to enable HS200 support. Signed-off-by: David Cohen <david.a.cohen@linux.intel.com> Reviewed-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Acked-by: Dong Aisheng <b29396@freescale.com> Cc: stable <stable@vger.kernel.org> # [3.13] Signed-off-by: Chris Ball <chris@printf.net>
* mmc: arasan: Add driver for Arasan SDHCISoren Brinkmann2014-01-135-0/+265
| | | | | | | | | Add a driver for Arasan's SDHCI controller core. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Rob Herring <rob.herring@calxeda.com> [binding] Acked-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Chris Ball <chris@printf.net>
* mmc: dw_mmc: add dw_mmc-k3 for k3 platformZhangfei Gao2014-01-134-0/+203
| | | | | | | | | Add dw_mmc-k3.c for k3v2, support sd/emmc Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Zhigang Wang <brooke.wangzhigang@huawei.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Chris Ball <chris@printf.net>
* mmc: dw_mmc: use slot-gpio to handle cd pinZhangfei Gao2014-01-131-13/+35
| | | | | | | | | | | Suggested by Jaehoon: Use slot-gpio to handle cd-gpio Add function dw_mci_of_get_cd_gpio to check "cd-gpios" from dts. mmc_gpio_request_cd and mmc_gpio_get_cd are used to handle cd pin Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Chris Ball <chris@printf.net>
* mmc: sdhci-pci: add support of O2Micro/BayHubTech SD hostsAdam Lee2014-01-134-60/+439
| | | | | | | | | | | | | Add O2Micro/BayHubTech SD Host DeviceId 8520 support. Add O2Micro/BayHubTech SD Host DeviceId 8420 & 8421 support. Add O2Micro/BayHubTech SD Host DeviceId 8620 & 8621 support. These card readers are used in laptops like Lenovo ThinkPad W540, Dell Latitude E5440, Dell Latitude E6540. Signed-off-by: Peter Guo <peter.guo@bayhubtech.com> Signed-off-by: Adam Lee <adam.lee@canonical.com> Signed-off-by: Chris Ball <chris@printf.net>
* mmc: sdhci-pci: break out definitions to header fileAdam Lee2014-01-132-73/+78
| | | | | | | | Break out definitions in sdhci-pci.c to sdhci-pci.h, for introducing module files like sdhci-pci-xxx.c Signed-off-by: Adam Lee <adam.lee@canonical.com> Signed-off-by: Chris Ball <chris@printf.net>
* mmc: tmio: fixup compile errorKuninori Morimoto2014-01-131-1/+1
| | | | | | | | | | | | | | | | This patch fixes the below compile error: ${LINUX}/drivers/mmc/host/tmio_mmc.c: In function 'tmio_mmc_probe': ${LINUX}/drivers/mmc/host/tmio_mmc.c:93:35: \ error: 'res_ctl' undeclared (first use in this function) ${LINUX}/drivers/mmc/host/tmio_mmc.c:93:35: \ note: each undeclared identifier is reported only \ once for each function it appears in Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Chris Ball <chris@printf.net>
* MAINTAINERS: mmc: Update Chris Ball's email address.Chris Ball2014-01-131-2/+2
| | | | | | I'm no longer at OLPC. (The old email address still works for now.) Signed-off-by: Chris Ball <chris@printf.net>
* mmc: sh_mmcif: Enable driver compilation with COMPILE_TESTLaurent Pinchart2014-01-131-1/+2
| | | | | | | | This helps increasing build testing coverage. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Simon Horman <horms@verge.net.au> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhi: Enable driver compilation with COMPILE_TESTLaurent Pinchart2014-01-131-1/+2
| | | | | | | | | | | | | | | | | | | | | | | This helps increasing build testing coverage. The driver doesn't compile on (at least) x86 due (possibly among others) to missing readsw/writesw I/O accessors, restrict compilation to SUPERH or ARM. Whether the CTL_DMA_ENABLE register is part of the standard TMIO controller or is Renesas-specific is unknown and impossible to test as we have no current or planned TMIO DMA users other than SUPERH and ARCH_SHMOBILE. Writing to the register is thus conditionally compiled for SUPERH and ARCH_SHMOBILE only. Adding ARCH_SHMOBILE_MULTI to the list would extend this to multiarch kernels, but would break the driver for non-shmobile platforms if the register is Renesas-specific. We can thus get rid of the conditional compilation completely without introducing any further issue, and let future non-Renesas users deal with the situation if it turns out to be a the problem. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Simon Horman <horms@verge.net.au> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: tegra: add support for Tegra124Stephen Warren2014-01-131-0/+1
| | | | | | | | | | | | | | | | | | | Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sh_mmcif: Fix compilation warning on 64-bit platformsLaurent Pinchart2014-01-131-1/+1
| | | | | | | | | Casting an integer to a void * generates a "cast to pointer from integer of different size" warning. Cast the integer to an unsigned long first to fix it. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sh_mmcif: Factorize DMA channel request and configuration codeLaurent Pinchart2014-01-131-49/+51
| | | | | | | | | The channel request and configuration code is duplicated for the rx and tx channels. Create a function that requests a single channel and call it twice instead. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: SDHI: add SoC specific workaround via HW versionKuninori Morimoto2014-01-132-0/+12
| | | | | | | | | | One of Renesas SDHI chip needs workaround to use it, and, we can judge it based on chip version. This patch adds very quick-hack workaround method, since we still don't know how many chips need workaround in the future. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: tmio: add new TMIO_MMC_HAVE_HIGH_REG flagsKuninori Morimoto2014-01-133-10/+12
| | | | | | | | | | | | | | | The accessibility checking method to the higher register was added by 69d1fe18e92afb (mmc: tmio: only access registers above 0xff, if available) But, it doesn't care 32bit register. It is impossible to calculate it from the resource size, since there is 16/32 bit register IP (e.g. VERSION is located on 0xe2 if 16bit register, but it is located on 0x1c4 if 32bit register). This patch adds new TMIO_MMC_HAVE_HIGH_REG flags, tmio_mmc driver has it, and sh_mobile_sdhi doesn't have it today. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: tmio: bus_shift become tmio_mmc_data memberKuninori Morimoto2014-01-136-13/+26
| | | | | | | | | | .bus_shift is used to 16/32bit register access offset calculation on tmio driver. tmio_mmc_xxx is used from Toshiba/Renesas now, but this bus_shift value depends on HW IP. This patch moves .bus_shift to tmio_mmc_data member and sets it on each driver. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: tmio: use -EPROBE_DEFER if driver can't find regulatorKuninori Morimoto2014-01-131-5/+16
| | | | | | | | | | | | | | | | | Current tmio driver tries to use default ocr_avail if 1) it couldn't find regulator and 2) if platform data doesn't have ocr_mask. But, there is no guarantee that regulator driver probe is faster than TMIO driver probe. TMIO driver will not use regulator in such case. By this patch, TMIO driver returns -EPROBE_DEFER if it couldn't find regulator and if platform doesn't have ocr_mask. Because, there is a possibility that regulator has not been probed, but the user expects it. This patch changes tmio_mmc_host_probe() behavior, but there is no user who has conflict. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: mxs: use mmc_of_parse to parse devicetree propertiesSascha Hauer2014-01-131-26/+11
| | | | | | | | Use generic helper function. This also adds support for the cd-gpios and max-frequency devicetree properties. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: mxs: use mmc_gpio_get_ro for detecting read-only statusSascha Hauer2014-01-131-23/+11
| | | | | | | | This also fixes that the read-only gpio was used without being requested. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: mxs: use standard flag for cd invertedSascha Hauer2014-01-131-4/+10
| | | | | | | | We have a MMC_CAP2_CD_ACTIVE_HIGH flag, so use it rather than a custom driver specific flag. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: mxs: use standard flag for broken card detectionSascha Hauer2014-01-131-4/+3
| | | | | | | | | | | Use the standard MMC_CAP_NEEDS_POLL flag rather than a custom broken_cd flag. The original code used to just return true in the card detection function for broken card detection. The MMC_CAP_NEEDS_POLL works different, but was introduced for the same purpose, so assume the code works correct now. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: mxs: use standard flag for non-removable statusSascha Hauer2014-01-131-4/+2
| | | | | | | | The standard caps already have a MMC_CAP_NONREMOVABLE flag. Use it rather than a custom non_removable flag. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: Do not call get_cd for non removable cardsSascha Hauer2014-01-131-1/+2
| | | | | | | | Non removable cards are always present, so do not call get_cd for them. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci-acpi: add new ACPI IDMika Westerberg2014-01-131-0/+2
| | | | | | | | | Newer Intel PCHs with LPSS have the same SDHCI controller than Haswell but ACPI ID is different. Add this ID to the driver list. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sh_mobile_sdhi: Convert to clk_prepare/unprepareLaurent Pinchart2014-01-131-2/+2
| | | | | | | | | | Turn clk_enable() and clk_disable() calls into clk_prepare_enable() and clk_disable_unprepare() to get ready for the migration to the common clock framework. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci-esdhc-imx: Use NULL instead of zeroFabio Estevam2014-01-131-1/+1
| | | | | | | | | | Fix the following sparse warning: drivers/mmc/host/sdhci-esdhc-imx.c:617:35: warning: Using plain integer as NULL pointer Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Cc: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci: Setting the host->mrq to NULL before executing tuningChuansheng Liu2014-01-131-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In function sdhci_request(), it is possible to do the tuning execution like below: sdhci_request() { spin_lock_irqsave(&host->lock, flags); host->mrq = mrq; ... spin_unlock_irqrestore(&host->lock, flags); <=== Here it is possible one pending finish_tasklet get running and it will operate the original mrq, and notified the mrq is done, and causes memory corruption. sdhci_execute_tuning(mmc, tuning_opcode); spin_lock_irqsave(&host->lock, flags); host->mrq = mrq; ... } In the above race place, the original mrq should not be finished wrongly, so here before unlock the spinlock, we need to set the host->mrq to NULL to avoid this case. Signed-off-by: Liu, Chuansheng <chuansheng.liu@intel.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: tmio: remove myself as a maintainerGuennadi Liakhovetski2014-01-131-1/+0
| | | | | | | | Since I'm currently unable to dedicate sufficient time to driver maintainership, remove myself from the maintainers list. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: atmel-mci: fix timeout errors in SDIO mode when using DMALudovic Desroches2014-01-131-1/+12
| | | | | | | | | | | | | With some SDIO devices, timeout errors can happen when reading data. To solve this issue, the DMA transfer has to be activated before sending the command to the device. This order is incorrect in PDC mode. So we have to take care if we are using DMA or PDC to know when to send the MMC command. Cc: stable <stable@vger.kernel.org> # 3.2+ Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: tmio: don't overwrite caps2Kuninori Morimoto2014-01-131-1/+1
| | | | | | | | | 02cb3221d5bb35 ("mmc: tmio: support caps2 flags") added caps2 support on tmio, but it overwrites mmc_of_parse() settings. This patch fixes it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent <laurent.pinchart@ideasonboard.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: fix host release issue after discard operationRay Jui2014-01-131-3/+4
| | | | | | | | | | | | | | | | | | Under function mmc_blk_issue_rq, after an MMC discard operation, the MMC request data structure may be freed in memory. Later in the same function, the check of req->cmd_flags & MMC_REQ_SPECIAL_MASK is dangerous and invalid. It causes the MMC host not to be released when it should. This patch fixes the issue by marking the special request down before the discard/flush operation. Reported by: Harold (SoonYeal) Yang <haroldsy@broadcom.com> Signed-off-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Seungwon Jeon <tgih.jun@samsung.com> Acked-by: Seungwon Jeon <tgih.jun@samsung.com> Cc: stable <stable@vger.kernel.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci-esdhc-imx: add runtime pm supportDong Aisheng2014-01-131-1/+48
| | | | | | | | The root clock will be disabled in runtime pm to save power. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci-esdhc-imx: fix runtime pm unbalance issueDong Aisheng2014-01-131-0/+1
| | | | | | | | | | Since we're using common esdhc_send_command for tuning commands and the core code will call pm_runtime_put after command is finished. So we add a pm_runtime_get_sync here to get the balance. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: esdhc-imx: clearing SDHCI_CTRL_EXEC_TUNING should not affect other bitsDong Aisheng2014-01-131-11/+13
| | | | | | | | | | | | | | | | | | | | | Current code will clear all turning related bits like ESDHC_STD_TUNING_EN and ESDHC_MIX_CTRL_FBCLK_SEL when clear SDHCI_CTRL_EXEC_TUNING. This may cause the card which has already passed the turning to become unwork since the turning status lost. We observed this failure when enable runtime pm. BTW, imx needs to enable ESDHC_MIX_CTRL_FBCLK_SEL bit for turned clock. The FBCLK_SEL will be cleared when SDHCI_CTRL_TUNED_CLK is cleared and SDHCI_CTRL_EXEC_TUNING is not set. This is used in case we change to another normal card from a UHS card in the same slot. FBCLK_SEL is not needed for normal card. After that, SDHCI_CTRL_EXEC_TUNING will only affect ESDHC_MIX_CTRL_EXE_TUNE. Clearing it does not affect the turned card to remain working on UHS mode. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci-esdhc-imx: tuning bits should not be cleared during resetDong Aisheng2014-01-131-1/+6
| | | | | | | | | | We should not clear tuning bits during reset or the SD3.0/eMMC4.5 card working on UHS mode may not work after reset since the former tuning settings was lost. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci-pltfm: export pltfm suspend/resume apiDong Aisheng2014-01-132-2/+6
| | | | | | | | It is helpful for platform code to use to eliminate duplicated code. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci-esdhc-imx: add eMMC HS200 mode supportDong Aisheng2014-01-131-0/+2
| | | | | | | | Add support for eMMC 4.5 cards to work on hs200 mode. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: core: mmc DDR mode should not depend on UHS_DDR50Dong Aisheng2014-01-131-6/+2
| | | | | | | | | | | | | The MMC_CAP_UHS_DDR50 must work on 1.8v. However, the eMMC DDR mode can work on either 1.8v or 3.3v and should not depend on UHS_DDR50. So get rid of this limitation to let controller without 1.8v signal voltage support can also work for eMMC DDR mode if it claims. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci-esdhc-imx: add MMC_CAP_1_8V_DDR for mx6Dong Aisheng2014-01-131-0/+1
| | | | | | | | The i.MX6 supports 1.8v/3.3v eMMC DDR mode, so add this flag. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci-esdhc-imx: fix cpas over write issueDong Aisheng2014-01-131-1/+1
| | | | | | | | | We should use '|=' instead '=', or it may over write the original caps assigned before this line. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci-esdhc-imx: add SDHCI_TRANSFER_MODE read functionDong Aisheng2013-11-261-0/+16
| | | | | | | | | Used to read out the correct value of SDHCI_TRANSFER_MODE register for upper layer. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci: clear auto cmd setting bits for no data cmdsDong Aisheng2013-11-261-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | The auto cmd settings bits should be cleared before sending new commands or we may receive command timeout error for normal commands due to wrongly pre-sent auto cmd. e.g. we receive CMD13 timeout error due to ACMD23 is wrongly enabled by former data commands. mmc2: new high speed DDR MMC card at address 0001 mmcblk1: mmc2:0001 SEM08G 7.39 GiB mmcblk1boot0: mmc2:0001 SEM08G partition 1 2.00 MiB mmcblk1boot1: mmc2:0001 SEM08G partition 2 2.00 MiB mmcblk1rpmb: mmc2:0001 SEM08G partition 3 128 KiB mmcblk1: p1 p2 p3 p4 < p5 p6 p7 > mmc2: Timeout waiting for hardware interrupt. mmcblk1boot1: unknown partition table mmc2: Timeout waiting for hardware interrupt. mmcblk1boot0: unknown partition table Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* Merge tag 'fixes-for-linus' of ↵Linus Torvalds2013-11-2622-192/+379
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "Mostly bugfixes and a few small code removals. Worth pointing out is: - A handful of more fixes to get DT enablement working properly on OMAP, finding new breakage of things that don't work quite right yet without the traditional board files. I expect a bit more of this to come in this release as people test on their hardware. - Implementation of power_down_finish() on vexpress, to make kexec work and to stop the MCPM core to produce a warning (the warning was new to 3.13-rc1). - A handful of minor fixes for various platforms" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: bcm2835: add missing #xxx-cells to I2C nodes ARM: dts: Add max77686 RTC interrupt to cros5250-common ARM: vexpress/TC2: Implement MCPM power_down_finish() ARM: tegra: Provide dummy powergate implementation ARM: omap: fix warning with LPAE build ARM: OMAP2+: Remove legacy omap4_twl6030_hsmmc_init ARM: OMAP2+: Remove legacy mux code for display.c ARM: OMAP2+: Fix undefined reference to set_cntfreq gpio: twl4030: Fix passing of pdata in the device tree case gpio: twl4030: Fix regression for twl gpio output ARM: OMAP2+: More randconfig fixes for reconfigure_io_chain ARM: dts: imx6qdl: disable spdif "rxtx5" clock option ARM: dts: Fix omap2 specific dtsi files by adding the missing entries ARM: OMAP2+: Fix GPMC and simplify bootloader timings for 8250 and smc91x i2c: omap: Fix missing device tree flags for omap2
| * ARM: bcm2835: add missing #xxx-cells to I2C nodesStephen Warren2013-11-251-0/+4
| | | | | | | | | | | | | | | | | | | | The I2C controller node needs #address-cells and #size-cells properties, but these are currently missing. Add them. This allows child nodes to be parsed correctly. Cc: stable@vger.kernel.org Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Olof Johansson <olof@lixom.net>
| * Merge tag 'imx-fixes-3.13-2' of ↵Kevin Hilman2013-11-251-1/+1
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/people/shawnguo/linux-2.6 into fixes The imx fixes for 3.13, part 2: - Disable S/PDIF "rxtx5" clock option to fix the clocksource breakage introduced by S/PDIF driver * tag 'imx-fixes-3.13-2' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: dts: imx6qdl: disable spdif "rxtx5" clock option Signed-off-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
| | * ARM: dts: imx6qdl: disable spdif "rxtx5" clock optionShawn Guo2013-11-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The spdif "rxtx5" clock option is being set to ipg clk (62) by mistake. This causes an incorrect time keeping when spdif driver is running, because ipg is ancestor clock for clocksource while spdif driver will change the rate of this clock in certain circumstance. Before the correct clock for "rxtx5" option can be supplied, let's disable this option for now by filling a dummy clock for it. Reported-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: dts: Add max77686 RTC interrupt to cros5250-commonDoug Anderson2013-11-251-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without the interrupt you'll get problems if you enable CONFIG_RTC_DRV_MAX77686. Setup the interrupt properly in the device tree. Signed-off-by: Doug Anderson <dianders@chromium.org> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net> Cc: stable@vger.kernel.org
| * | ARM: vexpress/TC2: Implement MCPM power_down_finish()Dave Martin2013-11-253-5/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements the power_down_finish() method for TC2, to enable the kernel to confirm when CPUs are safely powered down. The information required for determining when a CPU is parked cannot be obtained from any single place, so a few sources of information must be combined: * mcpm_cpu_power_down() must be pending for the CPU, so that we don't get confused by false STANDBYWFI positives arising from CPUidle. This is detected by waiting for the tc2_pm use count for the target CPU to reach 0. * Either the SPC must report that the CPU has asserted STANDBYWFI, or the TC2 tile's reset control logic must be holding the CPU in reset. Just checking for STANDBYWFI is not sufficient, because this signal is not latched when the the cluster is clamped off and powered down: the relevant status bits just drop to zero. This means that STANDBYWFI status cannot be used for reliable detection of the last CPU in a cluster reaching WFI. This patch is required in order for kexec to work with MCPM on TC2. MCPM code was changed in commit 0de0d6467525 ('ARM: 7848/1: mcpm: Implement cpu_kill() to synchronise on powerdown'), and since then it will hit a WARN_ON_ONCE() due to power_down_finish not being implemented on the TC2 platform. Signed-off-by: Dave Martin <Dave.Martin@arm.com> Acked-by: Pawel Moll <pawel.moll@arm.com> Reviewed-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | ARM: tegra: Provide dummy powergate implementationThierry Reding2013-11-251-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to support increased build test coverage for drivers, implement dummies for the powergate implementation. This will allow the drivers to be built without requiring support for Tegra to be selected. This patch solves the following build errors, which can be triggered in v3.13-rc1 by selecting DRM_TEGRA without ARCH_TEGRA: drivers/built-in.o: In function `gr3d_remove': drivers/gpu/drm/tegra/gr3d.c:321: undefined reference to `tegra_powergate_power_off' drivers/gpu/drm/tegra/gr3d.c:325: undefined reference to `tegra_powergate_power_off' drivers/built-in.o: In function `gr3d_probe': drivers/gpu/drm/tegra/gr3d.c:266: undefined reference to `tegra_powergate_sequence_power_up' drivers/gpu/drm/tegra/gr3d.c:273: undefined reference to `tegra_powergate_sequence_power_up' Signed-off-by: Thierry Reding <treding@nvidia.com> [swarren, updated commit description] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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