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* powerpc/pseries: Introduce pSeries_reconfig_notify()Akinobu Mita2011-06-293-19/+23
| | | | | | | | | | | | | | This introduces pSeries_reconfig_notify() as a just wrapper of blocking_notifier_call_chain() for pSeries_reconfig_chain. This is a preparation to improvement of error code on reconfiguration notifier failure. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/maple: Enable scom access functions on MapleDmitry Eremin-Solenikov2011-06-291-2/+2
| | | | | | | | Enable functions used to access SCOM if PPC_MAPLE is defined: they are used by cpufreq driver to control hardware. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: mem_init should call memblock_is_reserved with phys_addr_tBecky Bruce2011-06-291-1/+2
| | | | | | | | This has been broken for a while but hasn't been an issue until now because nobody was reserving regions at high addresses. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Whitespace fix to include/asm/pgtable-ppc64.hBecky Bruce2011-06-291-1/+2
| | | | | Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/book3e-64: use a separate TLB handler when linear map is boltedScott Wood2011-06-294-34/+266
| | | | | | | | | | | | | | | | | On MMUs such as FSL where we can guarantee the entire linear mapping is bolted, we don't need to worry about linear TLB misses. If on top of that we do a full table walk, we get rid of all recursive TLB faults, and can dispense with some state saving. This gains a few percent on TLB-miss-heavy workloads, and around 50% on a benchmark that had a high rate of virtual page table faults under the normal handler. While touching the EX_TLB layout, remove EX_TLB_MMUCR0, EX_TLB_SRR0, and EX_TLB_SRR1 as they're not used. [BenH: Fixed build with 64K pages (wsp config)] Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/book3e-64: Reraise doorbell when masked by soft-irq-disableScott Wood2011-06-294-16/+21
| | | | | Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* Merge remote branch 'jwb/next' into nextBenjamin Herrenschmidt2011-06-293-1/+24
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| * powerpc/4xx: Update Canyonlands and Glacier boards DTS to add HW RNG supportMike Williams2011-06-282-1/+12
| | | | | | | | | | | | | | This will allow the new HW RNG driver to bind on these boards Signed-off-by: Mike Williams <mike@mikebwilliams.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * ppc4xx: Add crypto and RNG entries to Sequoia DTSJosh Boyer2011-06-281-0/+12
| | | | | | | | | | | | | | The Sequoia board has a Security function IP block on it that contains a TRNG. Add the crypto and rng portions of that IP block to the DTS. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | powerpc/85xx: disable timebase synchronization under the hypervisorTimur Tabi2011-06-273-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | The Freescale hypervisor does not allow guests to write to the timebase registers (virtualizing the timebase register was deemed too complicated), so don't try to synchronize the timebase registers when we're running under the hypervisor. This typically happens when kexec support is enabled. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Add P1010RDB board supportPrabhakar Kushwaha2011-06-276-0/+790
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | P1010RDB Overview ----------------- 1Gbyte DDR3 (on board DDR) 32Mbyte 16bit NOR flash 32Mbyte SLC NAND Flash 256 Kbit M24256 I2C EEPROM 128 Mbit SPI Flash memory I2C Board 128x8 bit memory SD/MMC connector to interface with the SD memory card 2 SATA interface 1 internal SATA connect to 2.5. 160G SATA2 HDD 1 eSATA connector to rear panel USB 2.0 x1 USB 2.0 port: connected via a UTMI PHY to Mini-AB interface. x1 USB 2.0 port: directly connected to Mini-AB interface Ethernet eTSEC1: Connected to RGMII PHY VSC8641XKO eTSEC2: Connected to SGMII PHY VSC8221 eTSEC3: Connected to SGMII PHY VSC8221 eCAN Two DB-9 female connectors for Field bus interface UART DUART interface: supports two UARTs up to 115200 bps for console display Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/86xx: enable the framebuffer console on the MPC8610 HPCDTimur Tabi2011-06-271-0/+5
| | | | | | | | | | | | | | | | | | Enable framebuffer console support by default in the defconfig on the Freescale MPC8610 HPCD reference board. This allows the boot messages to be shown on the video display. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/86xx: improve calculation of DIU pixel clock on the MPC8610 HPCDTimur Tabi2011-06-271-59/+48
| | | | | | | | | | | | | | | | | | | | | | mpc8610hpcd_set_pixel_clock() calculates the correct value of the PXCLK bits in the CLKDVDR register for a given pixel clock rate. The code which performs this calculation is overly complicated and includes an error estimation routine that doesn't work most of the time anyway. Replace the code with the simpler routine that's currently used on the P1022DS. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: enable the framebuffer console for the defconfigsTimur Tabi2011-06-272-0/+8
| | | | | | | | | | | | | | | | | | Enable framebuffer console support by default in the defconfigs for the Freescale 85xx-based reference board. This allows the boot messages to be shown on the video display on the P1022DS. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: clamp the P1022DS DIU pixel clock to allowed valuesTimur Tabi2011-06-271-1/+6
| | | | | | | | | | | | | | | | | | To ensure that the DIU pixel clock will not be set to an invalid value, clamp the PXCLK divider to the allowed range (2-255). This also acts as a limiter for the pixel clock. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/e500mc: Add support for the wait instruction in e500_idleScott Wood2011-06-274-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | e500mc cannot doze or nap due to an erratum (as well as having a different mechanism than previous e500), but it has a "wait" instruction that is similar to doze. On 64-bit, due to the soft-irq-disable mechanism, the existing book3e_idle should be used instead. Signed-off-by: Vakul Garg <vakul@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Add P4080 SoC device tree include stubKumar Gala2011-06-272-587/+662
| | | | | | | | | | | | | | | | Split out common (non-board specific) parts of the SoC related device tree into a stub so multiple board dts files can include it and we can reduce duplication and maintenance effort. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | MAINTAINERS: add arch/powerpc/platforms/85xx/ to the 85xx entryBaruch Siach2011-06-271-0/+1
| | | | | | | | | | | | Cc: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/p1022ds: add missing iounmap calls to platform fileTimur Tabi2011-06-271-3/+8
| | | | | | | | | | | | | | | | The platform file for the Freecale P1022DS reference board is not freeing the ioremap() mapping of the PIXIS and global utilities nodes it creates. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: specify interrupt for pq3-localbus devicesDmitry Eremin-Solenikov2011-06-278-0/+16
| | | | | | | | | | | | | | | | fsl-lbc driver requires an interrupt to bind to localbus device. Populate 85xx boards' dts trees with lbc interrupt info. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: tqm8540 - add description for onboard flashDmitry Eremin-Solenikov2011-06-271-0/+40
| | | | | | | | | | Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Update device tree to add nand info for p3041dsLei Xu2011-06-271-0/+39
| | | | | | | | | | Signed-off-by: Lei Xu <B33228@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Update device tree to add nand info for p5020dsLei Xu2011-06-271-0/+39
| | | | | | | | | | Signed-off-by: Lei Xu <B33228@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Add host-pci(e) bridge only for RCPrabhakar Kushwaha2011-06-271-0/+13
| | | | | | | | | | | | | | | | | | | | | | FSL PCIe controller can act as agent(EP) or host(RC). Under Agent(EP) mode the controller will be configured by the host system. So its not required to be registered with the PCI(e) sub-system. We only register the controller if its configured in host(RC) mode. Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: add board support for the Freescale hypervisorTimur Tabi2011-06-275-3/+55
| | | | | | | | | | | | | | | | Add support for the ePAPR-compliant Freescale hypervisor (aka "Topaz") on the Freescale P3041DS, P4080DS, and P5020DS reference boards. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc: add Freescale hypervisor partition control functionsTimur Tabi2011-06-272-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add functions to restart and halt the current partition when running under the Freescale hypervisor. These functions should be assigned to various function pointers of the ppc_md structure during the .probe() function for the board: ppc_md.restart = fsl_hv_restart; ppc_md.power_off = fsl_hv_halt; ppc_md.halt = fsl_hv_halt; Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc: introduce the ePAPR embedded hypervisor vmpic driverAshish Kalra2011-06-274-0/+347
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Freescale ePAPR reference hypervisor provides interrupt controller services via a hypercall interface, instead of emulating the MPIC controller. This is called the VMPIC. The ePAPR "virtual interrupt controller" provides interrupt controller services for external interrupts. External interrupts received by a partition can come from two sources: - Hardware interrupts - hardware interrupts come from external interrupt lines or on-chip I/O devices. - Virtual interrupts - virtual interrupts are generated by the hypervisor as part of some hypervisor service or hypervisor-created virtual device. Both types of interrupts are processed using the same programming model and same set of hypercalls. Signed-off-by: Ashish Kalra <ashish.kalra@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc: introduce ePAPR embedded hypervisor hcall interfaceTimur Tabi2011-06-272-0/+1157
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ePAPR hypervisors provide operating system services via a "hypercall" interface. The following steps need to be performed to make an hcall: 1. Load r11 with the hcall number 2. Load specific other registers with parameters 3. Issue instrucion "sc 1" 4. The return code is in r3 5. Other returned parameters are in other registers. To provide this service to the kernel, these steps are wrapped in inline assembly functions. Standard ePAPR hcalls are in epapr_hcalls.h, and Freescale extensions are in fsl_hcalls.h. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc: make irq_choose_cpu() available to all PIC driversStuart Yoder2011-06-223-36/+37
| | | | | | | | | | | | | | | | | | Move irq_choose_cpu() into arch/powerpc/kernel/irq.c so that it can be used by other PIC drivers. The function is not MPIC-specific. Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/qe: Limit QE support to ppc32Kumar Gala2011-06-221-1/+1
| | | | | | | | | | | | Only 32-bit SoCs have a QUICC Engine so limit the config option to PPC32. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Add PCI support in 64-bit mode on P5020DSKumar Gala2011-06-221-0/+5
| | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/pci: Move FSL fixup from 32-bit to commonKumar Gala2011-06-222-19/+18
| | | | | | | | | | | | | | We need the FSL specific header fixup code on both 32-bit and 64-bit platforms so just move the code into pci-common.c. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Add basic P1023RDS board supportRoy Zang2011-06-227-9/+892
| | | | | | | | | | | | | | | | | | | | The P1023 processor is an e500v2 based SoC that utilizes the DPAA networking architecture. This adds basic board support for non-DPAA functionality (device tree, board file, etc). Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Save scratch registers to thread info instead of using SPRGs.Ashish Kalra2011-06-225-40/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We expect this is actually faster, and we end up needing more space than we can get from the SPRGs in some instances. This is also useful when running as a guest OS - SPRGs4-7 do not have guest versions. 8 slots are allocated in thread_info for this even though we only actually use 4 of them - this allows space for future code to have more scratch space (and we know we'll need it for things like hugetlb). Signed-off-by: Ashish Kalra <Ashish.Kalra@freescale.com> Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Set up doorbells even with no mpicScott Wood2011-06-221-9/+12
| | | | | | | | | | | | | | | | In cases like when the platform is used under hypervisor we will NOT have an MPIC controller but still want doorbells setup. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/fsl_pci: Simplify matching logic for PCI_FIXUP_HEADERKumar Gala2011-06-221-61/+9
| | | | | | | | | | | | | | | | | | We fixup every FSL PCIe Root Complex we need to fixup a few things. Rather than adding every device under the sun we move to just matching only on the vendor (PCI_VENDOR_ID_FREESCALE) and than check that we are a PCIe controller in host mode in the fixup. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Cleanup PCIe support on corenet_ds boardsKumar Gala2011-06-222-30/+17
| | | | | | | | | | | | | | | | | | | | | | | | Several changes on PCIe support on P3041DS/P4080DS/P5020DS boards: * Add support for "fsl,qoriq-pcie-v2.2" needed by P3041 & P5020 * Removed support for setting primary_phb_addr as we have no ISA need * Add PCI controller to of_platform_bus_probe (for EDAC) * Cleanup building w/SWIOTLB off on P4080DS (not stricly PCIe related) Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com> Signed-off-by: Laurentiu TUDOR <Laurentiu.Tudor@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Updates to P4080DS device treeKumar Gala2011-06-221-107/+222
| | | | | | | | | | | | | | | | | | | | | | | | | | * Added BSD dual-license * Moved mpic-parent to root so we dont need to duplicate everywhere * Added next level cache from L2 to CPC * Moved to 4-cell MPIC interrupt properties * Added 3 MSI banks * Added numerous missing nodes: soc-sram-error, guts, pins, clockgen, rcpm, sfp, serdes, etc. * Reworked PCIe interrupts to be at virtual bridge level Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Add P3041DS device treeKumar Gala2011-06-221-0/+752
| | | | | | | | | | | | | | Add basic device tree for P3041DS board. This device tree excludes support for DPAA and RapidIO nodes. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Add P5020DS device treeKumar Gala2011-06-221-0/+745
| | | | | | | | | | | | | | Add basic device tree for P5020DS board. This device tree excludes support for DPAA and RapidIO nodes. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc: Add a defconfig for 'corenet' 32-bit platformsKumar Gala2011-06-221-0/+183
| | | | | | | | | | | | | | | | The e500mc and e5500 based cores are only available on corenet based SoCs. We use this name for the P204x, P3040, P4040, P4080, P50x0 SoCs and any future processors in these families. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc: Rename e55xx_smp_defconfig to corenet64_smp_defconfigKumar Gala2011-06-221-0/+0
|/ | | | | | | | Rather than trying to use the core name we use corenet to distinquish the platform/core combo. corenet64 will be a 64-bit kernel build and we'll add a new defconfig for corenet32 for a 32-bit platforms. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: Fix doorbell type shiftMichael Neuling2011-06-201-1/+1
| | | | | | | | | | | doorbell type is defined as bits 32:36 so should be shifted by 63-36 = 27 rather than 28. We never noticed this bug as we've only every used type PPC_DBELL = 0. Signed-off-by: Michael Neuling <mikey@neuling.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* Document powerpc udbg-immortalChristian Kujau2011-06-201-0/+5
| | | | | | | | | | | | | | | | Back in 2006 the "udbg-immortal" kernel option has been introduced: > commit 3b5e905ee3bd23e9311951890aba57a0dbc81ca4 > Author: Benjamin Herrenschmidt <benh@au1.ibm.com> > Date: Wed Jun 7 12:06:20 2006 +1000 > > [PATCH] powerpc: Add udbg-immortal kernel option ...but I could not find it documented anywhere in the sources. This patch adds it to Documentation/kernel-parameters.txt. Signed-off-by: Christian Kujau <lists@nerdbynature.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/mpic: Support compiling with DEBUG enabledDmitry Eremin-Solenikov2011-06-201-1/+1
| | | | | | | | Support compilation of mpic.c with DEBUG defined, as now we have irq_desc and not irq number. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Avoid extra indirect function call in sending IPIsPaul Mackerras2011-06-206-9/+19
| | | | | | | | | | | | | | | On many platforms (including pSeries), smp_ops->message_pass is always smp_muxed_ipi_message_pass. This changes arch/powerpc/kernel/smp.c so that if smp_ops->message_pass is NULL, it calls smp_muxed_ipi_message_pass directly. This means that a platform doesn't need to set both .message_pass and .cause_ipi, only one of them. It is a slight performance improvement in that it gets rid of an indirect function call at the expense of a predictable conditional branch. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Fix early boot accounting of CPUsMatt Evans2011-06-175-6/+13
| | | | | | | | | smp_release_cpus() waits for all cpus (including the bootcpu) due to an off-by-one count on boot_cpu_count (which is all CPUs). This patch replaces that with spinning_secondaries (which is all secondary CPUs). Signed-off-by: Matt Evans <matt@ozlabs.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/book3e: Clarify HW table walk enable/disable messageKumar Gala2011-06-171-2/+2
| | | | | | | | | | | | | | Before if we didn't support or enable HW table walk we'd get a messaage like: MMU: Book3E Page Tables Disabled Which is a bit misleading. Now it will say: MMU: Book3E HW tablewalk not supported Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* Merge branch 'pm-fixes' of ↵Linus Torvalds2011-06-082-9/+9
|\ | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rafael/suspend-2.6 * 'pm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/suspend-2.6: PM / Runtime: Fix loops in pm_runtime_clk_notify() PM / Intel IOMMU: Fix init_iommu_pm_ops() for CONFIG_PM unset
| * PM / Runtime: Fix loops in pm_runtime_clk_notify()Rafael J. Wysocki2011-06-071-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | The loops over connection ID strings in pm_runtime_clk_notify() should actually iterate over the strings and not over the elements of the first of them, so make them behave as appropriate. This fixes a regression introduced by commit 600b776eb39a13a28b090 (OMAP1 / PM: Use generic clock manipulation routines for runtime PM). Reported-and-tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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