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* Merge tag 'clk-for-linus' of git://git.linaro.org/people/mturquette/linuxLinus Torvalds2012-12-1143-573/+1491
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull clock framework changes from Mike Turquette: "The common clock framework changes for 3.8 are comprised of lots of fixes for existing platforms as well as new ports for some ARM platforms. In addition there are new clk drivers for audio devices and MFDs." Fix up trivial conflict in <linux/clk-provider.h> (removal of 'inline' clashing with return type fixes) * tag 'clk-for-linus' of git://git.linaro.org/people/mturquette/linux: (51 commits) MAINTAINERS: bad email address for Mike Turquette clk: introduce optional disable_unused callback clk: ux500: fix bit error clk: clock multiplexers may register out of order clk: ux500: Initial support for abx500 clock driver CLK: SPEAr: Remove unused dummy apb_pclk CLK: SPEAr: Correct index scanning done for clock synths CLK: SPEAr: Update clock rate table CLK: SPEAr: Add missing clocks CLK: SPEAr: Set CLK_SET_RATE_PARENT for few clocks CLK: SPEAr13xx: fix parent names of multiple clocks CLK: SPEAr13xx: Fix mux clock names CLK: SPEAr: Fix dev_id & con_id for multiple clocks clk: move IM-PD1 clocks to drivers/clk clk: make ICST driver handle the VCO registers clk: add GPLv2 headers to the Versatile clock files clk: mxs: Use a better name for the USB PHY clock clk: spear: Add stub functions for spear3[0|1|2]0_clk_init() CLK: clk-twl6040: fix return value check in twl6040_clk_probe() clk: ux500: Register nomadik keypad clock lookups for u8500 ...
| * MAINTAINERS: bad email address for Mike TurquetteMike Turquette2012-12-101-1/+0
| | | | | | | | Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: introduce optional disable_unused callbackMike Turquette2012-12-102-2/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some gate clocks have special needs which must be handled during the disable-unused clocks sequence. These needs might be driven by software due to the fact that we're disabling a clock outside of the normal clk_disable path and a clk's enable_count will not be accurate. On the other hand a specific hardware programming sequence might need to be followed for this corner case. This change is needed for the upcoming OMAP port to the common clock framework. Specifically, it is undesirable to treat the disable-unused path identically to the normal clk_disable path since other software layers are involved. In this case OMAP's clockdomain code throws WARNs and bails early due to the clock's enable_count being set to zero. A custom callback mitigates this problem nicely. Cc: Paul Walmsley <paul@pwsan.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: ux500: fix bit errorLinus Walleij2012-12-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a bit error in the U8500 clock implementation: the unused p2_pclk12 registered at bit 12 in periphereral group 6 was defined as using bit 11 rather than bit 12. When walking over and disabling the unused clocks in the tree at late init time, p2_pclk12 was disabled, by effectively clearing the but for p2_pclk11 instead of bit 12 as it should have, thus disabling gpio block 6 and 7. Reported-by: Lee Jones <lee.jones@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Cc: Philippe Begnic <philippe.begnic@st.com> Cc: stable@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: clock multiplexers may register out of orderMartin Fuzzey2012-11-261-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a clock, C is initialised any orphan clocks listing C as a possible parent are reparented to it regardless of the parent requested by the orphan's get_parent() operation. This means that multiplexers registered before their parents are reparented to the first parent subsequently declared, regardless of the selection made by the hardware registers. For example: static const char *sel[] = { "srcA", "srcB", "dummy", "srcC" }; child = clk_register_mux(NULL, "child", sel, ARRAY_SIZE(sel), ...); clk_register_fixed(NULL, "dummy", ...); clk_register_fixed(NULL, "srcA", ...); clk_register_fixed(NULL, "srcB", ...); clk_register_fixed(NULL, "srcC", ...); Causes child's parent to always be "dummy". To fix this, when an orphanned clock has a get_parent() operation, only reparent to the clock indicated by get_parent(). Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> [mturquette@linaro.org: improve $SUBJECT]
| * clk: ux500: Initial support for abx500 clock driverUlf Hansson2012-11-262-0/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | The abx500 clock driver is a platform driver which will be initialized during arch init. The platform device shall be added from the ab-core driver as a mfd child device to maintain correct boot sequence. Depending on what ab version we use, different clock definitions will be added. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * CLK: SPEAr: Remove unused dummy apb_pclkVipul Kumar Samar2012-11-214-12/+0
| | | | | | | | | | | | | | | | | | | | | | Dummy clocks were added for ARM platforms, so that clk_get() for interface clk doesn't fail for amba devices from amba_probe(). Because there is no amba device for SPEAr that doesn't have a valid clock with dev_id for SPEAr, we don't need these dummy clocks. Hence, remove them. Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * CLK: SPEAr: Correct index scanning done for clock synthsDeepak Sikri2012-11-211-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | The patch corrects the case when the rate table is being scanned for a given frequency, and the search frequency is beyond the maximum frequency indexed in the table. By default, the system should be set at max frequency present in the rate table. This patch correctly returns the corresponding index value. Signed-off-by: Deepak Sikri <deepak.sikri@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * CLK: SPEAr: Update clock rate tableDeepak Sikri2012-11-214-21/+89
| | | | | | | | | | | | | | | | | | | | This patch updates the existing rate tables with new frequencies. Signed-off-by: Deepak Sikri <deepak.sikri@st.com> Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * CLK: SPEAr: Add missing clocksVipul Kumar Samar2012-11-213-0/+16
| | | | | | | | | | | | | | | | | | This patch adds missing clocks: twd and macb. Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Deepak Sikri <deepak.sikri@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * CLK: SPEAr: Set CLK_SET_RATE_PARENT for few clocksVipul Kumar Samar2012-11-215-114/+133
| | | | | | | | | | | | | | | | | | | | | | | | | | Flag CLK_SET_RATE_PARENT is required for a clock, where we want to propagate clk_set_rate to its parent. This patch adds this to multiple clocks. Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by: Vijay Kumar Mishra <vijay.kumar@st.com> Signed-off-by: Vijay Kumar Mishra <vijay.kumar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * CLK: SPEAr13xx: fix parent names of multiple clocksShiraz Hashim2012-11-212-4/+4
| | | | | | | | | | | | | | | | | | | | This patch fixes parent names of multiple clocks. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * CLK: SPEAr13xx: Fix mux clock namesShiraz Hashim2012-11-212-12/+12
| | | | | | | | | | | | | | | | | | | | This patch updates mux clock names of multiple clocks. It updates _clk with _mclk to make it more readable. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * CLK: SPEAr: Fix dev_id & con_id for multiple clocksRajeev Kumar2012-11-214-41/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | dev_id & con_id names of multiple clocks are incorrect. This patch fixes these names with the names that come via DT. Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Bhavna Yadav <bhavna.yadav@st.com> Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Deepak Sikri <deepak.sikri@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: move IM-PD1 clocks to drivers/clkLinus Walleij2012-11-214-66/+103
| | | | | | | | | | | | | | | | | | The ARM IM-PD1 add-on module has a few clock of its own, let's move also these down to the drivers/clk/versatile driver dir and get rid of any remaining oldschool Integrator clocks. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: make ICST driver handle the VCO registersLinus Walleij2012-11-214-95/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | It turns out that all platforms using the ICST VCO are really just touching two registers, and in the same way as well: one register with the VCO configuration as such, and one lock register that makes it possible to write to the VCO. Factor this register read/write into the ICST driver so we can reuse it in the IM-PD1 driver. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: add GPLv2 headers to the Versatile clock filesLinus Walleij2012-11-213-1/+23
| | | | | | | | | | | | | | | | | | | | The GPLv2 headers were missing and the subsystem maintainer likes them so put them in. I am the copyright holder, so explicitly licensing these under the GPLv2. Reported-by: Mike Turquette <mturquette@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: mxs: Use a better name for the USB PHY clockFabio Estevam2012-11-164-11/+11
| | | | | | | | | | | | | | | | Use a better name for the USB PHY clock. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: spear: Add stub functions for spear3[0|1|2]0_clk_init()Axel Lin2012-11-151-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes compile error if one of SPEAr3xx implementations is not selected. CC drivers/clk/spear/spear3xx_clock.o drivers/clk/spear/spear3xx_clock.c: In function 'spear3xx_clk_init': drivers/clk/spear/spear3xx_clock.c:599:3: error: implicit declaration of function 'spear300_clk_init' [-Werror=implicit-function-declaration] drivers/clk/spear/spear3xx_clock.c:601:3: error: implicit declaration of function 'spear310_clk_init' [-Werror=implicit-function-declaration] drivers/clk/spear/spear3xx_clock.c:603:3: error: implicit declaration of function 'spear320_clk_init' [-Werror=implicit-function-declaration] cc1: some warnings being treated as errors make[3]: *** [drivers/clk/spear/spear3xx_clock.o] Error 1 make[2]: *** [drivers/clk/spear] Error 2 make[1]: *** [drivers/clk] Error 2 make: *** [drivers] Error 2 Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * CLK: clk-twl6040: fix return value check in twl6040_clk_probe()Wei Yongjun2012-11-151-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | In case of error, the function clk_register() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: ux500: Register nomadik keypad clock lookups for u8500Ulf Hansson2012-11-151-0/+4
| | | | | | | | | | | | Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: ux500: Register rng clock lookups for u8500Ulf Hansson2012-11-151-1/+2
| | | | | | | | | | | | Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: ux500: Register slimbus clock lookups for u8500Ulf Hansson2012-11-091-2/+3
| | | | | | | | | | | | | | | | | | | | At the same time the prcc bit for the kclk is corrected to bit 8 instead of 3. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: ux500: Update rtc clock lookup for u8500Ulf Hansson2012-11-091-1/+1
| | | | | | | | | | | | | | Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: ux500: Register msp clock lookups for u8500Ulf Hansson2012-11-091-0/+18
| | | | | | | | | | | | | | | | Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: ux500: Register ssp clock lookups for u8500Ulf Hansson2012-11-091-0/+6
| | | | | | | | | | | | | | Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: ux500: Register i2c clock lookups for u8500Ulf Hansson2012-11-091-1/+18
| | | | | | | | | | | | | | | | | | Cc: Ben Dooks <ben-linux@fluff.org> Cc: Wolfram Sang <w.sang@pengutronix.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * CLK: vt8500: Fix SDMMC clk special casesTony Prisk2012-11-091-0/+18
| | | | | | | | | | | | | | | | | | This patch adds some additional handling for the SDMMC special case in round_rate and set_rate which results in invalid divisor messages at boot time. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: fix return value check in bcm2835_init_clocks()Wei Yongjun2012-11-091-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | In case of error, the function clk_register_fixed_rate() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * cpufreq: db8500: Use armss clk to update frequencyUlf Hansson2012-11-091-8/+16
| | | | | | | | | | | | | | | | | | | | Using the armss clk to update the frequency makes the driver no more directly dependant on the prmcu API. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Cc: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: ux500: Add armss clk and fixup smp_twd clk for u8500Ulf Hansson2012-11-091-6/+8
| | | | | | | | | | | | | | | | | | | | | | The new armss clk is a prcmu_scalable_rate clk which represents the ARMSS clk. This then makes it possible to convert the smp_twd clk to a fixed factor clock type, using a fixed divider of 2 and with the armss clk as parent. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: ux500: Support for prcmu_scalable_rate clockUlf Hansson2012-11-092-0/+23
| | | | | | | | | | | | | | | | The prcmu_scalable_rate clock can change rate but is not gateable. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * mfd: db8500: Connect ARMSS clk to ARM OPPUlf Hansson2012-11-091-22/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | ARMSS clk directly maps it's frequency towards the cpufreq table. To be able to update the ARMSS clk rate, a new set_rate function for the ARMSS clk is added, which also will trigger a corresponding ARM OPP request. Additionally an ARMSS clk round_rate function is added to fetch valid cpufreq frequencies. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * cpufreq: db8500: Fetch cpufreq table from platform dataUlf Hansson2012-11-091-42/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By fetching the table as platform data we do not need the internally hardcoded cpufreq table anymore. Moreover the corresponding arm_opp idx2opp table, used for mapping frequency to correct opp bits is also removed. This due to that the opp bits is put directly in the index field of the cpufreq table. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Acked-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * cpufreq: db8500: Register as a platform driverUlf Hansson2012-11-091-1/+19
| | | | | | | | | | | | | | | | | | | | | | To fetch the mfd child device we register the cpufreq driver as a platform driver. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Acked-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * mfd: db8500: Provide cpufreq table as platform dataUlf Hansson2012-11-091-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | The cpufreq table needs dynamically update due to what the PRCMU firmware is supporting. The table is then provided through to the mfd child device as platform data. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * ARM: ux500: Remove cpufreq platform deviceUlf Hansson2012-11-091-6/+0
| | | | | | | | | | | | | | | | | | | | The cpufreq device is already added from the prcmu driver as a mfd child device. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: wm831x: Use devm_clk_register() to simplify codeStephen Boyd2012-10-291-23/+7
| | | | | | | | | | | | | | | | | | Move this driver to use devm_clk_register() to simplify some error paths and reduce lines of code. Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: Add devm_clk_{register,unregister}()Stephen Boyd2012-10-292-21/+92
| | | | | | | | | | | | | | | | | | | | Some clock drivers can be simplified if devres takes care of unregistering any registered clocks along error paths. Introduce devm_clk_register() so that clock drivers get unregistration for free along with simplified error paths. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: wm831x: Fix clk_register() error code checkingStephen Boyd2012-10-291-6/+6
| | | | | | | | | | | | | | | | | | clk_register() returns an ERR_PTR upon failure, not NULL. Fix these error paths. Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: Common clocks implementation for Versatile ExpressPawel Moll2012-10-294-3/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a DT and non-DT based implementation of the common clock infrastructure for Versatile Express platform. It registers (statically or using DT) all required fixed clocks, initialises motherboard's SP810 cell (that provides clocks for SP804 timers) and explicitly registers VE "osc" driver, to make the clock generators available early. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: Versatile Express clock generators ("osc") driverPawel Moll2012-10-292-0/+147
| | | | | | | | | | | | | | | | | | This driver provides a common clock framework hardware driver for Versatile Express clock generators (a.k.a "osc") controlled via the config bus. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * CLK: clk-twl6040: Initial clock driver for OMAP4+ McPDM fclk clockPeter Ujfalusi2012-10-293-0/+135
| | | | | | | | | | | | | | | | | | | | | | On OMAP4+ platforms the functional clock for the McPDM IP is suplied by the twl6040 codec (bit clock on the PDM bus). This common clock driver for twl6040 will register the mcpdm_fclk clock to be used by the McPDM driver to make sure that the needed clocks are available when needed. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: fix return value check in sirfsoc_of_clk_init()Wei Yongjun2012-10-291-42/+42
| | | | | | | | | | | | | | | | | | | | | | | | In case of error, the function clk_register() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: fix return value check in of_fixed_clk_setup()Wei Yongjun2012-10-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | In case of error, the function clk_register_fixed_rate() returns ERR_PTR() not NULL pointer. The NULL test in the return value check should be replaced with IS_ERR(). dpatch engine is used to auto generated this patch. (https://github.com/weiyj/dpatch) Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: ux500: Update sdmmc clock to 100MHz for u8500Ulf Hansson2012-10-291-2/+3
| | | | | | | | | | | | | | | | | | For u8500 and using 100MHz as the frequency also requires the ape opp 100 voltage, thus use the prcmu_opp_volt_scalable clock type. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: ux500: Support prcmu ape opp voltage clockUlf Hansson2012-10-292-0/+61
| | | | | | | | | | | | | | | | | | | | Some scalable prcmu clocks needs to be handled in conjuction with the ape opp 100 voltage. A new prcmu clock type clk_prcmu_opp_volt_scalable is implemented to handle this. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * mfd: dbx500: Export prmcu_request_ape_opp_100_voltageUlf Hansson2012-10-293-4/+14
| | | | | | | | | | | | | | | | | | | | This function needs to be exported to let clients be able to request the ape opp 100 voltage. Cc: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: Don't return negative numbers for unsigned values with !clkStephen Boyd2012-10-292-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | Some of the helper functions return negative error codes if passed a NULL clock. This can lead to confusing behavior when the expected return value is unsigned. Fix up these accessors so that they return unsigned values (or bool in the case of is_enabled). This way we can't interpret NULL clocks as having valid and interesting values. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * clk: Fix documentation typosStephen Boyd2012-10-291-3/+3
| | | | | | | | | | | | | | Fix some minor typos in the documentation for the ops structure. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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