summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* [POWERPC] Add Freescale PCI VENDOR ID and 8641 device IDsJon Loeliger2007-07-242-2/+6
| | | | | | | | | | | Also add 8641/8641D device IDs as well. All of which already exist or have been submitted to The Linux PCI ID Repository at: http://pci-ids.ucw.cz/ CC-to: pci-ids@ucw.cz Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 85xxCDS: MPC8548 DTS cleanup.Randy Vinson2007-07-241-35/+89
| | | | | | | | | | | Added the P2P bridge present on the Arcadia base board and moved the VIA Southbridge behind the bridge to reflect its actual position in the bus organization. Added the RTC that's in the VIA Southbridge and expanded the ranges array for the SOC node to allow proper address translation of the RTC registers. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 85xxCDS: Misc 8548 PCI Corrections.Randy Vinson2007-07-241-4/+4
| | | | | | | | Setting the host bridge @8000 as primary. Also fixing a bug in setting the USB interrupt numbers. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 85xxCDS: Delay 8259 cascade hookup.Randy Vinson2007-07-241-11/+25
| | | | | | | | | | | | | The interrupts of an E100 card inserted in PCI slot 4 may be on at bootup. The resulting interrupt flood interacts with the 8259 cascade handler and prevents proper boot up. There is a quirk for the E100 that will disable the E100's interrupts but to use it, the 8259 cascade hookup must be delayed until after the quirk has run. This patch delays the 8259 cascade hookup by registering a device_initcall() which runs after the PCI quirk for the E100. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 85xxCDS: Make sure restart resets the PCI bus.Randy Vinson2007-07-231-0/+35
| | | | | | | | | | | | | The current 85xxCDS restart code fails to reset the PCI bus which can lead to odd behavior after the restart. This patch uses the VIA Super Southbridge to perform a PCI reset which will reset the entire system. NOTE: Since the VIA chip is behind a PCI-to-PCI bridge which can be disabled with a switch setting, it may not be possible to perform the PCI bus reset. In this case, the code defaults to the previous restart mechanism. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 85xxCDS: Allow 8259 cascade to share an MPIC interrupt line.Randy Vinson2007-07-232-6/+32
| | | | | | | | | | | | | | | | | | | | The Freescale MPC8555CDS and MPC8548CDS reference hardware has a legacy 8259 interrupt controller pair contained within a VIA VT82C686B Southbridge on the main carrier board. The processor complex plugs into the carrier card using a PCI slot which limits the available interrupts to the INTA-INTD PCI interrupts. The output of the 8259 cascade pair is routed through a gate array and connected to the PCI INTA interrupt line. The normal interrupt chaining hook (set_irq_chained_handler) does not allow sharing of the chained interrupt which prevents the use of PCI INTA by PCI devices. This patch allows the 8259 cascade pair to share their interrupt line with PCI devices. NOTE: The addition of the .end routine for the MPIC is not strictly necessary for this patch. It's there so this code will run from within the threaded interrupt context used by the Real Time patch. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] FSL: Add support for PCI-X controllersKumar Gala2007-07-231-1/+12
| | | | | | | | | | Some set of 85xx platforms have PCI-X controllers. The old arch/ppc code setup these controllers and we haven't moved it over to arch/powerpc. We use the PCI-X Capabilties to know if we are in PCI-X mode instead of the Global Utilities PORDEVSR. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Make sure virtual P2P bridge registers are setup on PCIe PHBKumar Gala2007-07-231-0/+14
| | | | | | | | For the Freescale PCIe PHBs Not all firmwares setup the virtual P2P bridge registers properly. Make sure they get setup based on what the struct pci_controller got from the device tree. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Provide ability to setup P2P bridge registers from struct resourceKumar Gala2007-07-232-6/+14
| | | | | | | We need the ability to set P2P bridge registers to properly setup the virtual P2P bridges that exist in PCIe controllers for some of the embedded setups. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Add basic PCI/PCI Express support for 8544DS boardRoy Zang2007-07-235-126/+662
| | | | | | | | Add basic support for the PCIe PHB and enable the ULI bridge. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Make endianess of cfg_addr for indirect pci ops runtimeKumar Gala2007-07-2312-31/+29
| | | | | | | | Make it so we do a runtime check to know if we need to write cfg_addr as big or little endian. This is needed if we want to allow 86xx support to co-exist in the same kernel as other 6xx PPCs. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Removed setup_indirect_pci_nomapKumar Gala2007-07-232-15/+4
| | | | | | | We don't use setup_indirect_pci_nomap in arch/powerpc and it appears the users that needed it from arch/ppc are now using setup_indirect_pci. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 85xx: Add quirk to ignore bogus FPGA on CDSKumar Gala2007-07-231-0/+10
| | | | | | | | | | | | The newer Arcadia boards for CDS have an FPGA that shows up on PCI however isn't a real PCI device. Add a quirk to just ignore the FPGA. This is based on the following patch from Andy & York: http://ozlabs.org/pipermail/linuxppc-dev/2007-February/032042.html Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 85xx: Added 8568 PCIe supportKumar Gala2007-07-234-114/+208
| | | | | | Added the PCIe device node to the 8568 dts and the needed quirk entries. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Fixup resources on pci_bus for PCIe PHB when no device is connectedKumar Gala2007-07-234-1/+17
| | | | | | | | | On the 85xx/86xx PCIe controllers if there is no device connected to the PHB we will still allocate a pci_bus for downstream bus of the virtual P2P bridge. However the resources allocated to the downstream bus are not correct and so we just mimic the resources from the upstream pci_bus. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Add basic PCI node for mpc8568mds boardRoy Zang2007-07-231-0/+29
| | | | | | | Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Use Freescale pci/pcie common code for 85xx boardsRoy Zang2007-07-238-104/+25
| | | | | | | | Switch the 85xx platform over to using the FSL generic PCI code. This gets ups PCIe support in addition to base PCI support. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Update PCI nodes in the 83xx/85xx boards device treeRoy Zang2007-07-2311-15/+15
| | | | | | | | | | | | | Updated the 83xx & 85xx device tree PCI related compartible property. Used the following compatible properties: PCI "fsl,mpc8349-pci" PCI "fsl,mpc8540-pci" PCI-X: "fsl,mpc8540-pcix" PCIe: "fsl,mpc8548-pcie" Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Add 8548 CDS PCI express controller node and PCI-X device nodeRoy Zang2007-07-231-51/+105
| | | | | | | | | | | | | | | Add 8548 CDS PCI express controller node and PCI-X device node. The current dts file is suitable for 8548 Rev 2.0 board with Arcadia 3.1. This kind of board combination is the most popular. Used the following compatible properties: PCI "fsl,mpc8540-pci" PCI-X: "fsl,mpc8540-pcix" PCIe: "fsl,mpc8548-pcie" Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] FSL: Cleanup how we detect if we are a PCIe controllerKumar Gala2007-07-231-9/+9
| | | | | | | | | Use the PCI capabilities to determine if we are PCIe PHB. Also use PPC_INDIRECT_TYPE_NO_PCIE_LINK since the Freescale PCIe controllers will lock the system if they don't have link and you try to do a config access to anything but the PHB. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Added indirect quirk to handle PCIe PHB that have issue w/no linkKumar Gala2007-07-232-1/+20
| | | | | | | | | Added PPC_INDIRECT_TYPE_NO_PCIE_LINK flag to the indirect pci handling code to ensure that we don't talk to any device other than the PHB if we don't have PCIe link. Some controllers will lockup if they try to do a config cycle to any device on the bus except the PHB. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Add the ability to find PCI capabilities early onKumar Gala2007-07-232-0/+10
| | | | | | | | Added early_find_capability that wraps pci_bus_find_capability and uses fake_pci_bus() to allow us to call it before we've fully setup the pci_controller. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Rewrite Freescale PCI/PCIe support for 8{3,5,6}xxZang Roy-r619112007-07-235-226/+187
| | | | | | | | Rewrite the Freescale PCI code to support PCI on 83xx/85xx/86xx and PCIe on 85xx/86xx. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Create common fsl pci/e files based on 86xx platformsRoy Zang2007-07-236-5/+9
| | | | | | | | | | | | | Move arch/powerpc/platforms/86xx/pci.c -> arch/powerpc/sysdev/fsl_pci.c arch/powerpc/sysdev/fsl_pcie.h -> arch/powerpc/sysdev/fsl_pci.h as the base to unify 83xx/85xx/86xx pci and pcie. Add CONFIG_FSL_PCI to build fsl_pci.c for Freescale pci and pcie option. The code still works for 86xx platforms. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Linux 2.6.23-rc1v2.6.23-rc1Linus Torvalds2007-07-221-2/+2
| | | | Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* x86_64: Rename CF Makefile variable in vdsoAndi Kleen2007-07-221-3/+3
| | | | | | | | | This avoids a conflict with sparse builds. Reported by Alexey Dobriyan, fix suggested by Al Viro Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* 9p: Don't use binary sysctl numbers.Eric W. Biederman2007-07-221-13/+8
| | | | | | | | | | | | | | | | | | | The recent 9p commit: bd238fb431f31989898423c8b6496bc8c4204a86 that supposedly only moved files also introduced a new 9p sysctl interface that did not properly register it's sysctl binary numbers. And since it was only for debugging clearly did not need a binary fast path in any case. So this patch just remove the binary numbers. See Documentation/sysctl/ctl_unnumbered.txt for more details. While I was at it I cleaned up the sysctl initializers a little as well so there is less to read. Cc: Latchesar Ionkov <lucho@ionkov.net> Cc: Eric Van Hensbergen <ericvh@gmail.com> Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Documentation: Fix a mispelt "probably" in SubmittingPatches.Linus Nilsson2007-07-221-1/+1
| | | | | | | Fix a typo in SubmittingPatches where "probably" was spelt "probabally". Signed-off-by: Linus Nilsson <lajnold@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* DocBook: Change a headline in kernel-locking to list all three main types of ↵Linus Nilsson2007-07-221-1/+1
| | | | | | | | | | locking. Change a headline to reflect that there are three main types of kernel locking, not two. Signed-off-by: Linus Nilsson <lajnold@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'for-linus' of ↵Linus Torvalds2007-07-2221-715/+802
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband: IB/ehca: Support small QP queues IB/ehca: Make internal_create/destroy_qp() static IB/ehca: Move ehca2ib_return_code() out of line IB/ehca: Generate async event when SRQ limit reached IB/ehca: Support large page MRs IB/mlx4: Fix error path in create_qp_common() mlx4_core: Change command token on timeout IB/mthca: Change command token on timeout IB/ipath: Remove ipath_layer dead code IB/mlx4: Fix leaks in __mlx4_ib_modify_qp
| * IB/ehca: Support small QP queuesStefan Roscher2007-07-2010-159/+378
| | | | | | | | | | | | | | | | | | | | | | eHCA2 supports QP queues that can be as small as 512 bytes. This greatly reduces memory overhead for consumers that use lots of QPs with small queues (e.g. RDMA-only QPs). Apart from dealing with firmware, this code needs to manage bite-sized chunks of kernel pages, making sure that no kernel page is shared between different protection domains. Signed-off-by: Hoang-Nam Nguyen <hnguyen@de.ibm.com>
| * IB/ehca: Make internal_create/destroy_qp() staticJoachim Fenkes2007-07-201-8/+9
| | | | | | | | | | | | | | They're only used in ehca_qp.c, so make them static to that file. Signed-off-by: Joachim Fenkes <fenkes@de.ibm.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * IB/ehca: Move ehca2ib_return_code() out of lineHoang-Nam Nguyen2007-07-202-18/+18
| | | | | | | | | | | | | | | | ehca2ib_return_code() is not used in any fast path, and making it non-inline saves ~1.5K of code. Signed-off-by: Joachim Fenkes <fenkes@de.ibm.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * IB/ehca: Generate async event when SRQ limit reachedHoang-Nam Nguyen2007-07-201-14/+28
| | | | | | | | | | Signed-off-by: Joachim Fenkes <fenkes@de.ibm.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * IB/ehca: Support large page MRsHoang-Nam Nguyen2007-07-205-63/+357
| | | | | | | | | | | | | | | | | | | | | | Add support for MR pages larger than 4K on eHCA2. This reduces firmware memory consumption. If enabled via the mr_largepage module parameter, the MR page size will be determined based on the MR length and the hardware capabilities -- if the MR is >= 16M, 16M pages are used, for example. Signed-off-by: Joachim Fenkes <fenkes@de.ibm.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * IB/mlx4: Fix error path in create_qp_common()Roland Dreier2007-07-201-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | The error handling code at err_wrid in create_qp_common() does not handle a userspace QP attached to an SRQ correctly, since it ends up in the else clause of the if statement. This means it tries to kfree() the uninitialized qp->sq.wrid and qp->rq.wrid pointers. Fix this so we only free the wrid arrays for kernel QPs. Pointed out by Michael S. Tsirkin <mst@dev.mellanox.co.il>. Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * mlx4_core: Change command token on timeoutRoland Dreier2007-07-201-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The FW command token is currently only updated on a command completion event. This means that on command timeout, the same token will be reused for new command, which results in a mess if the timed out command *does* eventually complete. This is the same change as the patch for mthca from Michael S. Tsirkin <mst@dev.mellanox.co.il> that was just merged. It seems sensible to avoid gratuitous differences in FW command processing between mthca and mlx4. Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * IB/mthca: Change command token on timeoutMichael S. Tsirkin2007-07-201-2/+1
| | | | | | | | | | | | | | | | | | | | The FW command token is currently only updated on a command completion event. This means that on command timeout, the same token will be reused for new command, which results in a mess if the timed out command *does* eventually complete. Signed-off-by: Michael S. Tsirkin <mst@dev.mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * IB/ipath: Remove ipath_layer dead codeArthur Jones2007-07-204-439/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ipath_layer.[ch] code was an attempt to provide a single interface for the ipath verbs and ipath_ether code to use. As verbs functionality increased, the layer's functionality became insufficient and the verbs code broke away to interface directly to the driver. The failed attempt to get ipath_ether upstream was the final nail in the coffin and now it sits quietly in a dark kernel.org corner waiting for someone to notice the smell and send it along to it's final resting place. Roland Dreier was that someone -- this patch expands on his work... Signed-off-by: Arthur Jones <arthur.jones@qlogic.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * IB/mlx4: Fix leaks in __mlx4_ib_modify_qpFlorin Malita2007-07-201-7/+5
| | | | | | | | | | | | | | | | | | | | | | Temporarily allocated struct mlx4_qp_context *context is leaked by several error paths. The patch takes advantage of the return value 'err' being preinitialized to -EINVAL. Spotted by Coverity (CID 1768). Signed-off-by: Florin Malita <fmalita@gmail.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
* | take declarations of enable_irq() et.al. to linux/interrupt.hAl Viro2007-07-2212-39/+11
| | | | | | | | | | | | | | | | | | | | Now that the last inlined instances are gone, all that is left to do is turning disable_irq_nosync on arm26 and m68k from defines to aliases and we are all set - we can make these externs in linux/interrupt.h uncoditional and kill remaining instances in asm/irq.h Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | Merge master.kernel.org:/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6Linus Torvalds2007-07-2273-1294/+3648
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6: (60 commits) [SCSI] libsas: make ATA functions selectable by a config option [SCSI] bsg: unexport sg v3 helper functions [SCSI] bsg: fix bsg_unregister_queue [SCSI] bsg: make class backlinks [SCSI] 3w-9xxx: add support for 9690SA [SCSI] bsg: fix bsg_register_queue error path [SCSI] ESP: Increase ESP_BUS_TIMEOUT to 275. [SCSI] libsas: fix scr_read/write users and update the libata documentation [SCSI] mpt fusion: update Kconfig help [SCSI] scsi_transport_sas: add destructor for bsg [SCSI] iscsi_tcp: buggered kmalloc() [SCSI] qla2xxx: Update version number to 8.02.00-k2. [SCSI] qla2xxx: Add ISP25XX support. [SCSI] qla2xxx: Use pci_try_set_mwi(). [SCSI] qla2xxx: Use PCI-X/PCI-Express read control interfaces. [SCSI] qla2xxx: Re-factor isp_operations to static structures. [SCSI] qla2xxx: Validate mid-layer 'underflow' during check-condition handling. [SCSI] qla2xxx: Correct setting of 'current' and 'supported' speeds during FDMI registration. [SCSI] qla2xxx: Generalize iIDMA support. [SCSI] qla2xxx: Generalize FW-Interface-2 support. ...
| * | [SCSI] libsas: make ATA functions selectable by a config optionJames Bottomley2007-07-226-397/+436
| | | | | | | | | | | | | | | | | | | | | | | | Not everyone wants libsas automatically to pull in libata. This patch makes the behaviour configurable, so you can build libsas with or without ATA support. Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * | [SCSI] bsg: unexport sg v3 helper functionsFUJITA Tomonori2007-07-222-13/+5
| | | | | | | | | | | | | | | | | | | | | | | | blk_fill_sghdr_rq, blk_unmap_sghdr_rq, and blk_complete_sghdr_rq were exported for bsg, however bsg was changed to support only sg v4. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * | [SCSI] bsg: fix bsg_unregister_queueFUJITA Tomonori2007-07-211-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | scsi_sysfs_add_sdev ignores the bsg_register_queue failure, so bsg_unregister_queue must check whether the queue has a bsg device. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * | [SCSI] bsg: make class backlinksJames Bottomley2007-07-214-21/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, bsg doesn't make class backlinks (a process whereby you'd get a link to bsg in the device directory in the same way you get one for sg). This is because the bsg device is uninitialised, so the class device has nothing it can attach to. The fix is to make the bsg device point to the cdevice of the entity creating the bsg, necessitating changing the bsg_register_queue() prototype into a form that takes the generic device. Acked-by: FUJITA Tomonori <tomof@acm.org> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * | [SCSI] 3w-9xxx: add support for 9690SAadam radford2007-07-212-27/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The attached patch updates the 3ware 9000 driver: - Fix dma mask setting to fallback to 32-bit if 64-bit fails. - Add support for 9690SA controllers. Signed-off-by: Adam Radford <linuxraid@amcc.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * | [SCSI] bsg: fix bsg_register_queue error pathJames Bottomley2007-07-211-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | unfortunately, if IS_ERR(class_dev) is true, that means class_dev isn't null and the check in the error leg is pointless ... it's also asking for trouble to request unregistration of a device we haven't actually created (although it works currently). Fix by using explicit gotos and unregisters. Acked-by: FUJITA Tomonori <tomof@acm.org> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * | [SCSI] ESP: Increase ESP_BUS_TIMEOUT to 275.David Miller2007-07-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This matches the original driver's value and seems to be necessary for some disks on sun4c systems. Reported by Mark Fortescue <mark@mtfhpc.demon.co.uk> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| * | [SCSI] libsas: fix scr_read/write users and update the libata documentationJames Bottomley2007-07-202-10/+19
| | | | | | | | | | | | | | | | | | | | | | | | This fixes up the usage in libsas (which are easy to miss, since they're only in the scsi-misc tree) ... and also corrects the documentation on the point of what these two function pointers actually return. Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
OpenPOWER on IntegriCloud