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* acpiphp: stop bus device before acpi_bus_trimSatoru Takeuchi2006-09-261-0/+3
| | | | | | | | | | | | | | | | | | | Contrary to PCI bridge hot-add, we need to follow the sequence below for PCI bridge hot-removal. (1) Stop devices (detach drivers, remove from the global list, etc.) (2) Unbind ACPI node from the devices (remove the _PRT entries) (3) Remove devices (remove from the device list, etc.) This patch fixes acpiphp driver to follow above sequence for P2P bridge hot-removal. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: add pci_stop_bus_deviceSatoru Takeuchi2006-09-262-1/+37
| | | | | | | | | | | | | | This patch adds pci_stop_bus_device() which stops a PCI device (detach the driver, remove from the global list and so on) and any children. This is needed for ACPI based PCI-to-PCI bridge hot-remove, and it will be also needed for ACPI based PCI root bridge hot-remove. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* acpiphp: do not initialize existing ioapicsSatoru Takeuchi2006-09-261-1/+3
| | | | | | | | | | | | | | Currently acpiphp initializes all ioapics under the bus on which hot-add event occured. It also initializes already working ioapics. This patch fixes this bug. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* acpiphp: initialize ioapics before starting devicesSatoru Takeuchi2006-09-261-1/+1
| | | | | | | | | | | | | | Currently acpiphp initializes ioapics after starting devices, but ioapics should be initialized before starting devices. This patch fixes this bug. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* acpiphp: set hpp values before starting devicesSatoru Takeuchi2006-09-261-1/+1
| | | | | | | | | | | | | | Currently acpiphp sets hpp values after starting devices, but the values should be set before starting devices. This patch fixes this bug. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI Hotplug: cleanup pcihp skeleton code.Satoru Takeuchi2006-09-261-6/+3
| | | | | | | | | | Cleanup pcihp skeleton code. Fix some typos and remove some unnecessary blank lines. Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: Restore PCI Express capability registers after PM eventMichael S. Tsirkin2006-09-261-0/+50
| | | | | | | | | Restore PCI Express capability registers after PM event. This includes maxumum MTU for PCI express and other vital data. Signed-off-by: Michael S. Tsirkin <mst@mellanox.co.il> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: drivers/pci/hotplug/acpiphp_glue.c: make a function staticAdrian Bunk2006-09-261-1/+1
| | | | | | | | Signed-off-by: Adrian Bunk <bunk@stusta.de> Acked-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: Multiprobe sanitizerAlan Cox2006-09-262-1/+7
| | | | | | | | | | | | | | | | | | | | | | There are numerous drivers that can use multithreaded probing but having some kind of global flag as the way to control this makes migration to threaded probing hard and since it enables it everywhere and is almost as likely to cause serious pain as holding a clog dance in a minefield. If we have a pci_driver multithread_probe flag to inherit you can turn it on for one driver at a time. From playing so far however I think we need a different model at the device layer which serializes until the called probe function says "ok you can start another one now". That would need some kind of flag and semaphore plus a helper function. Anyway in the absence of that this is a starting point to usefully play with this stuff Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: fix __must_check warningsGreg Kroah-Hartman2006-09-269-62/+138
| | | | | Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI Hotplug: fix __must_check warningsGreg Kroah-Hartman2006-09-262-33/+128
| | | | | Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* SHPCHP: fix __must_check warningsGreg Kroah-Hartman2006-09-263-4/+8
| | | | | | Cc: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI-Express AER implemetation: pcie_portdrv error handlerZhang, Yanmin2006-09-261-21/+175
| | | | | | | | Patch 4 implements error handlers for pcie_portdrv. Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI-Express AER implemetation: AER core and aerdriverZhang, Yanmin2006-09-2611-0/+1598
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch 3 implements the core part of PCI-Express AER and aerdrv port service driver. When a root port service device is probed, the aerdrv will call request_irq to register irq handler for AER error interrupt. When a device sends an PCI-Express error message to the root port, the root port will trigger an interrupt, by either MSI or IO-APIC, then kernel would run the irq handler. The handler collects root error status register and schedules a work. The work will call the core part to process the error based on its type (Correctable/non-fatal/fatal). As for Correctable errors, the patch chooses to just clear the correctable error status register of the device. As for the non-fatal error, the patch follows generic PCI error handler rules to call the error callback functions of the endpoint's driver. If the device is a bridge, the patch chooses to broadcast the error to downstream devices. As for the fatal error, the patch resets the pci-express link and follows generic PCI error handler rules to call the error callback functions of the endpoint's driver. If the device is a bridge, the patch chooses to broadcast the error to downstream devices. Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI-Express AER implemetation: export pcie_port_bus_typeZhang, Yanmin2006-09-261-0/+1
| | | | | | | | Patch 2 exports pcie_port_bus_type. Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI-Express AER implemetation: aer howto documentZhang, Yanmin2006-09-261-0/+253
| | | | | | | | | | | | | | | | PCI-Express AER (Advanced Error Reporting) provides more robust error reporting. The series of patches enable kernel support to AER. The initial patches were written by Tom Long Nguyen. I ported them to the kernel 2.6.18-rc3. Many thanks to Rajesh Shah and Narayanan Chandramouli for their great review comments and testing help. Patch 1 consists of the pciaer-howto.txt document. Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCIE: check and return bus_register errorsRandy Dunlap2006-09-263-5/+11
| | | | | | | | | Have pcie_port_bus_register() notice and return errors. Mark it __must_check so that its caller(s) must check its return value. Signed-off-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* MSI: Blacklist PCI-E chipsets depending on Hypertransport MSI capabilityBrice Goglin2006-09-262-0/+60
| | | | | | | | | | | | | | Introduce msi_ht_cap_enabled() to check the MSI capability in the Hypertransport configuration space. It is used in a generic quirk quirk_msi_ht_cap() to check whether MSI is enabled on hypertransport chipset, and a nVidia specific quirk quirk_nvidia_ck804_msi_ht_cap() where two 2 HT MSI mappings have to be checked. Both quirks set the PCI_BUS_FLAGS_NO_MSI bus flag when MSI is disabled. Signed-off-by: Brice Goglin <brice@myri.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* MSI: Rename PCI_CAP_ID_HT_IRQCONF into PCI_CAP_ID_HTBrice Goglin2006-09-263-5/+4
| | | | | | | | | | | | | 0x08 is the HT capability, while PCI_CAP_ID_HT_IRQCONF would be the subtype 0x80 that mpic_scan_ht_pic() uses. Rename PCI_CAP_ID_HT_IRQCONF into PCI_CAP_ID_HT. And by the way, use it in the ipath driver instead of defining its own HT_CAPABILITY_ID. Signed-off-by: Brice Goglin <brice@myri.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* MSI: Export the PCI_BUS_FLAGS_NO_MSI flag in sysfsBrice Goglin2006-09-261-0/+41
| | | | | | | | | | | | | | | | | | | | Export the PCI_BUS_FLAGS_NO_MSI flag of a PCI bus in the sysfs files of its parent device and make it writable. Could be used to: * disable MSI on a device which has not been blacklisted yet * allow MSI when some setpci hacks enable MSI support (for instance on the ServerWorks HT2000 chipset where the MSI HT cap is disabled by default). Architecture where some bus have no parent chipset cannot use this strategy to change MSI support. If the chipset does not have a subordinate bus, its 'bus_msi' file is empty. Also document and warn about the possible danger of changing the flag. Signed-off-by: Brice Goglin <brice@myri.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* MSI: Factorize common code in pci_msi_supported()Brice Goglin2006-09-261-20/+31
| | | | | | | | | | | | pci_enable_msi() and pci_enable_msix() use the same code to detect whether MSI might be enabled on this device. Factorize this code in pci_msi_supported(). And improve the documentation about the fact that only the root chipset must support MSI, but it is hard to find the root bus so we check all parent busses MSI flags. Signed-off-by: Brice Goglin <brice@myri.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* MSI: Cleanup existing MSI quirksBrice Goglin2006-09-262-16/+31
| | | | | | | | | | Move MSI quirks in CONFIG_PCI_MSI, document why the serverworks quirk does not simply set PCI_BUS_FLAGS_NO_MSI, and create a generic quirk for other chipsets where setting PCI_BUS_FLAGS_NO_MSI is fine. Signed-off-by: Brice Goglin <brice@myri.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* Resources: insert identical resources above existing resourcesMatthew Wilcox2006-09-261-16/+16
| | | | | | | | | | | | | | | | | If you have two resources which aree exactly the same size, insert_resource() currently inserts the new one below the existing one. This is wrong because there's no way to insert a resource of the same size above an existing one. I took this opportunity to rewrite the initial loop to be a for-loop instead of a goto-loop and fix the documentation. Signed-off-by: Matthew Wilcox <matthew@wil.cx> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* Merge branch 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6Linus Torvalds2006-09-26250-5288/+6891
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6: (225 commits) [PATCH] Don't set calgary iommu as default y [PATCH] i386/x86-64: New Intel feature flags [PATCH] x86: Add a cumulative thermal throttle event counter. [PATCH] i386: Make the jiffies compares use the 64bit safe macros. [PATCH] x86: Refactor thermal throttle processing [PATCH] Add 64bit jiffies compares (for use with get_jiffies_64) [PATCH] Fix unwinder warning in traps.c [PATCH] x86: Allow disabling early pci scans with pci=noearly or disallowing conf1 [PATCH] x86: Move direct PCI scanning functions out of line [PATCH] i386/x86-64: Make all early PCI scans dependent on CONFIG_PCI [PATCH] Don't leak NT bit into next task [PATCH] i386/x86-64: Work around gcc bug with noreturn functions in unwinder [PATCH] Fix some broken white space in ia32_signal.c [PATCH] Initialize argument registers for 32bit signal handlers. [PATCH] Remove all traces of signal number conversion [PATCH] Don't synchronize time reading on single core AMD systems [PATCH] Remove outdated comment in x86-64 mmconfig code [PATCH] Use string instructions for Core2 copy/clear [PATCH] x86: - restore i8259A eoi status on resume [PATCH] i386: Split multi-line printk in oops output. ...
| * [PATCH] Don't set calgary iommu as default yAndi Kleen2006-09-261-1/+0
| | | | | | | | | | | | Most systems don't need it. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] i386/x86-64: New Intel feature flagsDave Jones2006-09-262-4/+4
| | | | | | | | | | | | | | | | | | | | | | Add supplemental SSE3 instructions flag, and Direct Cache Access flag. As described in "Intel Processor idenfication and the CPUID instruction AP485 Sept 2006" AK: also added for x86-64 Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] x86: Add a cumulative thermal throttle event counter.Dmitriy Zavin2006-09-264-6/+136
| | | | | | | | | | | | | | | | | | | | | | | | The counter is exported to /sys that keeps track of the number of thermal events, such that the user knows how bad the thermal problem might be (since the logging to syslog and mcelog is rate limited). AK: Fixed cpu hotplug locking Signed-off-by: Dmitriy Zavin <dmitriyz@google.com> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] i386: Make the jiffies compares use the 64bit safe macros.Dmitriy Zavin2006-09-261-3/+4
| | | | | | | | | | Signed-off-by: Dmitriy Zavin <dmitriyz@google.com> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] x86: Refactor thermal throttle processingDmitriy Zavin2006-09-269-41/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor the event processing (syslog messaging and rate limiting) into separate file therm_throt.c. This allows consistent reporting of CPU thermal throttle events. After ACK'ing the interrupt, if the event is current, the user (p4.c/mce_intel.c) calls therm_throt_process to log (and rate limit) the event. If that function returns 1, the user has the option to log things further (such as to mce_log in x86_64). AK: minor cleanup Signed-off-by: Dmitriy Zavin <dmitriyz@google.com> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Add 64bit jiffies compares (for use with get_jiffies_64)Dmitriy Zavin2006-09-261-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The current time_before/time_after macros will fail typechecks when passed u64 values (as returned by get_jiffies_64()). On 64bit systems, this will just result in a warning about mismatching types without explicit casts, but since unsigned long and u64 (unsigned long long) are of same size, it will still work. On 32bit systems, a long is 32bits, so the value from get_jiffies_64() will be truncated by the cast and thus lose all the precision gained by 64bit jiffies. Signed-off-by: Dmitriy Zavin <dmitriyz@google.com> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Fix unwinder warning in traps.cAndi Kleen2006-09-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Fix linux/arch/x86_64/kernel/traps.c: In function 'dump_trace': linux/arch/x86_64/kernel/traps.c:275: warning: cast to pointer from integer of different size with allnoconfig Cc: jbeulich@novell.com Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] x86: Allow disabling early pci scans with pci=noearly or disallowing ↵Andi Kleen2006-09-2612-6/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | conf1 Some buggy systems can machine check when config space accesses happen for some non existent devices. i386/x86-64 do some early device scans that might trigger this. Allow pci=noearly to disable this. Also when type 1 is disabling also don't do any early accesses which are always type1. This moves the pci= configuration parsing to be a early parameter. I don't think this can break anything because it only changes a single global that is only used by PCI. Cc: gregkh@suse.de Cc: Trammell Hudson <hudson@osresearch.net> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] x86: Move direct PCI scanning functions out of lineAndi Kleen2006-09-264-40/+51
| | | | | | | | | | | | Saves about 200 bytes of code space. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] i386/x86-64: Make all early PCI scans dependent on CONFIG_PCIAndi Kleen2006-09-265-2/+10
| | | | | | | | | | | | | | | | | | | | | | This is useful on systems with broken PCI bus. Affects various scans in x86-64 and i386's early ACPI quirk scan. Cc: gregkh@suse.de Cc: len.brown@intel.com Cc: Trammell Hudson <hudson@osresearch.net> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Don't leak NT bit into next taskAndi Kleen2006-09-263-2/+11
| | | | | | | | | | | | | | | | | | SYSENTER can cause a NT to be set which might cause crashes on the IRET in the next task. Following similar i386 patch from Linus. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] i386/x86-64: Work around gcc bug with noreturn functions in unwinderJan Beulich2006-09-2611-9/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current gcc generates calls not jumps to noreturn functions. When that happens the return address can point to the next function, which confuses the unwinder. This patch works around it by marking asynchronous exception frames in contrast normal call frames in the unwind information. Then teach the unwinder to decode this. For normal call frames the unwinder now subtracts one from the address which avoids this problem. The standard libgcc unwinder uses the same trick. It doesn't include adjustment of the printed address (i.e. for the original example, it'd still be kernel_math_error+0 that gets displayed, but the unwinder wouldn't get confused anymore. This only works with binutils 2.6.17+ and some versions of H.J.Lu's 2.6.16 unfortunately because earlier binutils don't support .cfi_signal_frame [AK: added automatic detection of the new binutils and wrote description] Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Fix some broken white space in ia32_signal.cAndi Kleen2006-09-261-5/+5
| | | | | | | | | | No functional changes Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Initialize argument registers for 32bit signal handlers.Andi Kleen2006-09-261-0/+5
| | | | | | | | | | | | | | In case the user space was compiled with -mregparm=3 Following i386. Pointed out by Albert Cahalan Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Remove all traces of signal number conversionAndi Kleen2006-09-262-14/+1
| | | | | | | | | | | | | | This was old code that was needed for iBCS and x86-64 never supported that. Pointed out by Albert Cahalan Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Don't synchronize time reading on single core AMD systemsAndi Kleen2006-09-261-0/+6
| | | | | | | | | | | | | | | | We do some additional CPU synchronization in gettimeofday et.al. to make sure the time stamps are always monotonic over multiple CPUs. But on single core systems that is not needed. So don't do it. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Remove outdated comment in x86-64 mmconfig codeAndi Kleen2006-09-261-1/+0
| | | | | | | | | | Cc: gregkh@suse.de Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Use string instructions for Core2 copy/clearAndi Kleen2006-09-261-0/+2
| | | | | | | | | | | | | | It is faster than using a unrolled loop for the use cases the kernel cares about (cached, sizes typically < 4K) Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] x86: - restore i8259A eoi status on resumeMatthew Garrett2006-09-262-2/+10
| | | | | | | | | | | | | | | | | | Got it. i8259A_resume calls init_8259A(0) unconditionally, even if auto_eoi has been set. Keep track of the current status and restore that on resume. This fixes it for AMD64 and i386. Signed-off-by: Matthew Garrett <mjg59@srcf.ucam.org> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] i386: Split multi-line printk in oops output.Dave Jones2006-09-261-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes, bug reports come in where we've had an oops, and the only record we have is what the reporter saw on screen shortly before the system locked up completely. Unfortunatly, syslog only prints lines beginning with KERN_EMERG to the console, so some lines get lost. An example of this can be seen at https://bugzilla.redhat.com/bugzilla/show_bug.cgi?id=203723 Some of this information isn't vital to diagnosis, but some parts are useful, such as the tainted flag. Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] i386: Fix pack_descriptor()Jeremy Fitzhardinge2006-09-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix pack_descriptor: 1. flags are bits 20-23 in the high word 2. limit's 4 msb are bits 16-19 in the high word These haven't mattered so far, because all users have had small limits and a flags setting of 0. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Andi Kleen <ak@suse.de> ===================================================================
| * [PATCH] i386: Add MMCFG resources to i386 tooAndi Kleen2006-09-261-0/+35
| | | | | | | | | | | | | | | | Following earlier x86-64 patch Cc: gregkh@suse.de Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] MMCONFIG and new Intel motherboardsAaron Durbin2006-09-261-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Sat, Sep 09, 2006 at 04:14:29PM +0200, Andi Kleen wrote: > [patch] Looks reasonable, but probably not for 2.6.18 because this stuff > is already too fragile and it is probably too risky to do any big changes now > since not enough testing time is left. Can you please resubmit > it with proper description and signed-off-by line? I can queue it for .19 then > > -Andi Patch inserts PCI memory mapped config region(s) into the resource map. This will allow for the MMCCONFIG regions to be marked as busy in the iomem address space as well as the regions(s) showing up in /proc/iomem. Signed-off-by: Aaron Durbin <adurbin@google.com> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Insert GART region into resource mapAaron Durbin2006-09-261-1/+20
| | | | | | | | | | | | | | | | | | Patch inserts the GART region into the iomem resource map. The GART will then be visible within /proc/iomem. It will also allow for other users utilizing the GART to subreserve the region (agp or IOMMU). Signed-off-by: Aaron Durbin <adurbin@google.com> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] i386/x86-64: Only do MCFG e820 check when type 1 worksAndi Kleen2006-09-262-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Needs earlier patch to split type 1 probing from use. This patch should fix the x86 macs where type 1 PCI config space access doesn't work, but MCFG does. They also don't have a usable e820 table so the e820 sanity check failed. Instead assume now that if type 1 doesn't work then MCFG must work and don't do the e820 check. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] i386/x86-64: PCI: split probing and initialization of type 1 config ↵Andi Kleen2006-09-265-15/+29
| | | | | | | | | | | | | | | | | | | | space access First probe if type1/2 accesses work, but then only initialize them at the end. This is useful for a later patch that needs this information inbetween. Signed-off-by: Andi Kleen <ak@suse.de>
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