diff options
Diffstat (limited to 'include')
80 files changed, 760 insertions, 1025 deletions
diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h index 1e891f860ef3..2ab4078334bf 100644 --- a/include/asm-arm/unistd.h +++ b/include/asm-arm/unistd.h @@ -377,6 +377,7 @@ #endif #ifdef __KERNEL__ +#include <linux/err.h> #include <linux/linkage.h> #define __sys2(x) #x @@ -396,7 +397,7 @@ #define __syscall_return(type, res) \ do { \ - if ((unsigned long)(res) >= (unsigned long)(-129)) { \ + if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \ errno = -(res); \ res = -1; \ } \ diff --git a/include/asm-arm26/unistd.h b/include/asm-arm26/unistd.h index 70eb6d91cfd0..c6d2436c9d34 100644 --- a/include/asm-arm26/unistd.h +++ b/include/asm-arm26/unistd.h @@ -311,6 +311,7 @@ #define __ARM_NR_usr26 (__ARM_NR_BASE+3) #ifdef __KERNEL__ +#include <linux/err.h> #include <linux/linkage.h> #define __sys2(x) #x @@ -322,7 +323,7 @@ #define __syscall_return(type, res) \ do { \ - if ((unsigned long)(res) >= (unsigned long)(-125)) { \ + if ((unsigned long)(res) >= (unsigned long)-MAX_ERRNO) { \ errno = -(res); \ res = -1; \ } \ diff --git a/include/asm-frv/unistd.h b/include/asm-frv/unistd.h index b80dbd839475..d104d1b91d39 100644 --- a/include/asm-frv/unistd.h +++ b/include/asm-frv/unistd.h @@ -320,6 +320,7 @@ #ifdef __KERNEL__ #define NR_syscalls 310 +#include <linux/err.h> /* * process the return value of a syscall, consigning it to one of two possible fates @@ -329,7 +330,7 @@ #define __syscall_return(type, res) \ do { \ unsigned long __sr2 = (res); \ - if (__builtin_expect(__sr2 >= (unsigned long)(-4095), 0)) { \ + if (__builtin_expect(__sr2 >= (unsigned long)(-MAX_ERRNO), 0)) { \ errno = (-__sr2); \ __sr2 = ~0UL; \ } \ diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h index 253ae1328271..69240b52f8e1 100644 --- a/include/asm-generic/vmlinux.lds.h +++ b/include/asm-generic/vmlinux.lds.h @@ -118,15 +118,15 @@ __ksymtab_strings : AT(ADDR(__ksymtab_strings) - LOAD_OFFSET) { \ *(__ksymtab_strings) \ } \ - __end_rodata = .; \ - . = ALIGN(4096); \ \ /* Built-in module parameters. */ \ __param : AT(ADDR(__param) - LOAD_OFFSET) { \ VMLINUX_SYMBOL(__start___param) = .; \ *(__param) \ VMLINUX_SYMBOL(__stop___param) = .; \ - } + } \ + __end_rodata = .; \ + . = ALIGN(4096); #define SECURITY_INIT \ .security_initcall.init : AT(ADDR(.security_initcall.init) - LOAD_OFFSET) { \ diff --git a/include/asm-h8300/unistd.h b/include/asm-h8300/unistd.h index 226dd596c2da..a2dd90462d80 100644 --- a/include/asm-h8300/unistd.h +++ b/include/asm-h8300/unistd.h @@ -295,14 +295,14 @@ #ifdef __KERNEL__ #define NR_syscalls 289 +#include <linux/err.h> - -/* user-visible error numbers are in the range -1 - -122: see +/* user-visible error numbers are in the range -1 - -MAX_ERRNO: see <asm-m68k/errno.h> */ #define __syscall_return(type, res) \ do { \ - if ((unsigned long)(res) >= (unsigned long)(-125)) { \ + if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \ /* avoid using res which is declared to be in register d0; \ errno might expand to a function call and clobber it. */ \ int __err = -(res); \ diff --git a/include/asm-i386/unistd.h b/include/asm-i386/unistd.h index 565d0897b205..bd9987087adc 100644 --- a/include/asm-i386/unistd.h +++ b/include/asm-i386/unistd.h @@ -328,14 +328,15 @@ #ifdef __KERNEL__ #define NR_syscalls 319 +#include <linux/err.h> /* - * user-visible error numbers are in the range -1 - -128: see + * user-visible error numbers are in the range -1 - -MAX_ERRNO: see * <asm-i386/errno.h> */ #define __syscall_return(type, res) \ do { \ - if ((unsigned long)(res) >= (unsigned long)(-(128 + 1))) { \ + if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \ errno = -(res); \ res = -1; \ } \ diff --git a/include/asm-ia64/meminit.h b/include/asm-ia64/meminit.h index 6a33a07b3f1d..c3b1f862e6e7 100644 --- a/include/asm-ia64/meminit.h +++ b/include/asm-ia64/meminit.h @@ -55,6 +55,7 @@ extern void efi_memmap_init(unsigned long *, unsigned long *); extern unsigned long vmalloc_end; extern struct page *vmem_map; extern int find_largest_hole (u64 start, u64 end, void *arg); + extern int register_active_ranges (u64 start, u64 end, void *arg); extern int create_mem_map_page_table (u64 start, u64 end, void *arg); extern int vmemmap_find_next_valid_pfn(int, int); #else diff --git a/include/asm-ia64/numa.h b/include/asm-ia64/numa.h index e0a1d173e42d..7d5e2ccc37a0 100644 --- a/include/asm-ia64/numa.h +++ b/include/asm-ia64/numa.h @@ -69,6 +69,8 @@ extern void unmap_cpu_from_node(int cpu, int nid); #else /* !CONFIG_NUMA */ +#define map_cpu_to_node(cpu, nid) do{}while(0) +#define unmap_cpu_from_node(cpu, nid) do{}while(0) #define paddr_to_nid(addr) 0 diff --git a/include/asm-m32r/spinlock.h b/include/asm-m32r/spinlock.h index f94c1a673569..f9f90727a4a1 100644 --- a/include/asm-m32r/spinlock.h +++ b/include/asm-m32r/spinlock.h @@ -298,7 +298,14 @@ static inline void __raw_write_unlock(raw_rwlock_t *rw) ); } -#define __raw_read_trylock(lock) generic__raw_read_trylock(lock) +static inline int __raw_read_trylock(raw_rwlock_t *lock) +{ + atomic_t *count = (atomic_t*)lock; + if (atomic_dec_return(count) >= 0) + return 1; + atomic_inc(count); + return 0; +} static inline int __raw_write_trylock(raw_rwlock_t *lock) { diff --git a/include/asm-m32r/system.h b/include/asm-m32r/system.h index 9e618afec6ed..4ce0619f6989 100644 --- a/include/asm-m32r/system.h +++ b/include/asm-m32r/system.h @@ -328,15 +328,15 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) #define smp_rmb() rmb() #define smp_wmb() wmb() #define smp_read_barrier_depends() read_barrier_depends() +#define set_mb(var, value) do { (void) xchg(&var, value); } while (0) #else #define smp_mb() barrier() #define smp_rmb() barrier() #define smp_wmb() barrier() #define smp_read_barrier_depends() do { } while (0) +#define set_mb(var, value) do { var = value; barrier(); } while (0) #endif -#define set_mb(var, value) do { xchg(&var, value); } while (0) - #define arch_align_stack(x) (x) #endif /* _ASM_M32R_SYSTEM_H */ diff --git a/include/asm-m32r/unistd.h b/include/asm-m32r/unistd.h index 89f376e6229f..5c6a9ac6cf1a 100644 --- a/include/asm-m32r/unistd.h +++ b/include/asm-m32r/unistd.h @@ -296,8 +296,9 @@ #ifdef __KERNEL__ #define NR_syscalls 285 +#include <linux/err.h> -/* user-visible error numbers are in the range -1 - -124: see +/* user-visible error numbers are in the range -1 - -MAX_ERRNO: see * <asm-m32r/errno.h> */ @@ -305,7 +306,7 @@ #define __syscall_return(type, res) \ do { \ - if ((unsigned long)(res) >= (unsigned long)(-(124 + 1))) { \ + if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \ /* Avoid using "res" which is declared to be in register r0; \ errno might expand to a function call and clobber it. */ \ int __err = -(res); \ diff --git a/include/asm-m68k/unistd.h b/include/asm-m68k/unistd.h index 7c0b6296b45c..751632b904db 100644 --- a/include/asm-m68k/unistd.h +++ b/include/asm-m68k/unistd.h @@ -288,13 +288,14 @@ #ifdef __KERNEL__ #define NR_syscalls 282 +#include <linux/err.h> -/* user-visible error numbers are in the range -1 - -124: see +/* user-visible error numbers are in the range -1 - -MAX_ERRNO: see <asm-m68k/errno.h> */ #define __syscall_return(type, res) \ do { \ - if ((unsigned long)(res) >= (unsigned long)(-125)) { \ + if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \ /* avoid using res which is declared to be in register d0; \ errno might expand to a function call and clobber it. */ \ int __err = -(res); \ diff --git a/include/asm-m68knommu/unistd.h b/include/asm-m68knommu/unistd.h index 1b2abdf281e1..21fdc37c5c2c 100644 --- a/include/asm-m68knommu/unistd.h +++ b/include/asm-m68knommu/unistd.h @@ -289,13 +289,14 @@ #ifdef __KERNEL__ #define NR_syscalls 282 +#include <linux/err.h> -/* user-visible error numbers are in the range -1 - -122: see +/* user-visible error numbers are in the range -1 - -MAX_ERRNO: see <asm-m68k/errno.h> */ #define __syscall_return(type, res) \ do { \ - if ((unsigned long)(res) >= (unsigned long)(-125)) { \ + if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \ /* avoid using res which is declared to be in register d0; \ errno might expand to a function call and clobber it. */ \ int __err = -(res); \ diff --git a/include/asm-mips/Kbuild b/include/asm-mips/Kbuild index c68e1680da01..7897f05e3165 100644 --- a/include/asm-mips/Kbuild +++ b/include/asm-mips/Kbuild @@ -1 +1,3 @@ include include/asm-generic/Kbuild.asm + +header-y += cachectl.h sgidefs.h sysmips.h diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h index 3b745e76f429..78c35ec46362 100644 --- a/include/asm-mips/bootinfo.h +++ b/include/asm-mips/bootinfo.h @@ -112,8 +112,7 @@ * Valid machtype for group GALILEO */ #define MACH_GROUP_GALILEO 11 /* Galileo Eval Boards */ -#define MACH_EV96100 0 /* EV96100 */ -#define MACH_EV64120A 1 /* EV64120A */ +#define MACH_EV64120A 0 /* EV64120A */ /* * Valid machtype for group MOMENCO diff --git a/include/asm-mips/cacheflush.h b/include/asm-mips/cacheflush.h index 47bc8f6c20d2..36416fdfcf68 100644 --- a/include/asm-mips/cacheflush.h +++ b/include/asm-mips/cacheflush.h @@ -21,7 +21,6 @@ * - flush_cache_range(vma, start, end) flushes a range of pages * - flush_icache_range(start, end) flush a range of instructions * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache - * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache * * MIPS specific flush operations: * @@ -39,7 +38,7 @@ extern void __flush_dcache_page(struct page *page); static inline void flush_dcache_page(struct page *page) { - if (cpu_has_dc_aliases) + if (cpu_has_dc_aliases || !cpu_has_ic_fills_f_dc) __flush_dcache_page(page); } @@ -47,8 +46,13 @@ static inline void flush_dcache_page(struct page *page) #define flush_dcache_mmap_lock(mapping) do { } while (0) #define flush_dcache_mmap_unlock(mapping) do { } while (0) -extern void (*flush_icache_page)(struct vm_area_struct *vma, +extern void (*__flush_icache_page)(struct vm_area_struct *vma, struct page *page); +static inline void flush_icache_page(struct vm_area_struct *vma, + struct page *page) +{ +} + extern void (*flush_icache_range)(unsigned long start, unsigned long end); #define flush_cache_vmap(start, end) flush_cache_all() #define flush_cache_vunmap(start, end) flush_cache_all() @@ -60,7 +64,7 @@ static inline void copy_to_user_page(struct vm_area_struct *vma, if (cpu_has_dc_aliases) flush_cache_page(vma, vaddr, page_to_pfn(page)); memcpy(dst, src, len); - flush_icache_page(vma, page); + __flush_icache_page(vma, page); } static inline void copy_from_user_page(struct vm_area_struct *vma, diff --git a/include/asm-mips/fcntl.h b/include/asm-mips/fcntl.h index 787220e6c1fc..00a50ec1c19f 100644 --- a/include/asm-mips/fcntl.h +++ b/include/asm-mips/fcntl.h @@ -25,8 +25,6 @@ #define F_SETOWN 24 /* for sockets. */ #define F_GETOWN 23 /* for sockets. */ -#define F_SETSIG 10 /* for sockets. */ -#define F_GETSIG 11 /* for sockets. */ #ifndef __mips64 #define F_GETLK64 33 /* using 'struct flock64' */ diff --git a/include/asm-mips/galileo-boards/gt96100.h b/include/asm-mips/galileo-boards/gt96100.h deleted file mode 100644 index aabd1b629c19..000000000000 --- a/include/asm-mips/galileo-boards/gt96100.h +++ /dev/null @@ -1,427 +0,0 @@ -/* - * Copyright 2000 MontaVista Software Inc. - * Author: MontaVista Software, Inc. - * stevel@mvista.com or source@mvista.com - * - * This program is free software; you can distribute it and/or modify it - * under the terms of the GNU General Public License (Version 2) as - * published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. - * - * Register offsets of the MIPS GT96100 Advanced Communication Controller. - */ -#ifndef _GT96100_H -#define _GT96100_H - -/* - * Galileo GT96100 internal register base. - */ -#define MIPS_GT96100_BASE (KSEG1ADDR(0x14000000)) - -#define GT96100_WRITE(ofs, data) \ - *(volatile u32 *)(MIPS_GT96100_BASE+ofs) = cpu_to_le32(data) -#define GT96100_READ(ofs) \ - le32_to_cpu(*(volatile u32 *)(MIPS_GT96100_BASE+ofs)) - -#define GT96100_ETH_IO_SIZE 0x4000 - -/************************************************************************ - * Register offset addresses follow - ************************************************************************/ - -/* CPU Interface Control Registers */ -#define GT96100_CPU_INTERF_CONFIG 0x000000 - -/* Ethernet Ports */ -#define GT96100_ETH_PHY_ADDR_REG 0x080800 -#define GT96100_ETH_SMI_REG 0x080810 -/* - These are offsets to port 0 registers. Add GT96100_ETH_IO_SIZE to - get offsets to port 1 registers. -*/ -#define GT96100_ETH_PORT_CONFIG 0x084800 -#define GT96100_ETH_PORT_CONFIG_EXT 0x084808 -#define GT96100_ETH_PORT_COMM 0x084810 -#define GT96100_ETH_PORT_STATUS 0x084818 -#define GT96100_ETH_SER_PARAM 0x084820 -#define GT96100_ETH_HASH_TBL_PTR 0x084828 -#define GT96100_ETH_FLOW_CNTRL_SRC_ADDR_L 0x084830 -#define GT96100_ETH_FLOW_CNTRL_SRC_ADDR_H 0x084838 -#define GT96100_ETH_SDMA_CONFIG 0x084840 -#define GT96100_ETH_SDMA_COMM 0x084848 -#define GT96100_ETH_INT_CAUSE 0x084850 -#define GT96100_ETH_INT_MASK 0x084858 -#define GT96100_ETH_1ST_RX_DESC_PTR0 0x084880 -#define GT96100_ETH_1ST_RX_DESC_PTR1 0x084884 -#define GT96100_ETH_1ST_RX_DESC_PTR2 0x084888 -#define GT96100_ETH_1ST_RX_DESC_PTR3 0x08488C -#define GT96100_ETH_CURR_RX_DESC_PTR0 0x0848A0 -#define GT96100_ETH_CURR_RX_DESC_PTR1 0x0848A4 -#define GT96100_ETH_CURR_RX_DESC_PTR2 0x0848A8 -#define GT96100_ETH_CURR_RX_DESC_PTR3 0x0848AC -#define GT96100_ETH_CURR_TX_DESC_PTR0 0x0848E0 -#define GT96100_ETH_CURR_TX_DESC_PTR1 0x0848E4 -#define GT96100_ETH_MIB_COUNT_BASE 0x085800 - -/* SDMAs */ -#define GT96100_SDMA_GROUP_CONFIG 0x101AF0 -/* SDMA Group 0 */ -#define GT96100_SDMA_G0_CHAN0_CONFIG 0x000900 -#define GT96100_SDMA_G0_CHAN0_COMM 0x000908 -#define GT96100_SDMA_G0_CHAN0_RX_DESC_BASE 0x008900 -#define GT96100_SDMA_G0_CHAN0_CURR_RX_DESC_PTR 0x008910 -#define GT96100_SDMA_G0_CHAN0_TX_DESC_BASE 0x00C900 -#define GT96100_SDMA_G0_CHAN0_CURR_TX_DESC_PTR 0x00C910 -#define GT96100_SDMA_G0_CHAN0_1ST_TX_DESC_PTR 0x00C914 -#define GT96100_SDMA_G0_CHAN1_CONFIG 0x010900 -#define GT96100_SDMA_G0_CHAN1_COMM 0x010908 -#define GT96100_SDMA_G0_CHAN1_RX_DESC_BASE 0x018900 -#define GT96100_SDMA_G0_CHAN1_CURR_RX_DESC_PTR 0x018910 -#define GT96100_SDMA_G0_CHAN1_TX_DESC_BASE 0x01C900 -#define GT96100_SDMA_G0_CHAN1_CURR_TX_DESC_PTR 0x01C910 -#define GT96100_SDMA_G0_CHAN1_1ST_TX_DESC_PTR 0x01C914 -#define GT96100_SDMA_G0_CHAN2_CONFIG 0x020900 -#define GT96100_SDMA_G0_CHAN2_COMM 0x020908 -#define GT96100_SDMA_G0_CHAN2_RX_DESC_BASE 0x028900 -#define GT96100_SDMA_G0_CHAN2_CURR_RX_DESC_PTR 0x028910 -#define GT96100_SDMA_G0_CHAN2_TX_DESC_BASE 0x02C900 -#define GT96100_SDMA_G0_CHAN2_CURR_TX_DESC_PTR 0x02C910 -#define GT96100_SDMA_G0_CHAN2_1ST_TX_DESC_PTR 0x02C914 -#define GT96100_SDMA_G0_CHAN3_CONFIG 0x030900 -#define GT96100_SDMA_G0_CHAN3_COMM 0x030908 -#define GT96100_SDMA_G0_CHAN3_RX_DESC_BASE 0x038900 -#define GT96100_SDMA_G0_CHAN3_CURR_RX_DESC_PTR 0x038910 -#define GT96100_SDMA_G0_CHAN3_TX_DESC_BASE 0x03C900 -#define GT96100_SDMA_G0_CHAN3_CURR_TX_DESC_PTR 0x03C910 -#define GT96100_SDMA_G0_CHAN3_1ST_TX_DESC_PTR 0x03C914 -#define GT96100_SDMA_G0_CHAN4_CONFIG 0x040900 -#define GT96100_SDMA_G0_CHAN4_COMM 0x040908 -#define GT96100_SDMA_G0_CHAN4_RX_DESC_BASE 0x048900 -#define GT96100_SDMA_G0_CHAN4_CURR_RX_DESC_PTR 0x048910 -#define GT96100_SDMA_G0_CHAN4_TX_DESC_BASE 0x04C900 -#define GT96100_SDMA_G0_CHAN4_CURR_TX_DESC_PTR 0x04C910 -#define GT96100_SDMA_G0_CHAN4_1ST_TX_DESC_PTR 0x04C914 -#define GT96100_SDMA_G0_CHAN5_CONFIG 0x050900 -#define GT96100_SDMA_G0_CHAN5_COMM 0x050908 -#define GT96100_SDMA_G0_CHAN5_RX_DESC_BASE 0x058900 -#define GT96100_SDMA_G0_CHAN5_CURR_RX_DESC_PTR 0x058910 -#define GT96100_SDMA_G0_CHAN5_TX_DESC_BASE 0x05C900 -#define GT96100_SDMA_G0_CHAN5_CURR_TX_DESC_PTR 0x05C910 -#define GT96100_SDMA_G0_CHAN5_1ST_TX_DESC_PTR 0x05C914 -#define GT96100_SDMA_G0_CHAN6_CONFIG 0x060900 -#define GT96100_SDMA_G0_CHAN6_COMM 0x060908 -#define GT96100_SDMA_G0_CHAN6_RX_DESC_BASE 0x068900 -#define GT96100_SDMA_G0_CHAN6_CURR_RX_DESC_PTR 0x068910 -#define GT96100_SDMA_G0_CHAN6_TX_DESC_BASE 0x06C900 -#define GT96100_SDMA_G0_CHAN6_CURR_TX_DESC_PTR 0x06C910 -#define GT96100_SDMA_G0_CHAN6_1ST_TX_DESC_PTR 0x06C914 -#define GT96100_SDMA_G0_CHAN7_CONFIG 0x070900 -#define GT96100_SDMA_G0_CHAN7_COMM 0x070908 -#define GT96100_SDMA_G0_CHAN7_RX_DESC_BASE 0x078900 -#define GT96100_SDMA_G0_CHAN7_CURR_RX_DESC_PTR 0x078910 -#define GT96100_SDMA_G0_CHAN7_TX_DESC_BASE 0x07C900 -#define GT96100_SDMA_G0_CHAN7_CURR_TX_DESC_PTR 0x07C910 -#define GT96100_SDMA_G0_CHAN7_1ST_TX_DESC_PTR 0x07C914 -/* SDMA Group 1 */ -#define GT96100_SDMA_G1_CHAN0_CONFIG 0x100900 -#define GT96100_SDMA_G1_CHAN0_COMM 0x100908 -#define GT96100_SDMA_G1_CHAN0_RX_DESC_BASE 0x108900 -#define GT96100_SDMA_G1_CHAN0_CURR_RX_DESC_PTR 0x108910 -#define GT96100_SDMA_G1_CHAN0_TX_DESC_BASE 0x10C900 -#define GT96100_SDMA_G1_CHAN0_CURR_TX_DESC_PTR 0x10C910 -#define GT96100_SDMA_G1_CHAN0_1ST_TX_DESC_PTR 0x10C914 -#define GT96100_SDMA_G1_CHAN1_CONFIG 0x110900 -#define GT96100_SDMA_G1_CHAN1_COMM 0x110908 -#define GT96100_SDMA_G1_CHAN1_RX_DESC_BASE 0x118900 -#define GT96100_SDMA_G1_CHAN1_CURR_RX_DESC_PTR 0x118910 -#define GT96100_SDMA_G1_CHAN1_TX_DESC_BASE 0x11C900 -#define GT96100_SDMA_G1_CHAN1_CURR_TX_DESC_PTR 0x11C910 -#define GT96100_SDMA_G1_CHAN1_1ST_TX_DESC_PTR 0x11C914 -#define GT96100_SDMA_G1_CHAN2_CONFIG 0x120900 -#define GT96100_SDMA_G1_CHAN2_COMM 0x120908 -#define GT96100_SDMA_G1_CHAN2_RX_DESC_BASE 0x128900 -#define GT96100_SDMA_G1_CHAN2_CURR_RX_DESC_PTR 0x128910 -#define GT96100_SDMA_G1_CHAN2_TX_DESC_BASE 0x12C900 -#define GT96100_SDMA_G1_CHAN2_CURR_TX_DESC_PTR 0x12C910 -#define GT96100_SDMA_G1_CHAN2_1ST_TX_DESC_PTR 0x12C914 -#define GT96100_SDMA_G1_CHAN3_CONFIG 0x130900 -#define GT96100_SDMA_G1_CHAN3_COMM 0x130908 -#define GT96100_SDMA_G1_CHAN3_RX_DESC_BASE 0x138900 -#define GT96100_SDMA_G1_CHAN3_CURR_RX_DESC_PTR 0x138910 -#define GT96100_SDMA_G1_CHAN3_TX_DESC_BASE 0x13C900 -#define GT96100_SDMA_G1_CHAN3_CURR_TX_DESC_PTR 0x13C910 -#define GT96100_SDMA_G1_CHAN3_1ST_TX_DESC_PTR 0x13C914 -#define GT96100_SDMA_G1_CHAN4_CONFIG 0x140900 -#define GT96100_SDMA_G1_CHAN4_COMM 0x140908 -#define GT96100_SDMA_G1_CHAN4_RX_DESC_BASE 0x148900 -#define GT96100_SDMA_G1_CHAN4_CURR_RX_DESC_PTR 0x148910 -#define GT96100_SDMA_G1_CHAN4_TX_DESC_BASE 0x14C900 -#define GT96100_SDMA_G1_CHAN4_CURR_TX_DESC_PTR 0x14C910 -#define GT96100_SDMA_G1_CHAN4_1ST_TX_DESC_PTR 0x14C914 -#define GT96100_SDMA_G1_CHAN5_CONFIG 0x150900 -#define GT96100_SDMA_G1_CHAN5_COMM 0x150908 -#define GT96100_SDMA_G1_CHAN5_RX_DESC_BASE 0x158900 -#define GT96100_SDMA_G1_CHAN5_CURR_RX_DESC_PTR 0x158910 -#define GT96100_SDMA_G1_CHAN5_TX_DESC_BASE 0x15C900 -#define GT96100_SDMA_G1_CHAN5_CURR_TX_DESC_PTR 0x15C910 -#define GT96100_SDMA_G1_CHAN5_1ST_TX_DESC_PTR 0x15C914 -#define GT96100_SDMA_G1_CHAN6_CONFIG 0x160900 -#define GT96100_SDMA_G1_CHAN6_COMM 0x160908 -#define GT96100_SDMA_G1_CHAN6_RX_DESC_BASE 0x168900 -#define GT96100_SDMA_G1_CHAN6_CURR_RX_DESC_PTR 0x168910 -#define GT96100_SDMA_G1_CHAN6_TX_DESC_BASE 0x16C900 -#define GT96100_SDMA_G1_CHAN6_CURR_TX_DESC_PTR 0x16C910 -#define GT96100_SDMA_G1_CHAN6_1ST_TX_DESC_PTR 0x16C914 -#define GT96100_SDMA_G1_CHAN7_CONFIG 0x170900 -#define GT96100_SDMA_G1_CHAN7_COMM 0x170908 -#define GT96100_SDMA_G1_CHAN7_RX_DESC_BASE 0x178900 -#define GT96100_SDMA_G1_CHAN7_CURR_RX_DESC_PTR 0x178910 -#define GT96100_SDMA_G1_CHAN7_TX_DESC_BASE 0x17C900 -#define GT96100_SDMA_G1_CHAN7_CURR_TX_DESC_PTR 0x17C910 -#define GT96100_SDMA_G1_CHAN7_1ST_TX_DESC_PTR 0x17C914 -/* MPSCs */ -#define GT96100_MPSC0_MAIN_CONFIG_LOW 0x000A00 -#define GT96100_MPSC0_MAIN_CONFIG_HIGH 0x000A04 -#define GT96100_MPSC0_PROTOCOL_CONFIG 0x000A08 -#define GT96100_MPSC_CHAN0_REG1 0x000A0C -#define GT96100_MPSC_CHAN0_REG2 0x000A10 -#define GT96100_MPSC_CHAN0_REG3 0x000A14 -#define GT96100_MPSC_CHAN0_REG4 0x000A18 -#define GT96100_MPSC_CHAN0_REG5 0x000A1C -#define GT96100_MPSC_CHAN0_REG6 0x000A20 -#define GT96100_MPSC_CHAN0_REG7 0x000A24 -#define GT96100_MPSC_CHAN0_REG8 0x000A28 -#define GT96100_MPSC_CHAN0_REG9 0x000A2C -#define GT96100_MPSC_CHAN0_REG10 0x000A30 -#define GT96100_MPSC_CHAN0_REG11 0x000A34 -#define GT96100_MPSC1_MAIN_CONFIG_LOW 0x008A00 -#define GT96100_MPSC1_MAIN_CONFIG_HIGH 0x008A04 -#define GT96100_MPSC1_PROTOCOL_CONFIG 0x008A08 -#define GT96100_MPSC_CHAN1_REG1 0x008A0C -#define GT96100_MPSC_CHAN1_REG2 0x008A10 -#define GT96100_MPSC_CHAN1_REG3 0x008A14 -#define GT96100_MPSC_CHAN1_REG4 0x008A18 -#define GT96100_MPSC_CHAN1_REG5 0x008A1C -#define GT96100_MPSC_CHAN1_REG6 0x008A20 -#define GT96100_MPSC_CHAN1_REG7 0x008A24 -#define GT96100_MPSC_CHAN1_REG8 0x008A28 -#define GT96100_MPSC_CHAN1_REG9 0x008A2C -#define GT96100_MPSC_CHAN1_REG10 0x008A30 -#define GT96100_MPSC_CHAN1_REG11 0x008A34 -#define GT96100_MPSC2_MAIN_CONFIG_LOW 0x010A00 -#define GT96100_MPSC2_MAIN_CONFIG_HIGH 0x010A04 -#define GT96100_MPSC2_PROTOCOL_CONFIG 0x010A08 -#define GT96100_MPSC_CHAN2_REG1 0x010A0C -#define GT96100_MPSC_CHAN2_REG2 0x010A10 -#define GT96100_MPSC_CHAN2_REG3 0x010A14 -#define GT96100_MPSC_CHAN2_REG4 0x010A18 -#define GT96100_MPSC_CHAN2_REG5 0x010A1C -#define GT96100_MPSC_CHAN2_REG6 0x010A20 -#define GT96100_MPSC_CHAN2_REG7 0x010A24 -#define GT96100_MPSC_CHAN2_REG8 0x010A28 -#define GT96100_MPSC_CHAN2_REG9 0x010A2C -#define GT96100_MPSC_CHAN2_REG10 0x010A30 -#define GT96100_MPSC_CHAN2_REG11 0x010A34 -#define GT96100_MPSC3_MAIN_CONFIG_LOW 0x018A00 -#define GT96100_MPSC3_MAIN_CONFIG_HIGH 0x018A04 -#define GT96100_MPSC3_PROTOCOL_CONFIG 0x018A08 -#define GT96100_MPSC_CHAN3_REG1 0x018A0C -#define GT96100_MPSC_CHAN3_REG2 0x018A10 -#define GT96100_MPSC_CHAN3_REG3 0x018A14 -#define GT96100_MPSC_CHAN3_REG4 0x018A18 -#define GT96100_MPSC_CHAN3_REG5 0x018A1C -#define GT96100_MPSC_CHAN3_REG6 0x018A20 -#define GT96100_MPSC_CHAN3_REG7 0x018A24 -#define GT96100_MPSC_CHAN3_REG8 0x018A28 -#define GT96100_MPSC_CHAN3_REG9 0x018A2C -#define GT96100_MPSC_CHAN3_REG10 0x018A30 -#define GT96100_MPSC_CHAN3_REG11 0x018A34 -#define GT96100_MPSC4_MAIN_CONFIG_LOW 0x020A00 -#define GT96100_MPSC4_MAIN_CONFIG_HIGH 0x020A04 -#define GT96100_MPSC4_PROTOCOL_CONFIG 0x020A08 -#define GT96100_MPSC_CHAN4_REG1 0x020A0C -#define GT96100_MPSC_CHAN4_REG2 0x020A10 -#define GT96100_MPSC_CHAN4_REG3 0x020A14 -#define GT96100_MPSC_CHAN4_REG4 0x020A18 -#define GT96100_MPSC_CHAN4_REG5 0x020A1C -#define GT96100_MPSC_CHAN4_REG6 0x020A20 -#define GT96100_MPSC_CHAN4_REG7 0x020A24 -#define GT96100_MPSC_CHAN4_REG8 0x020A28 -#define GT96100_MPSC_CHAN4_REG9 0x020A2C -#define GT96100_MPSC_CHAN4_REG10 0x020A30 -#define GT96100_MPSC_CHAN4_REG11 0x020A34 -#define GT96100_MPSC5_MAIN_CONFIG_LOW 0x028A00 -#define GT96100_MPSC5_MAIN_CONFIG_HIGH 0x028A04 -#define GT96100_MPSC5_PROTOCOL_CONFIG 0x028A08 -#define GT96100_MPSC_CHAN5_REG1 0x028A0C -#define GT96100_MPSC_CHAN5_REG2 0x028A10 -#define GT96100_MPSC_CHAN5_REG3 0x028A14 -#define GT96100_MPSC_CHAN5_REG4 0x028A18 -#define GT96100_MPSC_CHAN5_REG5 0x028A1C -#define GT96100_MPSC_CHAN5_REG6 0x028A20 -#define GT96100_MPSC_CHAN5_REG7 0x028A24 -#define GT96100_MPSC_CHAN5_REG8 0x028A28 -#define GT96100_MPSC_CHAN5_REG9 0x028A2C -#define GT96100_MPSC_CHAN5_REG10 0x028A30 -#define GT96100_MPSC_CHAN5_REG11 0x028A34 -#define GT96100_MPSC6_MAIN_CONFIG_LOW 0x030A00 -#define GT96100_MPSC6_MAIN_CONFIG_HIGH 0x030A04 -#define GT96100_MPSC6_PROTOCOL_CONFIG 0x030A08 -#define GT96100_MPSC_CHAN6_REG1 0x030A0C -#define GT96100_MPSC_CHAN6_REG2 0x030A10 -#define GT96100_MPSC_CHAN6_REG3 0x030A14 -#define GT96100_MPSC_CHAN6_REG4 0x030A18 -#define GT96100_MPSC_CHAN6_REG5 0x030A1C -#define GT96100_MPSC_CHAN6_REG6 0x030A20 -#define GT96100_MPSC_CHAN6_REG7 0x030A24 -#define GT96100_MPSC_CHAN6_REG8 0x030A28 -#define GT96100_MPSC_CHAN6_REG9 0x030A2C -#define GT96100_MPSC_CHAN6_REG10 0x030A30 -#define GT96100_MPSC_CHAN6_REG11 0x030A34 -#define GT96100_MPSC7_MAIN_CONFIG_LOW 0x038A00 -#define GT96100_MPSC7_MAIN_CONFIG_HIGH 0x038A04 -#define GT96100_MPSC7_PROTOCOL_CONFIG 0x038A08 -#define GT96100_MPSC_CHAN7_REG1 0x038A0C -#define GT96100_MPSC_CHAN7_REG2 0x038A10 -#define GT96100_MPSC_CHAN7_REG3 0x038A14 -#define GT96100_MPSC_CHAN7_REG4 0x038A18 -#define GT96100_MPSC_CHAN7_REG5 0x038A1C -#define GT96100_MPSC_CHAN7_REG6 0x038A20 -#define GT96100_MPSC_CHAN7_REG7 0x038A24 -#define GT96100_MPSC_CHAN7_REG8 0x038A28 -#define GT96100_MPSC_CHAN7_REG9 0x038A2C -#define GT96100_MPSC_CHAN7_REG10 0x038A30 -#define GT96100_MPSC_CHAN7_REG11 0x038A34 -/* FlexTDMs */ -/* TDPR0 - Transmit Dual Port RAM. block size 0xff */ -#define GT96100_FXTDM0_TDPR0_BLK0_BASE 0x000B00 -#define GT96100_FXTDM0_TDPR0_BLK1_BASE 0x001B00 -#define GT96100_FXTDM0_TDPR0_BLK2_BASE 0x002B00 -#define GT96100_FXTDM0_TDPR0_BLK3_BASE 0x003B00 -/* RDPR0 - Receive Dual Port RAM. block size 0xff */ -#define GT96100_FXTDM0_RDPR0_BLK0_BASE 0x004B00 -#define GT96100_FXTDM0_RDPR0_BLK1_BASE 0x005B00 -#define GT96100_FXTDM0_RDPR0_BLK2_BASE 0x006B00 -#define GT96100_FXTDM0_RDPR0_BLK3_BASE 0x007B00 -#define GT96100_FXTDM0_TX_READ_PTR 0x008B00 -#define GT96100_FXTDM0_RX_READ_PTR 0x008B04 -#define GT96100_FXTDM0_CONFIG 0x008B08 -#define GT96100_FXTDM0_AUX_CHANA_TX 0x008B0C -#define GT96100_FXTDM0_AUX_CHANA_RX 0x008B10 -#define GT96100_FXTDM0_AUX_CHANB_TX 0x008B14 -#define GT96100_FXTDM0_AUX_CHANB_RX 0x008B18 -#define GT96100_FXTDM1_TDPR1_BLK0_BASE 0x010B00 -#define GT96100_FXTDM1_TDPR1_BLK1_BASE 0x011B00 -#define GT96100_FXTDM1_TDPR1_BLK2_BASE 0x012B00 -#define GT96100_FXTDM1_TDPR1_BLK3_BASE 0x013B00 -#define GT96100_FXTDM1_RDPR1_BLK0_BASE 0x014B00 -#define GT96100_FXTDM1_RDPR1_BLK1_BASE 0x015B00 -#define GT96100_FXTDM1_RDPR1_BLK2_BASE 0x016B00 -#define GT96100_FXTDM1_RDPR1_BLK3_BASE 0x017B00 -#define GT96100_FXTDM1_TX_READ_PTR 0x018B00 -#define GT96100_FXTDM1_RX_READ_PTR 0x018B04 -#define GT96100_FXTDM1_CONFIG 0x018B08 -#define GT96100_FXTDM1_AUX_CHANA_TX 0x018B0C -#define GT96100_FXTDM1_AUX_CHANA_RX 0x018B10 -#define GT96100_FLTDM1_AUX_CHANB_TX 0x018B14 -#define GT96100_FLTDM1_AUX_CHANB_RX 0x018B18 -#define GT96100_FLTDM2_TDPR2_BLK0_BASE 0x020B00 -#define GT96100_FLTDM2_TDPR2_BLK1_BASE 0x021B00 -#define GT96100_FLTDM2_TDPR2_BLK2_BASE 0x022B00 -#define GT96100_FLTDM2_TDPR2_BLK3_BASE 0x023B00 -#define GT96100_FLTDM2_RDPR2_BLK0_BASE 0x024B00 -#define GT96100_FLTDM2_RDPR2_BLK1_BASE 0x025B00 -#define GT96100_FLTDM2_RDPR2_BLK2_BASE 0x026B00 -#define GT96100_FLTDM2_RDPR2_BLK3_BASE 0x027B00 -#define GT96100_FLTDM2_TX_READ_PTR 0x028B00 -#define GT96100_FLTDM2_RX_READ_PTR 0x028B04 -#define GT96100_FLTDM2_CONFIG 0x028B08 -#define GT96100_FLTDM2_AUX_CHANA_TX 0x028B0C -#define GT96100_FLTDM2_AUX_CHANA_RX 0x028B10 -#define GT96100_FLTDM2_AUX_CHANB_TX 0x028B14 -#define GT96100_FLTDM2_AUX_CHANB_RX 0x028B18 -#define GT96100_FLTDM3_TDPR3_BLK0_BASE 0x030B00 -#define GT96100_FLTDM3_TDPR3_BLK1_BASE 0x031B00 -#define GT96100_FLTDM3_TDPR3_BLK2_BASE 0x032B00 -#define GT96100_FLTDM3_TDPR3_BLK3_BASE 0x033B00 -#define GT96100_FXTDM3_RDPR3_BLK0_BASE 0x034B00 -#define GT96100_FXTDM3_RDPR3_BLK1_BASE 0x035B00 -#define GT96100_FXTDM3_RDPR3_BLK2_BASE 0x036B00 -#define GT96100_FXTDM3_RDPR3_BLK3_BASE 0x037B00 -#define GT96100_FXTDM3_TX_READ_PTR 0x038B00 -#define GT96100_FXTDM3_RX_READ_PTR 0x038B04 -#define GT96100_FXTDM3_CONFIG 0x038B08 -#define GT96100_FXTDM3_AUX_CHANA_TX 0x038B0C -#define GT96100_FXTDM3_AUX_CHANA_RX 0x038B10 -#define GT96100_FXTDM3_AUX_CHANB_TX 0x038B14 -#define GT96100_FXTDM3_AUX_CHANB_RX 0x038B18 -/* Baud Rate Generators */ -#define GT96100_BRG0_CONFIG 0x102A00 -#define GT96100_BRG0_BAUD_TUNE 0x102A04 -#define GT96100_BRG1_CONFIG 0x102A08 -#define GT96100_BRG1_BAUD_TUNE 0x102A0C -#define GT96100_BRG2_CONFIG 0x102A10 -#define GT96100_BRG2_BAUD_TUNE 0x102A14 -#define GT96100_BRG3_CONFIG 0x102A18 -#define GT96100_BRG3_BAUD_TUNE 0x102A1C -#define GT96100_BRG4_CONFIG 0x102A20 -#define GT96100_BRG4_BAUD_TUNE 0x102A24 -#define GT96100_BRG5_CONFIG 0x102A28 -#define GT96100_BRG5_BAUD_TUNE 0x102A2C -#define GT96100_BRG6_CONFIG 0x102A30 -#define GT96100_BRG6_BAUD_TUNE 0x102A34 -#define GT96100_BRG7_CONFIG 0x102A38 -#define GT96100_BRG7_BAUD_TUNE 0x102A3C -/* Routing Registers */ -#define GT96100_ROUTE_MAIN 0x101A00 -#define GT96100_ROUTE_RX_CLOCK 0x101A10 -#define GT96100_ROUTE_TX_CLOCK 0x101A20 -/* General Purpose Ports */ -#define GT96100_GPP_CONFIG0 0x100A00 -#define GT96100_GPP_CONFIG1 0x100A04 -#define GT96100_GPP_CONFIG2 0x100A08 -#define GT96100_GPP_CONFIG3 0x100A0C -#define GT96100_GPP_IO0 0x100A20 -#define GT96100_GPP_IO1 0x100A24 -#define GT96100_GPP_IO2 0x100A28 -#define GT96100_GPP_IO3 0x100A2C -#define GT96100_GPP_DATA0 0x100A40 -#define GT96100_GPP_DATA1 0x100A44 -#define GT96100_GPP_DATA2 0x100A48 -#define GT96100_GPP_DATA3 0x100A4C -#define GT96100_GPP_LEVEL0 0x100A60 -#define GT96100_GPP_LEVEL1 0x100A64 -#define GT96100_GPP_LEVEL2 0x100A68 -#define GT96100_GPP_LEVEL3 0x100A6C -/* Watchdog */ -#define GT96100_WD_CONFIG 0x101A80 -#define GT96100_WD_VALUE 0x101A84 -/* Communication Unit Arbiter */ -#define GT96100_COMM_UNIT_ARBTR_CONFIG 0x101AC0 -/* PCI Arbiters */ -#define GT96100_PCI0_ARBTR_CONFIG 0x101AE0 -#define GT96100_PCI1_ARBTR_CONFIG 0x101AE4 -/* CIU Arbiter */ -#define GT96100_CIU_ARBITER_CONFIG 0x101AC0 -/* Interrupt Controller */ -#define GT96100_MAIN_CAUSE 0x000C18 -#define GT96100_INT0_MAIN_MASK 0x000C1C -#define GT96100_INT1_MAIN_MASK 0x000C24 -#define GT96100_HIGH_CAUSE 0x000C98 -#define GT96100_INT0_HIGH_MASK 0x000C9C -#define GT96100_INT1_HIGH_MASK 0x000CA4 -#define GT96100_INT0_SELECT 0x000C70 -#define GT96100_INT1_SELECT 0x000C74 -#define GT96100_SERIAL_CAUSE 0x103A00 -#define GT96100_SERINT0_MASK 0x103A80 -#define GT96100_SERINT1_MASK 0x103A88 - -#endif /* _GT96100_H */ diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h index 25f5e8a4177d..0fe02945feba 100644 --- a/include/asm-mips/hazards.h +++ b/include/asm-mips/hazards.h @@ -12,102 +12,95 @@ #ifdef __ASSEMBLY__ - - .macro _ssnop - sll $0, $0, 1 - .endm - - .macro _ehb - sll $0, $0, 3 - .endm - -/* - * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent - * use of the JTLB for instructions should not occur for 4 cpu cycles and use - * for data translations should not occur for 3 cpu cycles. - */ -#ifdef CONFIG_CPU_RM9000 - - .macro mtc0_tlbw_hazard - .set push - .set mips32 - _ssnop; _ssnop; _ssnop; _ssnop - .set pop - .endm - - .macro tlbw_eret_hazard - .set push - .set mips32 - _ssnop; _ssnop; _ssnop; _ssnop - .set pop - .endm - +#define ASMMACRO(name, code...) .macro name; code; .endm #else -/* - * The taken branch will result in a two cycle penalty for the two killed - * instructions on R4000 / R4400. Other processors only have a single cycle - * hazard so this is nice trick to have an optimal code for a range of - * processors. - */ - .macro mtc0_tlbw_hazard - b . + 8 - .endm +#define ASMMACRO(name, code...) \ +__asm__(".macro " #name "; " #code "; .endm"); \ + \ +static inline void name(void) \ +{ \ + __asm__ __volatile__ (#name); \ +} - .macro tlbw_eret_hazard - .endm #endif +ASMMACRO(_ssnop, + sll $0, $0, 1 + ) + +ASMMACRO(_ehb, + sll $0, $0, 3 + ) + /* - * mtc0->mfc0 hazard - * The 24K has a 2 cycle mtc0/mfc0 execution hazard. - * It is a MIPS32R2 processor so ehb will clear the hazard. + * TLB hazards */ +#if defined(CONFIG_CPU_MIPSR2) -#ifdef CONFIG_CPU_MIPSR2 /* - * Use a macro for ehb unless explicit support for MIPSR2 is enabled + * MIPSR2 defines ehb for hazard avoidance */ -#define irq_enable_hazard \ +ASMMACRO(mtc0_tlbw_hazard, + _ehb + ) +ASMMACRO(tlbw_use_hazard, + _ehb + ) +ASMMACRO(tlb_probe_hazard, + _ehb + ) +ASMMACRO(irq_enable_hazard, + ) +ASMMACRO(irq_disable_hazard, _ehb - -#define irq_disable_hazard \ - _ehb - -#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) - + ) +ASMMACRO(back_to_back_c0_hazard, + _ehb + ) /* - * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer. + * gcc has a tradition of misscompiling the previous construct using the + * address of a label as argument to inline assembler. Gas otoh has the + * annoying difference between la and dla which are only usable for 32-bit + * rsp. 64-bit code, so can't be used without conditional compilation. + * The alterantive is switching the assembler to 64-bit code which happens + * to work right even for 32-bit code ... */ +#define instruction_hazard() \ +do { \ + unsigned long tmp; \ + \ + __asm__ __volatile__( \ + " .set mips64r2 \n" \ + " dla %0, 1f \n" \ + " jr.hb %0 \n" \ + " .set mips0 \n" \ + "1: \n" \ + : "=r" (tmp)); \ +} while (0) -#define irq_enable_hazard - -#define irq_disable_hazard - -#else +#elif defined(CONFIG_CPU_R10000) /* - * Classic MIPS needs 1 - 3 nops or ssnops + * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer. */ -#define irq_enable_hazard -#define irq_disable_hazard \ - _ssnop; _ssnop; _ssnop -#endif - -#else /* __ASSEMBLY__ */ - -__asm__( - " .macro _ssnop \n" - " sll $0, $0, 1 \n" - " .endm \n" - " \n" - " .macro _ehb \n" - " sll $0, $0, 3 \n" - " .endm \n"); +ASMMACRO(mtc0_tlbw_hazard, + ) +ASMMACRO(tlbw_use_hazard, + ) +ASMMACRO(tlb_probe_hazard, + ) +ASMMACRO(irq_enable_hazard, + ) +ASMMACRO(irq_disable_hazard, + ) +ASMMACRO(back_to_back_c0_hazard, + ) +#define instruction_hazard() do { } while (0) -#ifdef CONFIG_CPU_RM9000 +#elif defined(CONFIG_CPU_RM9000) /* * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent @@ -115,176 +108,73 @@ __asm__( * for data translations should not occur for 3 cpu cycles. */ -#define mtc0_tlbw_hazard() \ - __asm__ __volatile__( \ - " .set mips32 \n" \ - " _ssnop \n" \ - " _ssnop \n" \ - " _ssnop \n" \ - " _ssnop \n" \ - " .set mips0 \n") - -#define tlbw_use_hazard() \ - __asm__ __volatile__( \ - " .set mips32 \n" \ - " _ssnop \n" \ - " _ssnop \n" \ - " _ssnop \n" \ - " _ssnop \n" \ - " .set mips0 \n") - -#else - -/* - * Overkill warning ... - */ -#define mtc0_tlbw_hazard() \ - __asm__ __volatile__( \ - " .set noreorder \n" \ - " nop \n" \ - " nop \n" \ - " nop \n" \ - " nop \n" \ - " nop \n" \ - " nop \n" \ - " .set reorder \n") - -#define tlbw_use_hazard() \ - __asm__ __volatile__( \ - " .set noreorder \n" \ - " nop \n" \ - " nop \n" \ - " nop \n" \ - " nop \n" \ - " nop \n" \ - " nop \n" \ - " .set reorder \n") - -#endif - -/* - * Interrupt enable/disable hazards - * Some processors have hazards when modifying - * the status register to change the interrupt state - */ - -#ifdef CONFIG_CPU_MIPSR2 - -__asm__(" .macro irq_enable_hazard \n" - " _ehb \n" - " .endm \n" - " \n" - " .macro irq_disable_hazard \n" - " _ehb \n" - " .endm \n"); +ASMMACRO(mtc0_tlbw_hazard, + _ssnop; _ssnop; _ssnop; _ssnop + ) +ASMMACRO(tlbw_use_hazard, + _ssnop; _ssnop; _ssnop; _ssnop + ) +ASMMACRO(tlb_probe_hazard, + _ssnop; _ssnop; _ssnop; _ssnop + ) +ASMMACRO(irq_enable_hazard, + ) +ASMMACRO(irq_disable_hazard, + ) +ASMMACRO(back_to_back_c0_hazard, + ) +#define instruction_hazard() do { } while (0) -#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) +#elif defined(CONFIG_CPU_SB1) /* - * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer. + * Mostly like R4000 for historic reasons */ - -__asm__( - " .macro irq_enable_hazard \n" - " .endm \n" - " \n" - " .macro irq_disable_hazard \n" - " .endm \n"); +ASMMACRO(mtc0_tlbw_hazard, + ) +ASMMACRO(tlbw_use_hazard, + ) +ASMMACRO(tlb_probe_hazard, + ) +ASMMACRO(irq_enable_hazard, + ) +ASMMACRO(irq_disable_hazard, + _ssnop; _ssnop; _ssnop + ) +ASMMACRO(back_to_back_c0_hazard, + ) +#define instruction_hazard() do { } while (0) #else /* - * Default for classic MIPS processors. Assume worst case hazards but don't - * care about the irq_enable_hazard - sooner or later the hardware will - * enable it and we don't care when exactly. - */ - -__asm__( - " # \n" - " # There is a hazard but we do not care \n" - " # \n" - " .macro\tirq_enable_hazard \n" - " .endm \n" - " \n" - " .macro\tirq_disable_hazard \n" - " _ssnop \n" - " _ssnop \n" - " _ssnop \n" - " .endm \n"); - -#endif - -#define irq_enable_hazard() \ - __asm__ __volatile__("irq_enable_hazard") -#define irq_disable_hazard() \ - __asm__ __volatile__("irq_disable_hazard") - - -/* - * Back-to-back hazards - + * Finally the catchall case for all other processors including R4000, R4400, + * R4600, R4700, R5000, RM7000, NEC VR41xx etc. * - * What is needed to separate a move to cp0 from a subsequent read from the - * same cp0 register? - */ -#ifdef CONFIG_CPU_MIPSR2 - -__asm__(" .macro back_to_back_c0_hazard \n" - " _ehb \n" - " .endm \n"); - -#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) || \ - defined(CONFIG_CPU_SB1) - -__asm__(" .macro back_to_back_c0_hazard \n" - " .endm \n"); - -#else - -__asm__(" .macro back_to_back_c0_hazard \n" - " .set noreorder \n" - " _ssnop \n" - " _ssnop \n" - " _ssnop \n" - " .set reorder \n" - " .endm"); - -#endif - -#define back_to_back_c0_hazard() \ - __asm__ __volatile__("back_to_back_c0_hazard") - - -/* - * Instruction execution hazard - */ -#ifdef CONFIG_CPU_MIPSR2 -/* - * gcc has a tradition of misscompiling the previous construct using the - * address of a label as argument to inline assembler. Gas otoh has the - * annoying difference between la and dla which are only usable for 32-bit - * rsp. 64-bit code, so can't be used without conditional compilation. - * The alterantive is switching the assembler to 64-bit code which happens - * to work right even for 32-bit code ... + * The taken branch will result in a two cycle penalty for the two killed + * instructions on R4000 / R4400. Other processors only have a single cycle + * hazard so this is nice trick to have an optimal code for a range of + * processors. */ -#define instruction_hazard() \ -do { \ - unsigned long tmp; \ - \ - __asm__ __volatile__( \ - " .set mips64r2 \n" \ - " dla %0, 1f \n" \ - " jr.hb %0 \n" \ - " .set mips0 \n" \ - "1: \n" \ - : "=r" (tmp)); \ -} while (0) - -#else +ASMMACRO(mtc0_tlbw_hazard, + nop + ) +ASMMACRO(tlbw_use_hazard, + nop; nop; nop + ) +ASMMACRO(tlb_probe_hazard, + nop; nop; nop + ) +ASMMACRO(irq_enable_hazard, + ) +ASMMACRO(irq_disable_hazard, + nop; nop; nop + ) +ASMMACRO(back_to_back_c0_hazard, + _ssnop; _ssnop; _ssnop; + ) #define instruction_hazard() do { } while (0) -#endif - -extern void mips_ihb(void); -#endif /* __ASSEMBLY__ */ +#endif #endif /* _ASM_HAZARDS_H */ diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h index 896550bad322..d35c61776a02 100644 --- a/include/asm-mips/irq.h +++ b/include/asm-mips/irq.h @@ -76,8 +76,4 @@ extern int setup_irq_smtc(unsigned int irq, struct irqaction * new, unsigned long hwmask); #endif /* CONFIG_MIPS_MT_SMTC */ -#ifdef CONFIG_SMP -#define ARCH_HAS_IRQ_PER_CPU -#endif - #endif /* _ASM_IRQ_H */ diff --git a/include/asm-mips/mach-atlas/mc146818rtc.h b/include/asm-mips/mach-atlas/mc146818rtc.h index 397522ea5565..a73a5698420c 100644 --- a/include/asm-mips/mach-atlas/mc146818rtc.h +++ b/include/asm-mips/mach-atlas/mc146818rtc.h @@ -28,10 +28,12 @@ #include <asm/mips-boards/atlas.h> #include <asm/mips-boards/atlasint.h> +#define ARCH_RTC_LOCATION + #define RTC_PORT(x) (ATLAS_RTC_ADR_REG + (x) * 8) #define RTC_IO_EXTENT 0x100 #define RTC_IOMAPPED 0 -#define RTC_IRQ ATLASINT_RTC +#define RTC_IRQ ATLAS_INT_RTC static inline unsigned char CMOS_READ(unsigned long addr) { diff --git a/include/asm-mips/mach-ev96100/mach-gt64120.h b/include/asm-mips/mach-ev96100/mach-gt64120.h deleted file mode 100644 index 0ef1e6c25acf..000000000000 --- a/include/asm-mips/mach-ev96100/mach-gt64120.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * This is a direct copy of the ev96100.h file, with a global - * search and replace. The numbers are the same. - * - * The reason I'm duplicating this is so that the 64120/96100 - * defines won't be confusing in the source code. - */ -#ifndef _ASM_GT64120_EV96100_GT64120_DEP_H -#define _ASM_GT64120_EV96100_GT64120_DEP_H - -/* - * GT96100 config space base address - */ -#define GT64120_BASE (KSEG1ADDR(0x14000000)) - -/* - * PCI Bus allocation - * - * (Guessing ...) - */ -#define GT_PCI_MEM_BASE 0x12000000UL -#define GT_PCI_MEM_SIZE 0x02000000UL -#define GT_PCI_IO_BASE 0x10000000UL -#define GT_PCI_IO_SIZE 0x02000000UL -#define GT_ISA_IO_BASE PCI_IO_BASE - -/* - * Duart I/O ports. - */ -#define EV96100_COM1_BASE_ADDR (0xBD000000 + 0x20) -#define EV96100_COM2_BASE_ADDR (0xBD000000 + 0x00) - - -/* - * EV96100 interrupt controller register base. - */ -#define EV96100_ICTRL_REGS_BASE (KSEG1ADDR(0x1f000000)) - -/* - * EV96100 UART register base. - */ -#define EV96100_UART0_REGS_BASE EV96100_COM1_BASE_ADDR -#define EV96100_UART1_REGS_BASE EV96100_COM2_BASE_ADDR -#define EV96100_BASE_BAUD ( 3686400 / 16 ) - -#endif /* _ASM_GT64120_EV96100_GT64120_DEP_H */ diff --git a/include/asm-mips/mach-excite/excite.h b/include/asm-mips/mach-excite/excite.h index 130bd4b8edce..4c29ba44992c 100644 --- a/include/asm-mips/mach-excite/excite.h +++ b/include/asm-mips/mach-excite/excite.h @@ -7,7 +7,7 @@ #define EXCITE_CPU_EXT_CLOCK 100000000 -#if !defined(__ASSEMBLER__) +#if !defined(__ASSEMBLY__) void __init excite_kgdb_init(void); void excite_procfs_init(void); extern unsigned long memsize; diff --git a/include/asm-mips/mach-excite/excite_fpga.h b/include/asm-mips/mach-excite/excite_fpga.h new file mode 100644 index 000000000000..38fcda703a0b --- /dev/null +++ b/include/asm-mips/mach-excite/excite_fpga.h @@ -0,0 +1,80 @@ +#ifndef EXCITE_FPGA_H_INCLUDED +#define EXCITE_FPGA_H_INCLUDED + + +/** + * Adress alignment of the individual FPGA bytes. + * The address arrangement of the individual bytes of the FPGA is two + * byte aligned at the embedded MK2 platform. + */ +#ifdef EXCITE_CCI_FPGA_MK2 +typedef unsigned char excite_cci_fpga_align_t __attribute__ ((aligned(2))); +#else +typedef unsigned char excite_cci_fpga_align_t; +#endif + + +/** + * Size of Dual Ported RAM. + */ +#define EXCITE_DPR_SIZE 263 + + +/** + * Size of Reserved Status Fields in Dual Ported RAM. + */ +#define EXCITE_DPR_STATUS_SIZE 7 + + + +/** + * FPGA. + * Hardware register layout of the FPGA interface. The FPGA must accessed + * byte wise solely. + * @see EXCITE_CCI_DPR_MK2 + */ +typedef struct excite_fpga { + + /** + * Dual Ported RAM. + */ + excite_cci_fpga_align_t dpr[EXCITE_DPR_SIZE]; + + /** + * Status. + */ + excite_cci_fpga_align_t status[EXCITE_DPR_STATUS_SIZE]; + +#ifdef EXCITE_CCI_FPGA_MK2 + /** + * RM9000 Interrupt. + * Write access initiates interrupt at the RM9000 (MIPS) processor of the eXcite. + */ + excite_cci_fpga_align_t rm9k_int; +#else + /** + * MK2 Interrupt. + * Write access initiates interrupt at the ARM processor of the MK2. + */ + excite_cci_fpga_align_t mk2_int; + + excite_cci_fpga_align_t gap[0x1000-0x10f]; + + /** + * IRQ Source/Acknowledge. + */ + excite_cci_fpga_align_t rm9k_irq_src; + + /** + * IRQ Mask. + * Set bits enable the related interrupt. + */ + excite_cci_fpga_align_t rm9k_irq_mask; +#endif + + +} excite_fpga; + + + +#endif /* ndef EXCITE_FPGA_H_INCLUDED */ diff --git a/include/asm-mips/mach-qemu/cpu-feature-overrides.h b/include/asm-mips/mach-qemu/cpu-feature-overrides.h index f4e370e27168..529445dacedb 100644 --- a/include/asm-mips/mach-qemu/cpu-feature-overrides.h +++ b/include/asm-mips/mach-qemu/cpu-feature-overrides.h @@ -20,7 +20,7 @@ #define cpu_has_llsc 1 #define cpu_has_vtag_icache 0 -#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000) +#define cpu_has_dc_aliases 0 #define cpu_has_ic_fills_f_dc 0 #define cpu_has_dsp 0 diff --git a/include/asm-mips/mips-boards/atlasint.h b/include/asm-mips/mips-boards/atlasint.h index fd7ebc54fa90..b15e4ea0b091 100644 --- a/include/asm-mips/mips-boards/atlasint.h +++ b/include/asm-mips/mips-boards/atlasint.h @@ -1,6 +1,7 @@ /* - * Carsten Langgaard, carstenl@mips.com - * Copyright (C) 1999 MIPS Technologies, Inc. All rights reserved. + * Copyright (C) 1999, 2006 MIPS Technologies, Inc. All rights reserved. + * Authors: Carsten Langgaard <carstenl@mips.com> + * Maciej W. Rozycki <macro@mips.com> * * ######################################################################## * @@ -25,41 +26,88 @@ #ifndef _MIPS_ATLASINT_H #define _MIPS_ATLASINT_H -#define ATLASINT_BASE 1 -#define ATLASINT_UART (ATLASINT_BASE+0) -#define ATLASINT_TIM0 (ATLASINT_BASE+1) -#define ATLASINT_RES2 (ATLASINT_BASE+2) -#define ATLASINT_RES3 (ATLASINT_BASE+3) -#define ATLASINT_RTC (ATLASINT_BASE+4) -#define ATLASINT_COREHI (ATLASINT_BASE+5) -#define ATLASINT_CORELO (ATLASINT_BASE+6) -#define ATLASINT_RES7 (ATLASINT_BASE+7) -#define ATLASINT_PCIA (ATLASINT_BASE+8) -#define ATLASINT_PCIB (ATLASINT_BASE+9) -#define ATLASINT_PCIC (ATLASINT_BASE+10) -#define ATLASINT_PCID (ATLASINT_BASE+11) -#define ATLASINT_ENUM (ATLASINT_BASE+12) -#define ATLASINT_DEG (ATLASINT_BASE+13) -#define ATLASINT_ATXFAIL (ATLASINT_BASE+14) -#define ATLASINT_INTA (ATLASINT_BASE+15) -#define ATLASINT_INTB (ATLASINT_BASE+16) -#define ATLASINT_ETH ATLASINT_INTB -#define ATLASINT_INTC (ATLASINT_BASE+17) -#define ATLASINT_SCSI ATLASINT_INTC -#define ATLASINT_INTD (ATLASINT_BASE+18) -#define ATLASINT_SERR (ATLASINT_BASE+19) -#define ATLASINT_RES20 (ATLASINT_BASE+20) -#define ATLASINT_RES21 (ATLASINT_BASE+21) -#define ATLASINT_RES22 (ATLASINT_BASE+22) -#define ATLASINT_RES23 (ATLASINT_BASE+23) -#define ATLASINT_RES24 (ATLASINT_BASE+24) -#define ATLASINT_RES25 (ATLASINT_BASE+25) -#define ATLASINT_RES26 (ATLASINT_BASE+26) -#define ATLASINT_RES27 (ATLASINT_BASE+27) -#define ATLASINT_RES28 (ATLASINT_BASE+28) -#define ATLASINT_RES29 (ATLASINT_BASE+29) -#define ATLASINT_RES30 (ATLASINT_BASE+30) -#define ATLASINT_RES31 (ATLASINT_BASE+31) -#define ATLASINT_END (ATLASINT_BASE+31) +/* + * Interrupts 0..7 are used for Atlas CPU interrupts (nonEIC mode) + */ +#define MIPSCPU_INT_BASE 0 + +/* CPU interrupt offsets */ +#define MIPSCPU_INT_SW0 0 +#define MIPSCPU_INT_SW1 1 +#define MIPSCPU_INT_MB0 2 +#define MIPSCPU_INT_ATLAS MIPSCPU_INT_MB0 +#define MIPSCPU_INT_MB1 3 +#define MIPSCPU_INT_MB2 4 +#define MIPSCPU_INT_MB3 5 +#define MIPSCPU_INT_MB4 6 +#define MIPSCPU_INT_CPUCTR 7 + +/* + * Interrupts 8..39 are used for Atlas interrupt controller interrupts + */ +#define ATLAS_INT_BASE 8 +#define ATLAS_INT_UART (ATLAS_INT_BASE + 0) +#define ATLAS_INT_TIM0 (ATLAS_INT_BASE + 1) +#define ATLAS_INT_RES2 (ATLAS_INT_BASE + 2) +#define ATLAS_INT_RES3 (ATLAS_INT_BASE + 3) +#define ATLAS_INT_RTC (ATLAS_INT_BASE + 4) +#define ATLAS_INT_COREHI (ATLAS_INT_BASE + 5) +#define ATLAS_INT_CORELO (ATLAS_INT_BASE + 6) +#define ATLAS_INT_RES7 (ATLAS_INT_BASE + 7) +#define ATLAS_INT_PCIA (ATLAS_INT_BASE + 8) +#define ATLAS_INT_PCIB (ATLAS_INT_BASE + 9) +#define ATLAS_INT_PCIC (ATLAS_INT_BASE + 10) +#define ATLAS_INT_PCID (ATLAS_INT_BASE + 11) +#define ATLAS_INT_ENUM (ATLAS_INT_BASE + 12) +#define ATLAS_INT_DEG (ATLAS_INT_BASE + 13) +#define ATLAS_INT_ATXFAIL (ATLAS_INT_BASE + 14) +#define ATLAS_INT_INTA (ATLAS_INT_BASE + 15) +#define ATLAS_INT_INTB (ATLAS_INT_BASE + 16) +#define ATLAS_INT_ETH ATLAS_INT_INTB +#define ATLAS_INT_INTC (ATLAS_INT_BASE + 17) +#define ATLAS_INT_SCSI ATLAS_INT_INTC +#define ATLAS_INT_INTD (ATLAS_INT_BASE + 18) +#define ATLAS_INT_SERR (ATLAS_INT_BASE + 19) +#define ATLAS_INT_RES20 (ATLAS_INT_BASE + 20) +#define ATLAS_INT_RES21 (ATLAS_INT_BASE + 21) +#define ATLAS_INT_RES22 (ATLAS_INT_BASE + 22) +#define ATLAS_INT_RES23 (ATLAS_INT_BASE + 23) +#define ATLAS_INT_RES24 (ATLAS_INT_BASE + 24) +#define ATLAS_INT_RES25 (ATLAS_INT_BASE + 25) +#define ATLAS_INT_RES26 (ATLAS_INT_BASE + 26) +#define ATLAS_INT_RES27 (ATLAS_INT_BASE + 27) +#define ATLAS_INT_RES28 (ATLAS_INT_BASE + 28) +#define ATLAS_INT_RES29 (ATLAS_INT_BASE + 29) +#define ATLAS_INT_RES30 (ATLAS_INT_BASE + 30) +#define ATLAS_INT_RES31 (ATLAS_INT_BASE + 31) +#define ATLAS_INT_END (ATLAS_INT_BASE + 31) + +/* + * Interrupts 64..127 are used for Soc-it Classic interrupts + */ +#define MSC01C_INT_BASE 64 + +/* SOC-it Classic interrupt offsets */ +#define MSC01C_INT_TMR 0 +#define MSC01C_INT_PCI 1 + +/* + * Interrupts 64..127 are used for Soc-it EIC interrupts + */ +#define MSC01E_INT_BASE 64 + +/* SOC-it EIC interrupt offsets */ +#define MSC01E_INT_SW0 1 +#define MSC01E_INT_SW1 2 +#define MSC01E_INT_MB0 3 +#define MSC01E_INT_ATLAS MSC01E_INT_MB0 +#define MSC01E_INT_MB1 4 +#define MSC01E_INT_MB2 5 +#define MSC01E_INT_MB3 6 +#define MSC01E_INT_MB4 7 +#define MSC01E_INT_TMR 8 +#define MSC01E_INT_PCI 9 +#define MSC01E_INT_PERFCTR 10 +#define MSC01E_INT_CPUCTR 11 #endif /* !(_MIPS_ATLASINT_H) */ diff --git a/include/asm-mips/mmu_context.h b/include/asm-mips/mmu_context.h index 18b69de87daa..fe065d6070ca 100644 --- a/include/asm-mips/mmu_context.h +++ b/include/asm-mips/mmu_context.h @@ -262,10 +262,10 @@ drop_mmu_context(struct mm_struct *mm, unsigned cpu) /* See comments for similar code above */ prevvpe = dvpe(); oldasid = (read_c0_entryhi() & ASID_MASK); - if(smtc_live_asid[mytlb][oldasid]) { - smtc_live_asid[mytlb][oldasid] &= ~(0x1 << cpu); - if(smtc_live_asid[mytlb][oldasid] == 0) - smtc_flush_tlb_asid(oldasid); + if (smtc_live_asid[mytlb][oldasid]) { + smtc_live_asid[mytlb][oldasid] &= ~(0x1 << cpu); + if(smtc_live_asid[mytlb][oldasid] == 0) + smtc_flush_tlb_asid(oldasid); } /* See comments for similar code above */ write_c0_entryhi((read_c0_entryhi() & ~HW_ASID_MASK) diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h index 219d359861f3..85b258ee7090 100644 --- a/include/asm-mips/page.h +++ b/include/asm-mips/page.h @@ -34,6 +34,8 @@ #ifndef __ASSEMBLY__ +#include <asm/cpu-features.h> + extern void clear_page(void * page); extern void copy_page(void * to, void * from); @@ -53,7 +55,7 @@ static inline void clear_user_page(void *addr, unsigned long vaddr, extern void (*flush_data_cache_page)(unsigned long addr); clear_page(addr); - if (pages_do_alias((unsigned long) addr, vaddr)) + if (pages_do_alias((unsigned long) addr, vaddr & PAGE_MASK)) flush_data_cache_page((unsigned long)addr); } @@ -63,7 +65,8 @@ static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, extern void (*flush_data_cache_page)(unsigned long addr); copy_page(vto, vfrom); - if (pages_do_alias((unsigned long)vto, vaddr)) + if (!cpu_has_ic_fills_f_dc || + pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK)) flush_data_cache_page((unsigned long)vto); } @@ -74,15 +77,17 @@ static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, #ifdef CONFIG_CPU_MIPS32 typedef struct { unsigned long pte_low, pte_high; } pte_t; #define pte_val(x) ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) + #define __pte(x) ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; }) #else typedef struct { unsigned long long pte; } pte_t; #define pte_val(x) ((x).pte) + #define __pte(x) ((pte_t) { (x) } ) #endif #else typedef struct { unsigned long pte; } pte_t; #define pte_val(x) ((x).pte) -#endif #define __pte(x) ((pte_t) { (x) } ) +#endif /* * For 3-level pagetables we defines these ourselves, for 2-level the diff --git a/include/asm-mips/pgtable-64.h b/include/asm-mips/pgtable-64.h index c59a1e21f5b0..d05fb6f38aa7 100644 --- a/include/asm-mips/pgtable-64.h +++ b/include/asm-mips/pgtable-64.h @@ -93,8 +93,12 @@ #define PTRS_PER_PMD ((PAGE_SIZE << PMD_ORDER) / sizeof(pmd_t)) #define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t)) +#if PGDIR_SIZE >= TASK_SIZE +#define USER_PTRS_PER_PGD (1) +#else #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) -#define FIRST_USER_ADDRESS 0 +#endif +#define FIRST_USER_ADDRESS 0UL #define VMALLOC_START MAP_BASE #define VMALLOC_END \ diff --git a/include/asm-mips/ptrace.h b/include/asm-mips/ptrace.h index 4113316ee0da..4fb0fc43ffd7 100644 --- a/include/asm-mips/ptrace.h +++ b/include/asm-mips/ptrace.h @@ -10,8 +10,6 @@ #define _ASM_PTRACE_H -#include <asm/isadep.h> - /* 0 - 31 are integer registers, 32 - 63 are fp registers. */ #define FPR_BASE 32 #define PC 64 @@ -73,6 +71,7 @@ struct pt_regs { #ifdef __KERNEL__ #include <linux/linkage.h> +#include <asm/isadep.h> /* * Does the process account for user or for system time? diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h index 584bd9c0ab2e..035637c67e7c 100644 --- a/include/asm-mips/serial.h +++ b/include/asm-mips/serial.h @@ -52,9 +52,9 @@ #endif /* - * Both Galileo boards have the same UART mappings. + * Galileo EV64120 evaluation board */ -#if defined (CONFIG_MIPS_EV96100) || defined (CONFIG_MIPS_EV64120) +#ifdef CONFIG_MIPS_EV64120 #include <asm/galileo-boards/ev96100.h> #include <asm/galileo-boards/ev96100int.h> #define EV96100_SERIAL_PORT_DEFNS \ diff --git a/include/asm-mips/sibyte/sb1250_defs.h b/include/asm-mips/sibyte/sb1250_defs.h index 335dbaf1d831..a885491217c1 100644 --- a/include/asm-mips/sibyte/sb1250_defs.h +++ b/include/asm-mips/sibyte/sb1250_defs.h @@ -212,7 +212,7 @@ * Note: you'll need to define uint32_t and uint64_t in your headers. */ -#if !defined(__ASSEMBLER__) +#if !defined(__ASSEMBLY__) #define _SB_MAKE64(x) ((uint64_t)(x)) #define _SB_MAKE32(x) ((uint32_t)(x)) #else @@ -251,9 +251,9 @@ */ -#if defined(__mips64) && !defined(__ASSEMBLER__) +#if defined(__mips64) && !defined(__ASSEMBLY__) #define SBWRITECSR(csr,val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val) #define SBREADCSR(csr) (*((volatile uint64_t *) PHYS_TO_K1(csr))) -#endif /* __ASSEMBLER__ */ +#endif /* __ASSEMBLY__ */ #endif diff --git a/include/asm-mips/sibyte/sb1250_scd.h b/include/asm-mips/sibyte/sb1250_scd.h index f4178bdcfcb0..7ed0bb611e56 100644 --- a/include/asm-mips/sibyte/sb1250_scd.h +++ b/include/asm-mips/sibyte/sb1250_scd.h @@ -149,7 +149,7 @@ * (For the assembler version, sysrev and dest may be the same register. * Also, it clobbers AT.) */ -#ifdef __ASSEMBLER__ +#ifdef __ASSEMBLY__ #define SYS_SOC_TYPE(dest, sysrev) \ .set push ; \ .set reorder ; \ diff --git a/include/asm-mips/signal.h b/include/asm-mips/signal.h index 87a1dff95199..8b391a2f0814 100644 --- a/include/asm-mips/signal.h +++ b/include/asm-mips/signal.h @@ -108,17 +108,8 @@ typedef unsigned long old_sigset_t; /* at least 32 bits */ #define SIG_BLOCK 1 /* for blocking signals */ #define SIG_UNBLOCK 2 /* for unblocking signals */ #define SIG_SETMASK 3 /* for setting the signal mask */ -#define SIG_SETMASK32 256 /* Goodie from SGI for BSD compatibility: - set only the low 32 bit of the sigset. */ -/* Type of a signal handler. */ -typedef void __signalfn_t(int); -typedef __signalfn_t __user *__sighandler_t; - -/* Fake signal functions */ -#define SIG_DFL ((__sighandler_t)0) /* default signal handling */ -#define SIG_IGN ((__sighandler_t)1) /* ignore signal */ -#define SIG_ERR ((__sighandler_t)-1) /* error return from signal */ +#include <asm-generic/signal.h> struct sigaction { unsigned int sa_flags; diff --git a/include/asm-mips/spinlock.h b/include/asm-mips/spinlock.h index 669b8e349ff2..4c1a1b53aeaf 100644 --- a/include/asm-mips/spinlock.h +++ b/include/asm-mips/spinlock.h @@ -239,7 +239,51 @@ static inline void __raw_write_unlock(raw_rwlock_t *rw) : "memory"); } -#define __raw_read_trylock(lock) generic__raw_read_trylock(lock) +static inline int __raw_read_trylock(raw_rwlock_t *rw) +{ + unsigned int tmp; + int ret; + + if (R10000_LLSC_WAR) { + __asm__ __volatile__( + " .set noreorder # __raw_read_trylock \n" + " li %2, 0 \n" + "1: ll %1, %3 \n" + " bnez %1, 2f \n" + " addu %1, 1 \n" + " sc %1, %0 \n" + " beqzl %1, 1b \n" + " .set reorder \n" +#ifdef CONFIG_SMP + " sync \n" +#endif + " li %2, 1 \n" + "2: \n" + : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret) + : "m" (rw->lock) + : "memory"); + } else { + __asm__ __volatile__( + " .set noreorder # __raw_read_trylock \n" + " li %2, 0 \n" + "1: ll %1, %3 \n" + " bnez %1, 2f \n" + " addu %1, 1 \n" + " sc %1, %0 \n" + " beqz %1, 1b \n" + " .set reorder \n" +#ifdef CONFIG_SMP + " sync \n" +#endif + " li %2, 1 \n" + "2: \n" + : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret) + : "m" (rw->lock) + : "memory"); + } + + return ret; +} static inline int __raw_write_trylock(raw_rwlock_t *rw) { @@ -283,4 +327,5 @@ static inline int __raw_write_trylock(raw_rwlock_t *rw) return ret; } + #endif /* _ASM_SPINLOCK_H */ diff --git a/include/asm-mips/timex.h b/include/asm-mips/timex.h index 98aa737b34aa..b80de8e0fbbd 100644 --- a/include/asm-mips/timex.h +++ b/include/asm-mips/timex.h @@ -8,6 +8,8 @@ #ifndef _ASM_TIMEX_H #define _ASM_TIMEX_H +#ifdef __KERNEL__ + #include <asm/mipsregs.h> /* @@ -51,4 +53,6 @@ static inline cycles_t get_cycles (void) return read_c0_count(); } +#endif /* __KERNEL__ */ + #endif /* _ASM_TIMEX_H */ diff --git a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h index 610ccb8a50b3..c39142920fe6 100644 --- a/include/asm-mips/unistd.h +++ b/include/asm-mips/unistd.h @@ -313,7 +313,7 @@ #define __NR_mknodat (__NR_Linux + 290) #define __NR_fchownat (__NR_Linux + 291) #define __NR_futimesat (__NR_Linux + 292) -#define __NR_fstatat (__NR_Linux + 293) +#define __NR_fstatat64 (__NR_Linux + 293) #define __NR_unlinkat (__NR_Linux + 294) #define __NR_renameat (__NR_Linux + 295) #define __NR_linkat (__NR_Linux + 296) @@ -329,16 +329,18 @@ #define __NR_tee (__NR_Linux + 306) #define __NR_vmsplice (__NR_Linux + 307) #define __NR_move_pages (__NR_Linux + 308) +#define __NR_set_robust_list (__NR_Linux + 309) +#define __NR_get_robust_list (__NR_Linux + 310) /* * Offset of the last Linux o32 flavoured syscall */ -#define __NR_Linux_syscalls 308 +#define __NR_Linux_syscalls 310 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ #define __NR_O32_Linux 4000 -#define __NR_O32_Linux_syscalls 308 +#define __NR_O32_Linux_syscalls 310 #if _MIPS_SIM == _MIPS_SIM_ABI64 @@ -598,7 +600,7 @@ #define __NR_mknodat (__NR_Linux + 249) #define __NR_fchownat (__NR_Linux + 250) #define __NR_futimesat (__NR_Linux + 251) -#define __NR_fstatat (__NR_Linux + 252) +#define __NR_newfstatat (__NR_Linux + 252) #define __NR_unlinkat (__NR_Linux + 253) #define __NR_renameat (__NR_Linux + 254) #define __NR_linkat (__NR_Linux + 255) @@ -614,16 +616,18 @@ #define __NR_tee (__NR_Linux + 265) #define __NR_vmsplice (__NR_Linux + 266) #define __NR_move_pages (__NR_Linux + 267) +#define __NR_set_robust_list (__NR_Linux + 268) +#define __NR_get_robust_list (__NR_Linux + 269) /* * Offset of the last Linux 64-bit flavoured syscall */ -#define __NR_Linux_syscalls 267 +#define __NR_Linux_syscalls 269 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ #define __NR_64_Linux 5000 -#define __NR_64_Linux_syscalls 267 +#define __NR_64_Linux_syscalls 269 #if _MIPS_SIM == _MIPS_SIM_NABI32 @@ -887,7 +891,7 @@ #define __NR_mknodat (__NR_Linux + 253) #define __NR_fchownat (__NR_Linux + 254) #define __NR_futimesat (__NR_Linux + 255) -#define __NR_fstatat (__NR_Linux + 256) +#define __NR_newfstatat (__NR_Linux + 256) #define __NR_unlinkat (__NR_Linux + 257) #define __NR_renameat (__NR_Linux + 258) #define __NR_linkat (__NR_Linux + 259) @@ -903,16 +907,18 @@ #define __NR_tee (__NR_Linux + 269) #define __NR_vmsplice (__NR_Linux + 270) #define __NR_move_pages (__NR_Linux + 271) +#define __NR_set_robust_list (__NR_Linux + 272) +#define __NR_get_robust_list (__NR_Linux + 273) /* * Offset of the last N32 flavoured syscall */ -#define __NR_Linux_syscalls 271 +#define __NR_Linux_syscalls 273 #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ #define __NR_N32_Linux 6000 -#define __NR_N32_Linux_syscalls 271 +#define __NR_N32_Linux_syscalls 273 #ifdef __KERNEL__ diff --git a/include/asm-mips/user.h b/include/asm-mips/user.h index 89bf8b4cab3c..61f2a093b91b 100644 --- a/include/asm-mips/user.h +++ b/include/asm-mips/user.h @@ -8,6 +8,8 @@ #ifndef _ASM_USER_H #define _ASM_USER_H +#ifdef __KERNEL__ + #include <asm/page.h> #include <asm/reg.h> @@ -55,4 +57,6 @@ struct user { #define HOST_DATA_START_ADDR (u.start_data) #define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG) +#endif /* __KERNEL__ */ + #endif /* _ASM_USER_H */ diff --git a/include/asm-s390/unistd.h b/include/asm-s390/unistd.h index 02b942d85c37..d49c54cb5505 100644 --- a/include/asm-s390/unistd.h +++ b/include/asm-s390/unistd.h @@ -342,9 +342,11 @@ #ifdef __KERNEL__ +#include <linux/err.h> + #define __syscall_return(type, res) \ do { \ - if ((unsigned long)(res) >= (unsigned long)(-4095)) {\ + if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \ errno = -(res); \ res = -1; \ } \ diff --git a/include/asm-sh/unistd.h b/include/asm-sh/unistd.h index 080e5729f17d..5d5e9f94def5 100644 --- a/include/asm-sh/unistd.h +++ b/include/asm-sh/unistd.h @@ -329,11 +329,14 @@ #ifdef __KERNEL__ -/* user-visible error numbers are in the range -1 - -124: see <asm-sh/errno.h> */ +#include <linux/err.h> + +/* user-visible error numbers are in the range -1 - -MAX_ERRNO: + * see <asm-sh/errno.h> */ #define __syscall_return(type, res) \ do { \ - if ((unsigned long)(res) >= (unsigned long)(-124)) { \ + if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \ /* Avoid using "res" which is declared to be in register r0; \ errno might expand to a function call and clobber it. */ \ int __err = -(res); \ diff --git a/include/asm-sh64/unistd.h b/include/asm-sh64/unistd.h index 9a1590fffc15..c113566bef33 100644 --- a/include/asm-sh64/unistd.h +++ b/include/asm-sh64/unistd.h @@ -347,8 +347,10 @@ #ifdef __KERNEL__ #define NR_syscalls 321 +#include <linux/err.h> -/* user-visible error numbers are in the range -1 - -125: see <asm-sh64/errno.h> */ +/* user-visible error numbers are in the range -1 - -MAX_ERRNO: + * see <asm-sh64/errno.h> */ #define __syscall_return(type, res) \ do { \ @@ -358,7 +360,7 @@ do { \ ** life easier in the system call epilogue (see entry.S) \ */ \ register unsigned long __sr2 __asm__ ("r2") = res; \ - if ((unsigned long)(res) >= (unsigned long)(-125)) { \ + if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \ errno = -(res); \ __sr2 = -1; \ } \ diff --git a/include/asm-um/processor-generic.h b/include/asm-um/processor-generic.h index afa4fe1ca9f1..d99bbddffdb9 100644 --- a/include/asm-um/processor-generic.h +++ b/include/asm-um/processor-generic.h @@ -13,6 +13,7 @@ struct task_struct; #include "asm/ptrace.h" #include "choose-mode.h" #include "registers.h" +#include "sysdep/archsetjmp.h" struct mm_struct; @@ -43,8 +44,7 @@ struct thread_struct { #endif #ifdef CONFIG_MODE_SKAS struct { - void *switch_buf; - void *fork_buf; + jmp_buf switch_buf; int mm_count; } skas; #endif @@ -138,7 +138,7 @@ extern struct cpuinfo_um cpu_data[]; #ifdef CONFIG_MODE_SKAS #define KSTK_REG(tsk, reg) \ - get_thread_reg(reg, tsk->thread.mode.skas.switch_buf) + get_thread_reg(reg, &tsk->thread.mode.skas.switch_buf) #else #define KSTK_REG(tsk, reg) (0xbadbabe) #endif diff --git a/include/asm-um/ptrace-x86_64.h b/include/asm-um/ptrace-x86_64.h index 2074483e6ca4..03b4af4ac09a 100644 --- a/include/asm-um/ptrace-x86_64.h +++ b/include/asm-um/ptrace-x86_64.h @@ -16,12 +16,15 @@ #define HOST_AUDIT_ARCH AUDIT_ARCH_X86_64 +/* Also defined in sysdep/ptrace.h, so may already be defined. */ +#ifndef FS_BASE #define FS_BASE (21 * sizeof(unsigned long)) #define GS_BASE (22 * sizeof(unsigned long)) #define DS (23 * sizeof(unsigned long)) #define ES (24 * sizeof(unsigned long)) #define FS (25 * sizeof(unsigned long)) #define GS (26 * sizeof(unsigned long)) +#endif #define PT_REGS_RBX(r) UPT_RBX(&(r)->regs) #define PT_REGS_RCX(r) UPT_RCX(&(r)->regs) diff --git a/include/asm-v850/unistd.h b/include/asm-v850/unistd.h index bcb44bfe577a..552b7c873a57 100644 --- a/include/asm-v850/unistd.h +++ b/include/asm-v850/unistd.h @@ -238,12 +238,13 @@ #ifdef __KERNEL__ #include <asm/clinkage.h> +#include <linux/err.h> #define __syscall_return(type, res) \ do { \ - /* user-visible error numbers are in the range -1 - -124: \ + /* user-visible error numbers are in the range -1 - -MAX_ERRNO: \ see <asm-v850/errno.h> */ \ - if (__builtin_expect ((unsigned long)(res) >= (unsigned long)(-125), 0)) { \ + if (__builtin_expect ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO), 0)) { \ errno = -(res); \ res = -1; \ } \ diff --git a/include/asm-x86_64/e820.h b/include/asm-x86_64/e820.h index e15d3c8628f3..fa2086774105 100644 --- a/include/asm-x86_64/e820.h +++ b/include/asm-x86_64/e820.h @@ -47,10 +47,9 @@ extern void e820_print_map(char *who); extern int e820_any_mapped(unsigned long start, unsigned long end, unsigned type); extern int e820_all_mapped(unsigned long start, unsigned long end, unsigned type); -extern void e820_bootmem_free(pg_data_t *pgdat, unsigned long start,unsigned long end); extern void e820_setup_gap(void); -extern unsigned long e820_hole_size(unsigned long start_pfn, - unsigned long end_pfn); +extern void e820_register_active_regions(int nid, + unsigned long start_pfn, unsigned long end_pfn); extern void finish_e820_parsing(void); diff --git a/include/asm-x86_64/proto.h b/include/asm-x86_64/proto.h index b73d0c76613c..c28fc2db2171 100644 --- a/include/asm-x86_64/proto.h +++ b/include/asm-x86_64/proto.h @@ -24,8 +24,6 @@ extern void mtrr_bp_init(void); #define mtrr_bp_init() do {} while (0) #endif extern void init_memory_mapping(unsigned long start, unsigned long end); -extern void size_zones(unsigned long *z, unsigned long *h, - unsigned long start_pfn, unsigned long end_pfn); extern void system_call(void); extern int kernel_syscall(void); diff --git a/include/asm-x86_64/spinlock.h b/include/asm-x86_64/spinlock.h index be7a9e629fb2..3daf5b005905 100644 --- a/include/asm-x86_64/spinlock.h +++ b/include/asm-x86_64/spinlock.h @@ -4,6 +4,7 @@ #include <asm/atomic.h> #include <asm/rwlock.h> #include <asm/page.h> +#include <asm/processor.h> /* * Your basic SMP spinlocks, allowing only a single CPU anywhere diff --git a/include/asm-x86_64/unistd.h b/include/asm-x86_64/unistd.h index eeb98c168e98..6137146516d3 100644 --- a/include/asm-x86_64/unistd.h +++ b/include/asm-x86_64/unistd.h @@ -623,16 +623,17 @@ __SYSCALL(__NR_move_pages, sys_move_pages) #ifdef __KERNEL__ #define __NR_syscall_max __NR_move_pages +#include <linux/err.h> #ifndef __NO_STUBS -/* user-visible error numbers are in the range -1 - -4095 */ +/* user-visible error numbers are in the range -1 - -MAX_ERRNO */ #define __syscall_clobber "r11","rcx","memory" #define __syscall_return(type, res) \ do { \ - if ((unsigned long)(res) >= (unsigned long)(-127)) { \ + if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \ errno = -(res); \ res = -1; \ } \ diff --git a/include/linux/aer.h b/include/linux/aer.h new file mode 100644 index 000000000000..402e178b38eb --- /dev/null +++ b/include/linux/aer.h @@ -0,0 +1,24 @@ +/* + * Copyright (C) 2006 Intel Corp. + * Tom Long Nguyen (tom.l.nguyen@intel.com) + * Zhang Yanmin (yanmin.zhang@intel.com) + */ + +#ifndef _AER_H_ +#define _AER_H_ + +#if defined(CONFIG_PCIEAER) +/* pci-e port driver needs this function to enable aer */ +extern int pci_enable_pcie_error_reporting(struct pci_dev *dev); +extern int pci_find_aer_capability(struct pci_dev *dev); +extern int pci_disable_pcie_error_reporting(struct pci_dev *dev); +extern int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev); +#else +#define pci_enable_pcie_error_reporting(dev) do { } while (0) +#define pci_find_aer_capability(dev) do { } while (0) +#define pci_disable_pcie_error_reporting(dev) do { } while (0) +#define pci_cleanup_aer_uncorrect_error_status(dev) do { } while (0) +#endif + +#endif //_AER_H_ + diff --git a/include/linux/cdev.h b/include/linux/cdev.h index 2216638962d2..ee5f53f2ca15 100644 --- a/include/linux/cdev.h +++ b/include/linux/cdev.h @@ -23,5 +23,7 @@ void cdev_del(struct cdev *); void cd_forget(struct inode *); +extern struct backing_dev_info directly_mappable_cdev_bdi; + #endif #endif diff --git a/include/linux/eisa.h b/include/linux/eisa.h index 4079242dced8..1ff7c1392525 100644 --- a/include/linux/eisa.h +++ b/include/linux/eisa.h @@ -3,8 +3,8 @@ #include <linux/ioport.h> #include <linux/device.h> +#include <linux/mod_devicetable.h> -#define EISA_SIG_LEN 8 #define EISA_MAX_SLOTS 8 #define EISA_MAX_RESOURCES 4 @@ -27,12 +27,6 @@ #define EISA_CONFIG_ENABLED 1 #define EISA_CONFIG_FORCED 2 -/* The EISA signature, in ASCII form, null terminated */ -struct eisa_device_id { - char sig[EISA_SIG_LEN]; - unsigned long driver_data; -}; - /* There is not much we can say about an EISA device, apart from * signature, slot number, and base address. dma_mask is set by * default to parent device mask..*/ diff --git a/include/linux/err.h b/include/linux/err.h index cd3b367f7445..1ab1d44f8d3b 100644 --- a/include/linux/err.h +++ b/include/linux/err.h @@ -15,6 +15,8 @@ */ #define MAX_ERRNO 4095 +#ifndef __ASSEMBLY__ + #define IS_ERR_VALUE(x) unlikely((x) >= (unsigned long)-MAX_ERRNO) static inline void *ERR_PTR(long error) @@ -32,4 +34,6 @@ static inline long IS_ERR(const void *ptr) return IS_ERR_VALUE((unsigned long)ptr); } +#endif + #endif /* _LINUX_ERR_H */ diff --git a/include/linux/ext3_fs.h b/include/linux/ext3_fs.h index 0eed918b3816..cc08f56750da 100644 --- a/include/linux/ext3_fs.h +++ b/include/linux/ext3_fs.h @@ -460,7 +460,7 @@ struct ext3_super_block { */ __u8 s_prealloc_blocks; /* Nr of blocks to try to preallocate*/ __u8 s_prealloc_dir_blocks; /* Nr to preallocate for dirs */ - __u16 s_reserved_gdt_blocks; /* Per group desc for online growth */ + __le16 s_reserved_gdt_blocks; /* Per group desc for online growth */ /* * Journaling support valid if EXT3_FEATURE_COMPAT_HAS_JOURNAL set. */ @@ -473,7 +473,7 @@ struct ext3_super_block { __u8 s_reserved_char_pad; __u16 s_reserved_word_pad; __le32 s_default_mount_opts; - __le32 s_first_meta_bg; /* First metablock block group */ + __le32 s_first_meta_bg; /* First metablock block group */ __u32 s_reserved[190]; /* Padding to the end of the block */ }; diff --git a/include/linux/ext3_fs_i.h b/include/linux/ext3_fs_i.h index 2f18b9511f21..4395e5206746 100644 --- a/include/linux/ext3_fs_i.h +++ b/include/linux/ext3_fs_i.h @@ -35,7 +35,7 @@ struct ext3_reserve_window { }; struct ext3_reserve_window_node { - struct rb_node rsv_node; + struct rb_node rsv_node; __u32 rsv_goal_size; __u32 rsv_alloc_hit; struct ext3_reserve_window rsv_window; diff --git a/include/linux/ext3_jbd.h b/include/linux/ext3_jbd.h index c8307c02dd07..ce0e6109aff0 100644 --- a/include/linux/ext3_jbd.h +++ b/include/linux/ext3_jbd.h @@ -23,7 +23,7 @@ /* Define the number of blocks we need to account to a transaction to * modify one block of data. - * + * * We may have to touch one inode, one bitmap buffer, up to three * indirection blocks, the group and superblock summaries, and the data * block to complete the transaction. */ @@ -88,16 +88,16 @@ #endif int -ext3_mark_iloc_dirty(handle_t *handle, +ext3_mark_iloc_dirty(handle_t *handle, struct inode *inode, struct ext3_iloc *iloc); -/* +/* * On success, We end up with an outstanding reference count against - * iloc->bh. This _must_ be cleaned up later. + * iloc->bh. This _must_ be cleaned up later. */ -int ext3_reserve_inode_write(handle_t *handle, struct inode *inode, +int ext3_reserve_inode_write(handle_t *handle, struct inode *inode, struct ext3_iloc *iloc); int ext3_mark_inode_dirty(handle_t *handle, struct inode *inode); diff --git a/include/linux/fs.h b/include/linux/fs.h index 1d3e601ece73..8f74dfbb2edd 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -512,7 +512,6 @@ struct inode { struct timespec i_mtime; struct timespec i_ctime; unsigned int i_blkbits; - unsigned long i_blksize; unsigned long i_version; blkcnt_t i_blocks; unsigned short i_bytes; @@ -528,11 +527,12 @@ struct inode { #ifdef CONFIG_QUOTA struct dquot *i_dquot[MAXQUOTAS]; #endif - /* These three should probably be a union */ struct list_head i_devices; - struct pipe_inode_info *i_pipe; - struct block_device *i_bdev; - struct cdev *i_cdev; + union { + struct pipe_inode_info *i_pipe; + struct block_device *i_bdev; + struct cdev *i_cdev; + }; int i_cindex; __u32 i_generation; @@ -554,9 +554,7 @@ struct inode { atomic_t i_writecount; void *i_security; - union { - void *generic_ip; - } u; + void *i_private; /* fs or device private pointer */ #ifdef __NEED_I_SIZE_ORDERED seqcount_t i_size_seqcount; #endif diff --git a/include/linux/gfp.h b/include/linux/gfp.h index 8b34aabfe4c6..bf2b6bc3f6fd 100644 --- a/include/linux/gfp.h +++ b/include/linux/gfp.h @@ -67,7 +67,12 @@ struct vm_area_struct; #define GFP_HIGHUSER (__GFP_WAIT | __GFP_IO | __GFP_FS | __GFP_HARDWALL | \ __GFP_HIGHMEM) +#ifdef CONFIG_NUMA #define GFP_THISNODE (__GFP_THISNODE | __GFP_NOWARN | __GFP_NORETRY) +#else +#define GFP_THISNODE 0 +#endif + /* Flag - indicates that the buffer will be suitable for DMA. Ignored on some platforms, used as appropriate on others */ diff --git a/include/linux/i2c-algo-bit.h b/include/linux/i2c-algo-bit.h index c0e7fab28ce3..c8f8df25c7e0 100644 --- a/include/linux/i2c-algo-bit.h +++ b/include/linux/i2c-algo-bit.h @@ -40,7 +40,6 @@ struct i2c_algo_bit_data { /* local settings */ int udelay; /* half-clock-cycle time in microsecs */ /* i.e. clock is (500 / udelay) KHz */ - int mdelay; /* in millisecs, unused */ int timeout; /* in jiffies */ }; diff --git a/include/linux/i2c-algo-pcf.h b/include/linux/i2c-algo-pcf.h index 18b0adf57a3d..9908f3fc4839 100644 --- a/include/linux/i2c-algo-pcf.h +++ b/include/linux/i2c-algo-pcf.h @@ -35,7 +35,6 @@ struct i2c_algo_pcf_data { /* local settings */ int udelay; - int mdelay; int timeout; }; diff --git a/include/linux/i2c-algo-sibyte.h b/include/linux/i2c-algo-sibyte.h deleted file mode 100644 index 03914ded8614..000000000000 --- a/include/linux/i2c-algo-sibyte.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Copyright (C) 2001,2002,2003 Broadcom Corporation - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - */ - -#ifndef I2C_ALGO_SIBYTE_H -#define I2C_ALGO_SIBYTE_H 1 - -#include <linux/i2c.h> - -struct i2c_algo_sibyte_data { - void *data; /* private data */ - int bus; /* which bus */ - void *reg_base; /* CSR base */ -}; - -int i2c_sibyte_add_bus(struct i2c_adapter *, int speed); -int i2c_sibyte_del_bus(struct i2c_adapter *); - -#endif /* I2C_ALGO_SIBYTE_H */ diff --git a/include/linux/i2c.h b/include/linux/i2c.h index eb0628a7ecc6..9b5d04768c2c 100644 --- a/include/linux/i2c.h +++ b/include/linux/i2c.h @@ -64,14 +64,6 @@ extern int i2c_master_recv(struct i2c_client *,char* ,int); */ extern int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num); -/* - * Some adapter types (i.e. PCF 8584 based ones) may support slave behaviuor. - * This is not tested/implemented yet and will change in the future. - */ -extern int i2c_slave_send(struct i2c_client *,char*,int); -extern int i2c_slave_recv(struct i2c_client *,char*,int); - - /* This is the very generalized SMBus access routine. You probably do not want to use this, though; one of the functions below may be much easier, @@ -201,10 +193,6 @@ struct i2c_algorithm { unsigned short flags, char read_write, u8 command, int size, union i2c_smbus_data * data); - /* --- these optional/future use for some adapter types.*/ - int (*slave_send)(struct i2c_adapter *,char*,int); - int (*slave_recv)(struct i2c_adapter *,char*,int); - /* --- ioctl like call to set div. parameters. */ int (*algo_control)(struct i2c_adapter *, unsigned int, unsigned long); @@ -220,7 +208,7 @@ struct i2c_adapter { struct module *owner; unsigned int id; unsigned int class; - struct i2c_algorithm *algo;/* the algorithm to access the bus */ + const struct i2c_algorithm *algo; /* the algorithm to access the bus */ void *algo_data; /* --- administration stuff. */ diff --git a/include/linux/init.h b/include/linux/init.h index 6667785dd1ff..e92b1455d7af 100644 --- a/include/linux/init.h +++ b/include/linux/init.h @@ -68,6 +68,7 @@ extern initcall_t __security_initcall_start[], __security_initcall_end[]; /* Defined in init/main.c */ extern char saved_command_line[]; +extern unsigned int reset_devices; /* used by init/main.c */ extern void setup_arch(char **); diff --git a/include/linux/jbd.h b/include/linux/jbd.h index a04c154c5207..a6d9daa38c6d 100644 --- a/include/linux/jbd.h +++ b/include/linux/jbd.h @@ -1,6 +1,6 @@ /* * linux/include/linux/jbd.h - * + * * Written by Stephen C. Tweedie <sct@redhat.com> * * Copyright 1998-2000 Red Hat, Inc --- All Rights Reserved @@ -64,7 +64,7 @@ extern int journal_enable_debug; if ((n) <= journal_enable_debug) { \ printk (KERN_DEBUG "(%s, %d): %s: ", \ __FILE__, __LINE__, __FUNCTION__); \ - printk (f, ## a); \ + printk (f, ## a); \ } \ } while (0) #else @@ -97,8 +97,8 @@ extern void jbd_slab_free(void *ptr, size_t size); * number of outstanding buffers possible at any time. When the * operation completes, any buffer credits not used are credited back to * the transaction, so that at all times we know how many buffers the - * outstanding updates on a transaction might possibly touch. - * + * outstanding updates on a transaction might possibly touch. + * * This is an opaque datatype. **/ typedef struct handle_s handle_t; /* Atomic operation type */ @@ -108,7 +108,7 @@ typedef struct handle_s handle_t; /* Atomic operation type */ * typedef journal_t - The journal_t maintains all of the journaling state information for a single filesystem. * * journal_t is linked to from the fs superblock structure. - * + * * We use the journal_t to keep track of all outstanding transaction * activity on the filesystem, and to manage the state of the log * writing process. @@ -128,7 +128,7 @@ typedef struct journal_s journal_t; /* Journal control structure */ * On-disk structures */ -/* +/* * Descriptor block types: */ @@ -149,8 +149,8 @@ typedef struct journal_header_s } journal_header_t; -/* - * The block tag: used to describe a single buffer in the journal +/* + * The block tag: used to describe a single buffer in the journal */ typedef struct journal_block_tag_s { @@ -158,9 +158,9 @@ typedef struct journal_block_tag_s __be32 t_flags; /* See below */ } journal_block_tag_t; -/* +/* * The revoke descriptor: used on disk to describe a series of blocks to - * be revoked from the log + * be revoked from the log */ typedef struct journal_revoke_header_s { @@ -201,9 +201,9 @@ typedef struct journal_superblock_s /* 0x0024 */ /* Remaining fields are only valid in a version-2 superblock */ - __be32 s_feature_compat; /* compatible feature set */ - __be32 s_feature_incompat; /* incompatible feature set */ - __be32 s_feature_ro_compat; /* readonly-compatible feature set */ + __be32 s_feature_compat; /* compatible feature set */ + __be32 s_feature_incompat; /* incompatible feature set */ + __be32 s_feature_ro_compat; /* readonly-compatible feature set */ /* 0x0030 */ __u8 s_uuid[16]; /* 128-bit uuid for journal */ @@ -374,10 +374,10 @@ struct jbd_revoke_table_s; **/ /* Docbook can't yet cope with the bit fields, but will leave the documentation - * in so it can be fixed later. + * in so it can be fixed later. */ -struct handle_s +struct handle_s { /* Which compound transaction is this update a part of? */ transaction_t *h_transaction; @@ -435,7 +435,7 @@ struct handle_s * */ -struct transaction_s +struct transaction_s { /* Pointer to the journal for this transaction. [no locking] */ journal_t *t_journal; @@ -455,7 +455,7 @@ struct transaction_s T_RUNDOWN, T_FLUSH, T_COMMIT, - T_FINISHED + T_FINISHED } t_state; /* @@ -569,7 +569,7 @@ struct transaction_s * journal_t. * @j_flags: General journaling state flags * @j_errno: Is there an outstanding uncleared error on the journal (from a - * prior abort)? + * prior abort)? * @j_sb_buffer: First part of superblock buffer * @j_superblock: Second part of superblock buffer * @j_format_version: Version of the superblock format @@ -583,7 +583,7 @@ struct transaction_s * @j_wait_transaction_locked: Wait queue for waiting for a locked transaction * to start committing, or for a barrier lock to be released * @j_wait_logspace: Wait queue for waiting for checkpointing to complete - * @j_wait_done_commit: Wait queue for waiting for commit to complete + * @j_wait_done_commit: Wait queue for waiting for commit to complete * @j_wait_checkpoint: Wait queue to trigger checkpointing * @j_wait_commit: Wait queue to trigger commit * @j_wait_updates: Wait queue to wait for updates to complete @@ -592,7 +592,7 @@ struct transaction_s * @j_tail: Journal tail - identifies the oldest still-used block in the * journal. * @j_free: Journal free - how many free blocks are there in the journal? - * @j_first: The block number of the first usable block + * @j_first: The block number of the first usable block * @j_last: The block number one beyond the last usable block * @j_dev: Device where we store the journal * @j_blocksize: blocksize for the location where we store the journal. @@ -604,12 +604,12 @@ struct transaction_s * @j_list_lock: Protects the buffer lists and internal buffer state. * @j_inode: Optional inode where we store the journal. If present, all journal * block numbers are mapped into this inode via bmap(). - * @j_tail_sequence: Sequence number of the oldest transaction in the log + * @j_tail_sequence: Sequence number of the oldest transaction in the log * @j_transaction_sequence: Sequence number of the next transaction to grant * @j_commit_sequence: Sequence number of the most recently committed * transaction * @j_commit_request: Sequence number of the most recent transaction wanting - * commit + * commit * @j_uuid: Uuid of client object. * @j_task: Pointer to the current commit thread for this journal * @j_max_transaction_buffers: Maximum number of metadata buffers to allow in a @@ -699,7 +699,7 @@ struct journal_s wait_queue_head_t j_wait_updates; /* Semaphore for locking against concurrent checkpoints */ - struct mutex j_checkpoint_mutex; + struct mutex j_checkpoint_mutex; /* * Journal head: identifies the first unused block in the journal. @@ -732,7 +732,7 @@ struct journal_s */ struct block_device *j_dev; int j_blocksize; - unsigned int j_blk_offset; + unsigned long j_blk_offset; /* * Device which holds the client fs. For internal journal this will be @@ -823,8 +823,8 @@ struct journal_s void *j_private; }; -/* - * Journal flag definitions +/* + * Journal flag definitions */ #define JFS_UNMOUNT 0x001 /* Journal thread is being destroyed */ #define JFS_ABORT 0x002 /* Journaling has been aborted for errors. */ @@ -833,7 +833,7 @@ struct journal_s #define JFS_LOADED 0x010 /* The journal superblock has been loaded */ #define JFS_BARRIER 0x020 /* Use IDE barriers */ -/* +/* * Function declarations for the journaling transaction and buffer * management */ @@ -862,11 +862,11 @@ int __journal_remove_checkpoint(struct journal_head *); void __journal_insert_checkpoint(struct journal_head *, transaction_t *); /* Buffer IO */ -extern int +extern int journal_write_metadata_buffer(transaction_t *transaction, struct journal_head *jh_in, struct journal_head **jh_out, - int blocknr); + unsigned long blocknr); /* Transaction locking */ extern void __wait_on_journal (journal_t *); @@ -890,7 +890,7 @@ static inline handle_t *journal_current_handle(void) /* The journaling code user interface: * * Create and destroy handles - * Register buffer modifications against the current transaction. + * Register buffer modifications against the current transaction. */ extern handle_t *journal_start(journal_t *, int nblocks); @@ -917,11 +917,11 @@ extern journal_t * journal_init_dev(struct block_device *bdev, int start, int len, int bsize); extern journal_t * journal_init_inode (struct inode *); extern int journal_update_format (journal_t *); -extern int journal_check_used_features +extern int journal_check_used_features (journal_t *, unsigned long, unsigned long, unsigned long); -extern int journal_check_available_features +extern int journal_check_available_features (journal_t *, unsigned long, unsigned long, unsigned long); -extern int journal_set_features +extern int journal_set_features (journal_t *, unsigned long, unsigned long, unsigned long); extern int journal_create (journal_t *); extern int journal_load (journal_t *journal); @@ -1015,7 +1015,7 @@ do { \ * bit, when set, indicates that we have had a fatal error somewhere, * either inside the journaling layer or indicated to us by the client * (eg. ext3), and that we and should not commit any further - * transactions. + * transactions. */ static inline int is_journal_aborted(journal_t *journal) @@ -1082,7 +1082,7 @@ static inline int jbd_space_needed(journal_t *journal) #define BJ_Reserved 7 /* Buffer is reserved for access by journal */ #define BJ_Locked 8 /* Locked for I/O during commit */ #define BJ_Types 9 - + extern int jbd_blocks_per_page(struct inode *inode); #ifdef __KERNEL__ diff --git a/include/linux/kernel.h b/include/linux/kernel.h index 4fa373bb18ac..4d00988dad03 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -350,4 +350,11 @@ struct sysinfo { /* Trap pasters of __FUNCTION__ at compile-time */ #define __FUNCTION__ (__func__) +/* This helps us to avoid #ifdef CONFIG_NUMA */ +#ifdef CONFIG_NUMA +#define NUMA_BUILD 1 +#else +#define NUMA_BUILD 0 +#endif + #endif diff --git a/include/linux/mm.h b/include/linux/mm.h index 856f0ee7e84a..7b703b6d4358 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -16,6 +16,7 @@ #include <linux/mutex.h> #include <linux/debug_locks.h> #include <linux/backing-dev.h> +#include <linux/mm_types.h> struct mempolicy; struct anon_vma; @@ -198,6 +199,7 @@ struct vm_operations_struct { void (*open)(struct vm_area_struct * area); void (*close)(struct vm_area_struct * area); struct page * (*nopage)(struct vm_area_struct * area, unsigned long address, int *type); + unsigned long (*nopfn)(struct vm_area_struct * area, unsigned long address); int (*populate)(struct vm_area_struct * area, unsigned long address, unsigned long len, pgprot_t prot, unsigned long pgoff, int nonblock); /* notification that a previously read-only page is about to become @@ -215,62 +217,6 @@ struct vm_operations_struct { struct mmu_gather; struct inode; -/* - * Each physical page in the system has a struct page associated with - * it to keep track of whatever it is we are using the page for at the - * moment. Note that we have no way to track which tasks are using - * a page, though if it is a pagecache page, rmap structures can tell us - * who is mapping it. - */ -struct page { - unsigned long flags; /* Atomic flags, some possibly - * updated asynchronously */ - atomic_t _count; /* Usage count, see below. */ - atomic_t _mapcount; /* Count of ptes mapped in mms, - * to show when page is mapped - * & limit reverse map searches. - */ - union { - struct { - unsigned long private; /* Mapping-private opaque data: - * usually used for buffer_heads - * if PagePrivate set; used for - * swp_entry_t if PageSwapCache; - * indicates order in the buddy - * system if PG_buddy is set. - */ - struct address_space *mapping; /* If low bit clear, points to - * inode address_space, or NULL. - * If page mapped as anonymous - * memory, low bit is set, and - * it points to anon_vma object: - * see PAGE_MAPPING_ANON below. - */ - }; -#if NR_CPUS >= CONFIG_SPLIT_PTLOCK_CPUS - spinlock_t ptl; -#endif - }; - pgoff_t index; /* Our offset within mapping. */ - struct list_head lru; /* Pageout list, eg. active_list - * protected by zone->lru_lock ! - */ - /* - * On machines where all RAM is mapped into kernel address space, - * we can simply calculate the virtual address. On machines with - * highmem some memory is mapped into kernel virtual memory - * dynamically, so we need a place to store that address. - * Note that this field could be 16 bits on x86 ... ;) - * - * Architectures with slow multiplication can define - * WANT_PAGE_VIRTUAL in asm/page.h - */ -#if defined(WANT_PAGE_VIRTUAL) - void *virtual; /* Kernel virtual address (NULL if - not kmapped, ie. highmem) */ -#endif /* WANT_PAGE_VIRTUAL */ -}; - #define page_private(page) ((page)->private) #define set_page_private(page, v) ((page)->private = (v)) @@ -501,7 +447,11 @@ static inline struct zone *page_zone(struct page *page) static inline unsigned long zone_to_nid(struct zone *zone) { - return zone->zone_pgdat->node_id; +#ifdef CONFIG_NUMA + return zone->node; +#else + return 0; +#endif } static inline unsigned long page_to_nid(struct page *page) @@ -546,11 +496,6 @@ static inline void set_page_links(struct page *page, enum zone_type zone, */ #include <linux/vmstat.h> -#ifndef CONFIG_DISCONTIGMEM -/* The array of struct pages - for discontigmem use pgdat->lmem_map */ -extern struct page *mem_map; -#endif - static __always_inline void *lowmem_page_address(struct page *page) { return __va(page_to_pfn(page) << PAGE_SHIFT); @@ -650,6 +595,12 @@ static inline int page_mapped(struct page *page) #define NOPAGE_OOM ((struct page *) (-1)) /* + * Error return values for the *_nopfn functions + */ +#define NOPFN_SIGBUS ((unsigned long) -1) +#define NOPFN_OOM ((unsigned long) -2) + +/* * Different kinds of faults, as returned by handle_mm_fault(). * Used to decide whether a process gets delivered SIGBUS or * just gets major/minor fault counters bumped up. @@ -937,6 +888,56 @@ extern void free_area_init(unsigned long * zones_size); extern void free_area_init_node(int nid, pg_data_t *pgdat, unsigned long * zones_size, unsigned long zone_start_pfn, unsigned long *zholes_size); +#ifdef CONFIG_ARCH_POPULATES_NODE_MAP +/* + * With CONFIG_ARCH_POPULATES_NODE_MAP set, an architecture may initialise its + * zones, allocate the backing mem_map and account for memory holes in a more + * architecture independent manner. This is a substitute for creating the + * zone_sizes[] and zholes_size[] arrays and passing them to + * free_area_init_node() + * + * An architecture is expected to register range of page frames backed by + * physical memory with add_active_range() before calling + * free_area_init_nodes() passing in the PFN each zone ends at. At a basic + * usage, an architecture is expected to do something like + * + * unsigned long max_zone_pfns[MAX_NR_ZONES] = {max_dma, max_normal_pfn, + * max_highmem_pfn}; + * for_each_valid_physical_page_range() + * add_active_range(node_id, start_pfn, end_pfn) + * free_area_init_nodes(max_zone_pfns); + * + * If the architecture guarantees that there are no holes in the ranges + * registered with add_active_range(), free_bootmem_active_regions() + * will call free_bootmem_node() for each registered physical page range. + * Similarly sparse_memory_present_with_active_regions() calls + * memory_present() for each range when SPARSEMEM is enabled. + * + * See mm/page_alloc.c for more information on each function exposed by + * CONFIG_ARCH_POPULATES_NODE_MAP + */ +extern void free_area_init_nodes(unsigned long *max_zone_pfn); +extern void add_active_range(unsigned int nid, unsigned long start_pfn, + unsigned long end_pfn); +extern void shrink_active_range(unsigned int nid, unsigned long old_end_pfn, + unsigned long new_end_pfn); +extern void push_node_boundaries(unsigned int nid, unsigned long start_pfn, + unsigned long end_pfn); +extern void remove_all_active_ranges(void); +extern unsigned long absent_pages_in_range(unsigned long start_pfn, + unsigned long end_pfn); +extern void get_pfn_range_for_nid(unsigned int nid, + unsigned long *start_pfn, unsigned long *end_pfn); +extern unsigned long find_min_pfn_with_active_regions(void); +extern unsigned long find_max_pfn_with_active_regions(void); +extern void free_bootmem_with_active_regions(int nid, + unsigned long max_low_pfn); +extern void sparse_memory_present_with_active_regions(int nid); +#ifndef CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID +extern int early_pfn_to_nid(unsigned long pfn); +#endif /* CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID */ +#endif /* CONFIG_ARCH_POPULATES_NODE_MAP */ +extern void set_dma_reserve(unsigned long new_dma_reserve); extern void memmap_init_zone(unsigned long, int, unsigned long, unsigned long); extern void setup_per_zone_pages_min(void); extern void mem_init(void); @@ -1130,7 +1131,7 @@ void drop_slab(void); extern int randomize_va_space; #endif -const char *arch_vma_name(struct vm_area_struct *vma); +__attribute__((weak)) const char *arch_vma_name(struct vm_area_struct *vma); #endif /* __KERNEL__ */ #endif /* _LINUX_MM_H */ diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h new file mode 100644 index 000000000000..c3852fd4a1cc --- /dev/null +++ b/include/linux/mm_types.h @@ -0,0 +1,67 @@ +#ifndef _LINUX_MM_TYPES_H +#define _LINUX_MM_TYPES_H + +#include <linux/types.h> +#include <linux/threads.h> +#include <linux/list.h> +#include <linux/spinlock.h> + +struct address_space; + +/* + * Each physical page in the system has a struct page associated with + * it to keep track of whatever it is we are using the page for at the + * moment. Note that we have no way to track which tasks are using + * a page, though if it is a pagecache page, rmap structures can tell us + * who is mapping it. + */ +struct page { + unsigned long flags; /* Atomic flags, some possibly + * updated asynchronously */ + atomic_t _count; /* Usage count, see below. */ + atomic_t _mapcount; /* Count of ptes mapped in mms, + * to show when page is mapped + * & limit reverse map searches. + */ + union { + struct { + unsigned long private; /* Mapping-private opaque data: + * usually used for buffer_heads + * if PagePrivate set; used for + * swp_entry_t if PageSwapCache; + * indicates order in the buddy + * system if PG_buddy is set. + */ + struct address_space *mapping; /* If low bit clear, points to + * inode address_space, or NULL. + * If page mapped as anonymous + * memory, low bit is set, and + * it points to anon_vma object: + * see PAGE_MAPPING_ANON below. + */ + }; +#if NR_CPUS >= CONFIG_SPLIT_PTLOCK_CPUS + spinlock_t ptl; +#endif + }; + pgoff_t index; /* Our offset within mapping. */ + struct list_head lru; /* Pageout list, eg. active_list + * protected by zone->lru_lock ! + */ + /* + * On machines where all RAM is mapped into kernel address space, + * we can simply calculate the virtual address. On machines with + * highmem some memory is mapped into kernel virtual memory + * dynamically, so we need a place to store that address. + * Note that this field could be 16 bits on x86 ... ;) + * + * Architectures with slow multiplication can define + * WANT_PAGE_VIRTUAL in asm/page.h + */ +#if defined(WANT_PAGE_VIRTUAL) + void *virtual; /* Kernel virtual address (NULL if + not kmapped, ie. highmem) */ +#endif /* WANT_PAGE_VIRTUAL */ +}; + +#endif /* _LINUX_MM_TYPES_H */ diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h index 3693f1a52788..59855b8718a0 100644 --- a/include/linux/mmzone.h +++ b/include/linux/mmzone.h @@ -58,6 +58,7 @@ enum zone_stat_item { NR_WRITEBACK, NR_UNSTABLE_NFS, /* NFS unstable pages */ NR_BOUNCE, + NR_VMSCAN_WRITE, #ifdef CONFIG_NUMA NUMA_HIT, /* allocated in intended node */ NUMA_MISS, /* allocated in non intended node */ @@ -167,6 +168,7 @@ struct zone { unsigned long lowmem_reserve[MAX_NR_ZONES]; #ifdef CONFIG_NUMA + int node; /* * zone reclaim becomes active if more unmapped pages exist. */ @@ -305,6 +307,18 @@ struct zonelist { struct zone *zones[MAX_NUMNODES * MAX_NR_ZONES + 1]; // NULL delimited }; +#ifdef CONFIG_ARCH_POPULATES_NODE_MAP +struct node_active_region { + unsigned long start_pfn; + unsigned long end_pfn; + int nid; +}; +#endif /* CONFIG_ARCH_POPULATES_NODE_MAP */ + +#ifndef CONFIG_DISCONTIGMEM +/* The array of struct pages - for discontigmem use pgdat->lmem_map */ +extern struct page *mem_map; +#endif /* * The pg_data_t structure is used in machines with CONFIG_DISCONTIGMEM @@ -518,7 +532,8 @@ extern struct zone *next_zone(struct zone *zone); #endif -#ifndef CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID +#if !defined(CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID) && \ + !defined(CONFIG_ARCH_POPULATES_NODE_MAP) #define early_pfn_to_nid(nid) (0UL) #endif diff --git a/include/linux/mod_devicetable.h b/include/linux/mod_devicetable.h index f7ca0b09075d..e0c393cc7240 100644 --- a/include/linux/mod_devicetable.h +++ b/include/linux/mod_devicetable.h @@ -308,4 +308,16 @@ struct input_device_id { kernel_ulong_t driver_info; }; +/* EISA */ + +#define EISA_SIG_LEN 8 + +/* The EISA signature, in ASCII form, null terminated */ +struct eisa_device_id { + char sig[EISA_SIG_LEN]; + kernel_ulong_t driver_data; +}; + +#define EISA_DEVICE_MODALIAS_FMT "eisa:s%s" + #endif /* LINUX_MOD_DEVICETABLE_H */ diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h index 36f5bcf513b0..98c9b9f667a5 100644 --- a/include/linux/nfs_fs.h +++ b/include/linux/nfs_fs.h @@ -315,10 +315,6 @@ extern void nfs_end_data_update(struct inode *); extern struct nfs_open_context *get_nfs_open_context(struct nfs_open_context *ctx); extern void put_nfs_open_context(struct nfs_open_context *ctx); extern struct nfs_open_context *nfs_find_open_context(struct inode *inode, struct rpc_cred *cred, int mode); -extern struct vfsmount *nfs_do_submount(const struct vfsmount *mnt_parent, - const struct dentry *dentry, - struct nfs_fh *fh, - struct nfs_fattr *fattr); /* linux/net/ipv4/ipconfig.c: trims ip addr off front of name, too. */ extern u32 root_nfs_parse_addr(char *name); /*__init*/ diff --git a/include/linux/nfsd/nfsfh.h b/include/linux/nfsd/nfsfh.h index f9edcd2ff3c8..31a3cb617ce0 100644 --- a/include/linux/nfsd/nfsfh.h +++ b/include/linux/nfsd/nfsfh.h @@ -269,14 +269,8 @@ fill_post_wcc(struct svc_fh *fhp) fhp->fh_post_uid = inode->i_uid; fhp->fh_post_gid = inode->i_gid; fhp->fh_post_size = inode->i_size; - if (inode->i_blksize) { - fhp->fh_post_blksize = inode->i_blksize; - fhp->fh_post_blocks = inode->i_blocks; - } else { - fhp->fh_post_blksize = BLOCK_SIZE; - /* how much do we care for accuracy with MinixFS? */ - fhp->fh_post_blocks = (inode->i_size+511) >> 9; - } + fhp->fh_post_blksize = BLOCK_SIZE; + fhp->fh_post_blocks = inode->i_blocks; fhp->fh_post_rdev[0] = htonl((u32)imajor(inode)); fhp->fh_post_rdev[1] = htonl((u32)iminor(inode)); fhp->fh_post_atime = inode->i_atime; diff --git a/include/linux/pci.h b/include/linux/pci.h index 3ec72551ac31..5c3a4176eb64 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -356,6 +356,8 @@ struct pci_driver { struct pci_error_handlers *err_handler; struct device_driver driver; struct pci_dynids dynids; + + int multithread_probe; }; #define to_pci_driver(drv) container_of(drv,struct pci_driver, driver) @@ -431,7 +433,7 @@ int pci_scan_slot(struct pci_bus *bus, int devfn); struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn); void pci_device_add(struct pci_dev *dev, struct pci_bus *bus); unsigned int pci_scan_child_bus(struct pci_bus *bus); -void pci_bus_add_device(struct pci_dev *dev); +int __must_check pci_bus_add_device(struct pci_dev *dev); void pci_read_bridge_bases(struct pci_bus *child); struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res); int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge); @@ -439,6 +441,7 @@ extern struct pci_dev *pci_dev_get(struct pci_dev *dev); extern void pci_dev_put(struct pci_dev *dev); extern void pci_remove_bus(struct pci_bus *b); extern void pci_remove_bus_device(struct pci_dev *dev); +extern void pci_stop_bus_device(struct pci_dev *dev); void pci_setup_cardbus(struct pci_bus *bus); /* Generic PCI functions exported to card drivers */ diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 6a1e09834559..ab032ceafa84 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -1411,6 +1411,7 @@ #define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009 #define PCI_DEVICE_ID_SERVERWORKS_GCNB_LE 0x0017 #define PCI_DEVICE_ID_SERVERWORKS_EPB 0x0103 +#define PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE 0x0132 #define PCI_DEVICE_ID_SERVERWORKS_OSB4 0x0200 #define PCI_DEVICE_ID_SERVERWORKS_CSB5 0x0201 #define PCI_DEVICE_ID_SERVERWORKS_CSB6 0x0203 @@ -1482,9 +1483,6 @@ #define PCI_DEVICE_ID_MARVELL_GT64260 0x6430 #define PCI_DEVICE_ID_MARVELL_MV64360 0x6460 #define PCI_DEVICE_ID_MARVELL_MV64460 0x6480 -#define PCI_DEVICE_ID_MARVELL_GT96100 0x9652 -#define PCI_DEVICE_ID_MARVELL_GT96100A 0x9653 - #define PCI_VENDOR_ID_V3 0x11b0 #define PCI_DEVICE_ID_V3_V960 0x0001 diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index 96930cb5927c..7d0e26cba420 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h @@ -196,7 +196,7 @@ #define PCI_CAP_ID_MSI 0x05 /* Message Signalled Interrupts */ #define PCI_CAP_ID_CHSWP 0x06 /* CompactPCI HotSwap */ #define PCI_CAP_ID_PCIX 0x07 /* PCI-X */ -#define PCI_CAP_ID_HT_IRQCONF 0x08 /* HyperTransport IRQ Configuration */ +#define PCI_CAP_ID_HT 0x08 /* HyperTransport */ #define PCI_CAP_ID_VNDR 0x09 /* Vendor specific capability */ #define PCI_CAP_ID_SHPC 0x0C /* PCI Standard Hot-Plug Controller */ #define PCI_CAP_ID_EXP 0x10 /* PCI Express */ diff --git a/include/linux/pcieport_if.h b/include/linux/pcieport_if.h index b44e01a70914..6cd91e3f9820 100644 --- a/include/linux/pcieport_if.h +++ b/include/linux/pcieport_if.h @@ -62,6 +62,12 @@ struct pcie_port_service_driver { int (*suspend) (struct pcie_device *dev, pm_message_t state); int (*resume) (struct pcie_device *dev); + /* Service Error Recovery Handler */ + struct pci_error_handlers *err_handler; + + /* Link Reset Capability - AER service driver specific */ + pci_ers_result_t (*reset_link) (struct pci_dev *dev); + const struct pcie_port_service_id *id_table; struct device_driver driver; }; diff --git a/include/linux/pid.h b/include/linux/pid.h index 29960b03bef7..93da7e2d9f30 100644 --- a/include/linux/pid.h +++ b/include/linux/pid.h @@ -76,6 +76,8 @@ extern int FASTCALL(attach_pid(struct task_struct *task, enum pid_type type, int nr)); extern void FASTCALL(detach_pid(struct task_struct *task, enum pid_type)); +extern void FASTCALL(transfer_pid(struct task_struct *old, + struct task_struct *new, enum pid_type)); /* * look up a PID in the hash table. Must be called with the tasklist_lock diff --git a/include/linux/proc_fs.h b/include/linux/proc_fs.h index 3435ca38dd14..57f70bc8b24b 100644 --- a/include/linux/proc_fs.h +++ b/include/linux/proc_fs.h @@ -268,7 +268,9 @@ static inline struct proc_dir_entry *PDE(const struct inode *inode) struct proc_maps_private { struct pid *pid; struct task_struct *task; +#ifdef CONFIG_MMU struct vm_area_struct *tail_vma; +#endif }; #endif /* _LINUX_PROC_FS_H */ diff --git a/include/linux/slab.h b/include/linux/slab.h index 66d6eb78d1c6..a96fd9310d55 100644 --- a/include/linux/slab.h +++ b/include/linux/slab.h @@ -60,7 +60,7 @@ extern void __init kmem_cache_init(void); extern kmem_cache_t *kmem_cache_create(const char *, size_t, size_t, unsigned long, void (*)(void *, kmem_cache_t *, unsigned long), void (*)(void *, kmem_cache_t *, unsigned long)); -extern int kmem_cache_destroy(kmem_cache_t *); +extern void kmem_cache_destroy(kmem_cache_t *); extern int kmem_cache_shrink(kmem_cache_t *); extern void *kmem_cache_alloc(kmem_cache_t *, gfp_t); extern void *kmem_cache_zalloc(struct kmem_cache *, gfp_t); @@ -249,7 +249,7 @@ struct kmem_cache *kmem_cache_create(const char *c, size_t, size_t, unsigned long, void (*)(void *, struct kmem_cache *, unsigned long), void (*)(void *, struct kmem_cache *, unsigned long)); -int kmem_cache_destroy(struct kmem_cache *c); +void kmem_cache_destroy(struct kmem_cache *c); void *kmem_cache_alloc(struct kmem_cache *c, gfp_t flags); void *kmem_cache_zalloc(struct kmem_cache *, gfp_t); void kmem_cache_free(struct kmem_cache *c, void *b); diff --git a/include/linux/smb.h b/include/linux/smb.h index 6df3b1501559..f098dff93f6b 100644 --- a/include/linux/smb.h +++ b/include/linux/smb.h @@ -89,7 +89,6 @@ struct smb_fattr { struct timespec f_atime; struct timespec f_mtime; struct timespec f_ctime; - unsigned long f_blksize; unsigned long f_blocks; int f_unix; }; diff --git a/include/linux/uaccess.h b/include/linux/uaccess.h index 391e7ed1eb3f..a48d7f11c7be 100644 --- a/include/linux/uaccess.h +++ b/include/linux/uaccess.h @@ -19,4 +19,26 @@ static inline unsigned long __copy_from_user_nocache(void *to, #endif /* ARCH_HAS_NOCACHE_UACCESS */ +/** + * probe_kernel_address(): safely attempt to read from a location + * @addr: address to read from - its type is type typeof(retval)* + * @retval: read into this variable + * + * Safely read from address @addr into variable @revtal. If a kernel fault + * happens, handle that and return -EFAULT. + * We ensure that the __get_user() is executed in atomic context so that + * do_page_fault() doesn't attempt to take mmap_sem. This makes + * probe_kernel_address() suitable for use within regions where the caller + * already holds mmap_sem, or other locks which nest inside mmap_sem. + */ +#define probe_kernel_address(addr, retval) \ + ({ \ + long ret; \ + \ + inc_preempt_count(); \ + ret = __get_user(retval, addr); \ + dec_preempt_count(); \ + ret; \ + }) + #endif /* __LINUX_UACCESS_H__ */ diff --git a/include/linux/vmalloc.h b/include/linux/vmalloc.h index dee88c6b6fa7..ce5f1482e6be 100644 --- a/include/linux/vmalloc.h +++ b/include/linux/vmalloc.h @@ -62,7 +62,6 @@ extern struct vm_struct *__get_vm_area(unsigned long size, unsigned long flags, extern struct vm_struct *get_vm_area_node(unsigned long size, unsigned long flags, int node); extern struct vm_struct *remove_vm_area(void *addr); -extern struct vm_struct *__remove_vm_area(void *addr); extern int map_vm_area(struct vm_struct *area, pgprot_t prot, struct page ***pages); extern void unmap_vm_area(struct vm_struct *area); |
