diff options
Diffstat (limited to 'include/linux/mfd/wm8994')
| -rw-r--r-- | include/linux/mfd/wm8994/core.h | 7 | ||||
| -rw-r--r-- | include/linux/mfd/wm8994/pdata.h | 31 | ||||
| -rw-r--r-- | include/linux/mfd/wm8994/registers.h | 112 |
3 files changed, 145 insertions, 5 deletions
diff --git a/include/linux/mfd/wm8994/core.h b/include/linux/mfd/wm8994/core.h index f44bdb7273bd..9eff2a351ec5 100644 --- a/include/linux/mfd/wm8994/core.h +++ b/include/linux/mfd/wm8994/core.h @@ -15,6 +15,7 @@ #ifndef __MFD_WM8994_CORE_H__ #define __MFD_WM8994_CORE_H__ +#include <linux/mutex.h> #include <linux/interrupt.h> enum wm8994_type { @@ -55,6 +56,7 @@ struct wm8994 { struct mutex irq_lock; enum wm8994_type type; + int revision; struct device *dev; struct regmap *regmap; @@ -65,13 +67,10 @@ struct wm8994 { int irq_base; int irq; - u16 irq_masks_cur[WM8994_NUM_IRQ_REGS]; - u16 irq_masks_cache[WM8994_NUM_IRQ_REGS]; + struct regmap_irq_chip_data *irq_data; /* Used over suspend/resume */ bool suspended; - u16 ldo_regs[WM8994_NUM_LDO_REGS]; - u16 gpio_regs[WM8994_NUM_GPIO_REGS]; struct regulator_dev *dbvdd; int num_supplies; diff --git a/include/linux/mfd/wm8994/pdata.h b/include/linux/mfd/wm8994/pdata.h index ea32f306dca6..3fb1f407d5e6 100644 --- a/include/linux/mfd/wm8994/pdata.h +++ b/include/linux/mfd/wm8994/pdata.h @@ -23,7 +23,7 @@ struct wm8994_ldo_pdata { int enable; const char *supply; - struct regulator_init_data *init_data; + const struct regulator_init_data *init_data; }; #define WM8994_CONFIGURE_GPIO 0x10000 @@ -113,6 +113,23 @@ struct wm8958_enh_eq_cfg { u16 regs[WM8958_ENH_EQ_REGS]; }; +/** + * Microphone detection rates, used to tune response rates and power + * consumption for WM8958/WM1811 microphone detection. + * + * @sysclk: System clock rate to use this configuration for. + * @idle: True if this configuration should use when no accessory is detected, + * false otherwise. + * @start: Value for MICD_BIAS_START_TIME register field (not shifted). + * @rate: Value for MICD_RATE register field (not shifted). + */ +struct wm8958_micd_rate { + int sysclk; + bool idle; + int start; + int rate; +}; + struct wm8994_pdata { int gpio_base; @@ -144,6 +161,9 @@ struct wm8994_pdata { int num_enh_eq_cfgs; struct wm8958_enh_eq_cfg *enh_eq_cfgs; + int num_micd_rates; + struct wm8958_micd_rate *micd_rates; + /* LINEOUT can be differential or single ended */ unsigned int lineout1_diff:1; unsigned int lineout2_diff:1; @@ -168,12 +188,21 @@ struct wm8994_pdata { /* WM8958 microphone bias configuration */ int micbias[2]; + /* WM8958 microphone detection ranges */ + u16 micd_lvl_sel; + /* Disable the internal pull downs on the LDOs if they are * always driven (eg, connected to an always on supply or * GPIO that always drives an output. If they float power * consumption will rise. */ bool ldo_ena_always_driven; + + /* + * SPKMODE must be pulled internally by the device on this + * system. + */ + bool spkmode_pu; }; #endif diff --git a/include/linux/mfd/wm8994/registers.h b/include/linux/mfd/wm8994/registers.h index 83a9caec0e43..86e6a032a078 100644 --- a/include/linux/mfd/wm8994/registers.h +++ b/include/linux/mfd/wm8994/registers.h @@ -95,11 +95,15 @@ #define WM8994_FLL1_CONTROL_3 0x222 #define WM8994_FLL1_CONTROL_4 0x223 #define WM8994_FLL1_CONTROL_5 0x224 +#define WM8958_FLL1_EFS_1 0x226 +#define WM8958_FLL1_EFS_2 0x227 #define WM8994_FLL2_CONTROL_1 0x240 #define WM8994_FLL2_CONTROL_2 0x241 #define WM8994_FLL2_CONTROL_3 0x242 #define WM8994_FLL2_CONTROL_4 0x243 #define WM8994_FLL2_CONTROL_5 0x244 +#define WM8958_FLL2_EFS_1 0x246 +#define WM8958_FLL2_EFS_2 0x247 #define WM8994_AIF1_CONTROL_1 0x300 #define WM8994_AIF1_CONTROL_2 0x301 #define WM8994_AIF1_MASTER_SLAVE 0x302 @@ -116,6 +120,7 @@ #define WM8994_AIF2DAC_LRCLK 0x315 #define WM8994_AIF2DAC_DATA 0x316 #define WM8994_AIF2ADC_DATA 0x317 +#define WM1811_AIF2TX_CONTROL 0x318 #define WM8958_AIF3_CONTROL_1 0x320 #define WM8958_AIF3_CONTROL_2 0x321 #define WM8958_AIF3DAC_DATA 0x322 @@ -166,6 +171,7 @@ #define WM8994_AIF1_DAC1_EQ_BAND_5_A 0x491 #define WM8994_AIF1_DAC1_EQ_BAND_5_B 0x492 #define WM8994_AIF1_DAC1_EQ_BAND_5_PG 0x493 +#define WM8994_AIF1_DAC1_EQ_BAND_1_C 0x494 #define WM8994_AIF1_DAC2_EQ_GAINS_1 0x4A0 #define WM8994_AIF1_DAC2_EQ_GAINS_2 0x4A1 #define WM8994_AIF1_DAC2_EQ_BAND_1_A 0x4A2 @@ -186,6 +192,7 @@ #define WM8994_AIF1_DAC2_EQ_BAND_5_A 0x4B1 #define WM8994_AIF1_DAC2_EQ_BAND_5_B 0x4B2 #define WM8994_AIF1_DAC2_EQ_BAND_5_PG 0x4B3 +#define WM8994_AIF1_DAC2_EQ_BAND_1_C 0x4B4 #define WM8994_AIF2_ADC_LEFT_VOLUME 0x500 #define WM8994_AIF2_ADC_RIGHT_VOLUME 0x501 #define WM8994_AIF2_DAC_LEFT_VOLUME 0x502 @@ -219,6 +226,7 @@ #define WM8994_AIF2_EQ_BAND_5_A 0x591 #define WM8994_AIF2_EQ_BAND_5_B 0x592 #define WM8994_AIF2_EQ_BAND_5_PG 0x593 +#define WM8994_AIF2_EQ_BAND_1_C 0x594 #define WM8994_DAC1_MIXER_VOLUMES 0x600 #define WM8994_DAC1_LEFT_MIXER_ROUTING 0x601 #define WM8994_DAC1_RIGHT_MIXER_ROUTING 0x602 @@ -242,6 +250,7 @@ #define WM8994_GPIO_4 0x703 #define WM8994_GPIO_5 0x704 #define WM8994_GPIO_6 0x705 +#define WM1811_JACKDET_CTRL 0x705 #define WM8994_GPIO_7 0x706 #define WM8994_GPIO_8 0x707 #define WM8994_GPIO_9 0x708 @@ -264,7 +273,43 @@ #define WM8958_DSP2_RELEASETIME 0xA03 #define WM8958_DSP2_VERMAJMIN 0xA04 #define WM8958_DSP2_VERBUILD 0xA05 +#define WM8958_DSP2_TESTREG 0xA06 +#define WM8958_DSP2_XORREG 0xA07 +#define WM8958_DSP2_SHIFTMAXX 0xA08 +#define WM8958_DSP2_SHIFTMAXY 0xA09 +#define WM8958_DSP2_SHIFTMAXZ 0xA0A +#define WM8958_DSP2_SHIFTMAXEXTLO 0xA0B +#define WM8958_DSP2_AESSELECT 0xA0C #define WM8958_DSP2_EXECCONTROL 0xA0D +#define WM8958_DSP2_SAMPLEBREAK 0xA0E +#define WM8958_DSP2_COUNTBREAK 0xA0F +#define WM8958_DSP2_INTSTATUS 0xA10 +#define WM8958_DSP2_EVENTSTATUS 0xA11 +#define WM8958_DSP2_INTMASK 0xA12 +#define WM8958_DSP2_CONFIGDWIDTH 0xA13 +#define WM8958_DSP2_CONFIGINSTR 0xA14 +#define WM8958_DSP2_CONFIGDMEM 0xA15 +#define WM8958_DSP2_CONFIGDELAYS 0xA16 +#define WM8958_DSP2_CONFIGNUMIO 0xA17 +#define WM8958_DSP2_CONFIGEXTDEPTH 0xA18 +#define WM8958_DSP2_CONFIGMULTIPLIER 0xA19 +#define WM8958_DSP2_CONFIGCTRLDWIDTH 0xA1A +#define WM8958_DSP2_CONFIGPIPELINE 0xA1B +#define WM8958_DSP2_SHIFTMAXEXTHI 0xA1C +#define WM8958_DSP2_SWVERSIONREG 0xA1D +#define WM8958_DSP2_CONFIGXMEM 0xA1E +#define WM8958_DSP2_CONFIGYMEM 0xA1F +#define WM8958_DSP2_CONFIGZMEM 0xA20 +#define WM8958_FW_BUILD_1 0x2000 +#define WM8958_FW_BUILD_0 0x2001 +#define WM8958_FW_ID_1 0x2002 +#define WM8958_FW_ID_0 0x2003 +#define WM8958_FW_MAJOR_1 0x2004 +#define WM8958_FW_MAJOR_0 0x2005 +#define WM8958_FW_MINOR_1 0x2006 +#define WM8958_FW_MINOR_0 0x2007 +#define WM8958_FW_PATCH_1 0x2008 +#define WM8958_FW_PATCH_0 0x2009 #define WM8958_MBC_BAND_2_LOWER_CUTOFF_C1_1 0x2200 #define WM8958_MBC_BAND_2_LOWER_CUTOFF_C1_2 0x2201 #define WM8958_MBC_BAND_2_LOWER_CUTOFF_C2_1 0x2202 @@ -333,6 +378,14 @@ #define WM8958_MBC_B2_PG2_2 0x242D #define WM8958_MBC_B1_PG2_1 0x242E #define WM8958_MBC_B1_PG2_2 0x242F +#define WM8958_MBC_CROSSOVER_1 0x2600 +#define WM8958_MBC_CROSSOVER_2 0x2601 +#define WM8958_MBC_HPF_1 0x2602 +#define WM8958_MBC_HPF_2 0x2603 +#define WM8958_MBC_LPF_1 0x2606 +#define WM8958_MBC_LPF_2 0x2607 +#define WM8958_MBC_RMS_LIMIT_1 0x260A +#define WM8958_MBC_RMS_LIMIT_2 0x260B #define WM8994_WRITE_SEQUENCER_0 0x3000 #define WM8994_WRITE_SEQUENCER_1 0x3001 #define WM8994_WRITE_SEQUENCER_2 0x3002 @@ -1852,6 +1905,9 @@ /* * R57 (0x39) - AntiPOP (2) */ +#define WM1811_JACKDET_MODE_MASK 0x0180 /* JACKDET_MODE - [8:7] */ +#define WM1811_JACKDET_MODE_SHIFT 7 /* JACKDET_MODE - [8:7] */ +#define WM1811_JACKDET_MODE_WIDTH 2 /* JACKDET_MODE - [8:7] */ #define WM8994_MICB2_DISCH 0x0100 /* MICB2_DISCH */ #define WM8994_MICB2_DISCH_MASK 0x0100 /* MICB2_DISCH */ #define WM8994_MICB2_DISCH_SHIFT 8 /* MICB2_DISCH */ @@ -2389,6 +2445,10 @@ /* * R548 (0x224) - FLL1 Control (5) */ +#define WM8958_FLL1_BYP 0x8000 /* FLL1_BYP */ +#define WM8958_FLL1_BYP_MASK 0x8000 /* FLL1_BYP */ +#define WM8958_FLL1_BYP_SHIFT 15 /* FLL1_BYP */ +#define WM8958_FLL1_BYP_WIDTH 1 /* FLL1_BYP */ #define WM8994_FLL1_FRC_NCO_VAL_MASK 0x1F80 /* FLL1_FRC_NCO_VAL - [12:7] */ #define WM8994_FLL1_FRC_NCO_VAL_SHIFT 7 /* FLL1_FRC_NCO_VAL - [12:7] */ #define WM8994_FLL1_FRC_NCO_VAL_WIDTH 6 /* FLL1_FRC_NCO_VAL - [12:7] */ @@ -2404,6 +2464,24 @@ #define WM8994_FLL1_REFCLK_SRC_WIDTH 2 /* FLL1_REFCLK_SRC - [1:0] */ /* + * R550 (0x226) - FLL1 EFS 1 + */ +#define WM8958_FLL1_LAMBDA_MASK 0xFFFF /* FLL1_LAMBDA - [15:0] */ +#define WM8958_FLL1_LAMBDA_SHIFT 0 /* FLL1_LAMBDA - [15:0] */ +#define WM8958_FLL1_LAMBDA_WIDTH 16 /* FLL1_LAMBDA - [15:0] */ + +/* + * R551 (0x227) - FLL1 EFS 2 + */ +#define WM8958_FLL1_LFSR_SEL_MASK 0x0006 /* FLL1_LFSR_SEL - [2:1] */ +#define WM8958_FLL1_LFSR_SEL_SHIFT 1 /* FLL1_LFSR_SEL - [2:1] */ +#define WM8958_FLL1_LFSR_SEL_WIDTH 2 /* FLL1_LFSR_SEL - [2:1] */ +#define WM8958_FLL1_EFS_ENA 0x0001 /* FLL1_EFS_ENA */ +#define WM8958_FLL1_EFS_ENA_MASK 0x0001 /* FLL1_EFS_ENA */ +#define WM8958_FLL1_EFS_ENA_SHIFT 0 /* FLL1_EFS_ENA */ +#define WM8958_FLL1_EFS_ENA_WIDTH 1 /* FLL1_EFS_ENA */ + +/* * R576 (0x240) - FLL2 Control (1) */ #define WM8994_FLL2_FRAC 0x0004 /* FLL2_FRAC */ @@ -2452,6 +2530,10 @@ /* * R580 (0x244) - FLL2 Control (5) */ +#define WM8958_FLL2_BYP 0x8000 /* FLL2_BYP */ +#define WM8958_FLL2_BYP_MASK 0x8000 /* FLL2_BYP */ +#define WM8958_FLL2_BYP_SHIFT 15 /* FLL2_BYP */ +#define WM8958_FLL2_BYP_WIDTH 1 /* FLL2_BYP */ #define WM8994_FLL2_FRC_NCO_VAL_MASK 0x1F80 /* FLL2_FRC_NCO_VAL - [12:7] */ #define WM8994_FLL2_FRC_NCO_VAL_SHIFT 7 /* FLL2_FRC_NCO_VAL - [12:7] */ #define WM8994_FLL2_FRC_NCO_VAL_WIDTH 6 /* FLL2_FRC_NCO_VAL - [12:7] */ @@ -2467,6 +2549,24 @@ #define WM8994_FLL2_REFCLK_SRC_WIDTH 2 /* FLL2_REFCLK_SRC - [1:0] */ /* + * R582 (0x246) - FLL2 EFS 1 + */ +#define WM8958_FLL2_LAMBDA_MASK 0xFFFF /* FLL2_LAMBDA - [15:0] */ +#define WM8958_FLL2_LAMBDA_SHIFT 0 /* FLL2_LAMBDA - [15:0] */ +#define WM8958_FLL2_LAMBDA_WIDTH 16 /* FLL2_LAMBDA - [15:0] */ + +/* + * R583 (0x247) - FLL2 EFS 2 + */ +#define WM8958_FLL2_LFSR_SEL_MASK 0x0006 /* FLL2_LFSR_SEL - [2:1] */ +#define WM8958_FLL2_LFSR_SEL_SHIFT 1 /* FLL2_LFSR_SEL - [2:1] */ +#define WM8958_FLL2_LFSR_SEL_WIDTH 2 /* FLL2_LFSR_SEL - [2:1] */ +#define WM8958_FLL2_EFS_ENA 0x0001 /* FLL2_EFS_ENA */ +#define WM8958_FLL2_EFS_ENA_MASK 0x0001 /* FLL2_EFS_ENA */ +#define WM8958_FLL2_EFS_ENA_SHIFT 0 /* FLL2_EFS_ENA */ +#define WM8958_FLL2_EFS_ENA_WIDTH 1 /* FLL2_EFS_ENA */ + +/* * R768 (0x300) - AIF1 Control (1) */ #define WM8994_AIF1ADCL_SRC 0x8000 /* AIF1ADCL_SRC */ @@ -4187,6 +4287,18 @@ #define WM8994_STL_SEL_WIDTH 1 /* STL_SEL */ /* + * R1797 (0x705) - JACKDET Ctrl + */ +#define WM1811_JACKDET_DB 0x0100 /* JACKDET_DB */ +#define WM1811_JACKDET_DB_MASK 0x0100 /* JACKDET_DB */ +#define WM1811_JACKDET_DB_SHIFT 8 /* JACKDET_DB */ +#define WM1811_JACKDET_DB_WIDTH 1 /* JACKDET_DB */ +#define WM1811_JACKDET_LVL 0x0040 /* JACKDET_LVL */ +#define WM1811_JACKDET_LVL_MASK 0x0040 /* JACKDET_LVL */ +#define WM1811_JACKDET_LVL_SHIFT 6 /* JACKDET_LVL */ +#define WM1811_JACKDET_LVL_WIDTH 1 /* JACKDET_LVL */ + +/* * R1824 (0x720) - Pull Control (1) */ #define WM8994_DMICDAT2_PU 0x0800 /* DMICDAT2_PU */ |
