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-rw-r--r--include/asm-arm/arch-at91/io.h2
-rw-r--r--include/asm-arm/arch-ebsa285/hardware.h26
-rw-r--r--include/asm-arm/arch-ebsa285/memory.h19
-rw-r--r--include/asm-arm/arch-ebsa285/vmalloc.h4
-rw-r--r--include/asm-arm/arch-pxa/mfp-pxa27x.h1
-rw-r--r--include/asm-arm/arch-pxa/pxa2xx-gpio.h9
-rw-r--r--include/asm-arm/arch-pxa/regs-lcd.h5
-rw-r--r--include/asm-arm/pgtable-nommu.h1
-rw-r--r--include/asm-arm/spinlock.h2
9 files changed, 15 insertions, 54 deletions
diff --git a/include/asm-arm/arch-at91/io.h b/include/asm-arm/arch-at91/io.h
index 80073fd36b8e..f8beaa228467 100644
--- a/include/asm-arm/arch-at91/io.h
+++ b/include/asm-arm/arch-at91/io.h
@@ -21,8 +21,6 @@
#ifndef __ASM_ARCH_IO_H
#define __ASM_ARCH_IO_H
-#include <asm/io.h>
-
#define IO_SPACE_LIMIT 0xFFFFFFFF
#define __io(a) ((void __iomem *)(a))
diff --git a/include/asm-arm/arch-ebsa285/hardware.h b/include/asm-arm/arch-ebsa285/hardware.h
index daad8ee2d194..74610c2c63d4 100644
--- a/include/asm-arm/arch-ebsa285/hardware.h
+++ b/include/asm-arm/arch-ebsa285/hardware.h
@@ -14,7 +14,6 @@
#include <asm/arch/memory.h>
-#ifdef CONFIG_ARCH_FOOTBRIDGE
/* Virtual Physical Size
* 0xff800000 0x40000000 1MB X-Bus
* 0xff000000 0x7c000000 1MB PCI I/O space
@@ -50,31 +49,6 @@
#define PCIMEM_SIZE 0x01000000
#define PCIMEM_BASE 0xf0000000
-#elif defined(CONFIG_ARCH_CO285)
-/*
- * This is the COEBSA285 cut-down mapping
- */
-#define PCIMEM_SIZE 0x80000000
-#define PCIMEM_BASE 0x80000000
-
-#define WFLUSH_SIZE 0x01000000
-#define WFLUSH_BASE 0x7d000000
-
-#define ARMCSR_SIZE 0x00100000
-#define ARMCSR_BASE 0x7cf00000
-
-#define XBUS_SIZE 0x00020000
-#define XBUS_BASE 0x7cee0000
-
-#define PCIO_SIZE 0x00010000
-#define PCIO_BASE 0x7ced0000
-
-#else
-
-#error "Undefined footbridge architecture"
-
-#endif
-
#define XBUS_LEDS ((volatile unsigned char *)(XBUS_BASE + 0x12000))
#define XBUS_LED_AMBER (1 << 0)
#define XBUS_LED_GREEN (1 << 1)
diff --git a/include/asm-arm/arch-ebsa285/memory.h b/include/asm-arm/arch-ebsa285/memory.h
index cbd7ae64bcc9..9019a3bf5ab9 100644
--- a/include/asm-arm/arch-ebsa285/memory.h
+++ b/include/asm-arm/arch-ebsa285/memory.h
@@ -42,8 +42,6 @@ extern unsigned long __bus_to_virt(unsigned long);
#endif
-#if defined(CONFIG_ARCH_FOOTBRIDGE)
-
/* Task size and page offset at 3GB */
#define TASK_SIZE UL(0xbf000000)
#define PAGE_OFFSET UL(0xc0000000)
@@ -53,23 +51,6 @@ extern unsigned long __bus_to_virt(unsigned long);
*/
#define FLUSH_BASE 0xf9000000
-#elif defined(CONFIG_ARCH_CO285)
-
-/* Task size and page offset at 1.5GB */
-#define TASK_SIZE UL(0x5f000000)
-#define PAGE_OFFSET UL(0x60000000)
-
-/*
- * Cache flushing area.
- */
-#define FLUSH_BASE 0x7e000000
-
-#else
-
-#error "Undefined footbridge architecture"
-
-#endif
-
/*
* Physical DRAM offset.
*/
diff --git a/include/asm-arm/arch-ebsa285/vmalloc.h b/include/asm-arm/arch-ebsa285/vmalloc.h
index 02598200997d..e487d7e8c8a6 100644
--- a/include/asm-arm/arch-ebsa285/vmalloc.h
+++ b/include/asm-arm/arch-ebsa285/vmalloc.h
@@ -7,8 +7,4 @@
*/
-#ifdef CONFIG_ARCH_FOOTBRIDGE
#define VMALLOC_END (PAGE_OFFSET + 0x30000000)
-#else
-#define VMALLOC_END (PAGE_OFFSET + 0x20000000)
-#endif
diff --git a/include/asm-arm/arch-pxa/mfp-pxa27x.h b/include/asm-arm/arch-pxa/mfp-pxa27x.h
index eb6eaa174f8d..bc73ab84167c 100644
--- a/include/asm-arm/arch-pxa/mfp-pxa27x.h
+++ b/include/asm-arm/arch-pxa/mfp-pxa27x.h
@@ -112,6 +112,7 @@
#define GPIO57_nIOIS16 MFP_CFG_IN(GPIO57, AF1)
#define GPIO56_nPWAIT MFP_CFG_IN(GPIO56, AF1)
#define GPIO79_PSKTSEL MFP_CFG_OUT(GPIO79, AF1, DRIVE_HIGH)
+#define GPIO104_PSKTSEL MFP_CFG_OUT(GPIO104, AF1, DRIVE_HIGH)
/* I2C */
#define GPIO117_I2C_SCL MFP_CFG_IN(GPIO117, AF1)
diff --git a/include/asm-arm/arch-pxa/pxa2xx-gpio.h b/include/asm-arm/arch-pxa/pxa2xx-gpio.h
index 763313c5e6be..b81cd63cb2eb 100644
--- a/include/asm-arm/arch-pxa/pxa2xx-gpio.h
+++ b/include/asm-arm/arch-pxa/pxa2xx-gpio.h
@@ -134,7 +134,11 @@
#define GPIO93_CIF_DD_6 93 /* Camera data pin 6 */
#define GPIO94_CIF_DD_5 94 /* Camera data pin 5 */
#define GPIO95_CIF_DD_4 95 /* Camera data pin 4 */
+#define GPIO96_FFRXD 96 /* FFUART recieve */
+#define GPIO98_FFRTS 98 /* FFUART request to send */
#define GPIO98_CIF_DD_0 98 /* Camera data pin 0 */
+#define GPIO99_FFTXD 99 /* FFUART transmit data */
+#define GPIO100_FFCTS 100 /* FFUART Clear to send */
#define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */
#define GPIO103_CIF_DD_3 103 /* Camera data pin 3 */
#define GPIO104_CIF_DD_2 104 /* Camera data pin 2 */
@@ -316,6 +320,8 @@
#define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT)
#define GPIO85_CIF_LV_MD (85 | GPIO_ALT_FN_3_IN)
#define GPIO86_nPCE_1_MD (86 | GPIO_ALT_FN_1_OUT)
+#define GPIO88_USBH1_PWR_MD (88 | GPIO_ALT_FN_1_IN)
+#define GPIO89_USBH1_PEN_MD (89 | GPIO_ALT_FN_2_OUT)
#define GPIO90_CIF_DD_4_MD (90 | GPIO_ALT_FN_3_IN)
#define GPIO91_CIF_DD_5_MD (91 | GPIO_ALT_FN_3_IN)
#define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT)
@@ -324,8 +330,11 @@
#define GPIO95_CIF_DD_4_MD (95 | GPIO_ALT_FN_2_IN)
#define GPIO95_KP_MKIN6_MD (95 | GPIO_ALT_FN_3_IN)
#define GPIO96_KP_DKIN3_MD (96 | GPIO_ALT_FN_1_IN)
+#define GPIO96_FFRXD_MD (96 | GPIO_ALT_FN_3_IN)
#define GPIO97_KP_MKIN3_MD (97 | GPIO_ALT_FN_3_IN)
#define GPIO98_CIF_DD_0_MD (98 | GPIO_ALT_FN_2_IN)
+#define GPIO98_FFRTS_MD (98 | GPIO_ALT_FN_3_OUT)
+#define GPIO99_FFTXD_MD (99 | GPIO_ALT_FN_3_OUT)
#define GPIO100_KP_MKIN0_MD (100 | GPIO_ALT_FN_1_IN)
#define GPIO101_KP_MKIN1_MD (101 | GPIO_ALT_FN_1_IN)
#define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT)
diff --git a/include/asm-arm/arch-pxa/regs-lcd.h b/include/asm-arm/arch-pxa/regs-lcd.h
index f762493f5141..3ba464c913a5 100644
--- a/include/asm-arm/arch-pxa/regs-lcd.h
+++ b/include/asm-arm/arch-pxa/regs-lcd.h
@@ -1,5 +1,8 @@
#ifndef __ASM_ARCH_REGS_LCD_H
#define __ASM_ARCH_REGS_LCD_H
+
+#include <asm/arch/bitfield.h>
+
/*
* LCD Controller Registers and Bits Definitions
*/
@@ -69,7 +72,7 @@
#define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */
#define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */
#define LCCR0_PDD_S 12
-#define LCCR0_BM (1 << 20) /* Branch mask */
+#define LCCR0_BM (1 << 20) /* Branch mask */
#define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */
#define LCCR0_LCDT (1 << 22) /* LCD panel type */
#define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */
diff --git a/include/asm-arm/pgtable-nommu.h b/include/asm-arm/pgtable-nommu.h
index 2e5868bbe03b..386fcc10a973 100644
--- a/include/asm-arm/pgtable-nommu.h
+++ b/include/asm-arm/pgtable-nommu.h
@@ -16,7 +16,6 @@
#include <linux/slab.h>
#include <asm/processor.h>
#include <asm/page.h>
-#include <asm/io.h>
/*
* Trivial page table functions.
diff --git a/include/asm-arm/spinlock.h b/include/asm-arm/spinlock.h
index 800ba5254daf..2b41ebbfa7ff 100644
--- a/include/asm-arm/spinlock.h
+++ b/include/asm-arm/spinlock.h
@@ -142,7 +142,7 @@ static inline void __raw_write_unlock(raw_rwlock_t *rw)
}
/* write_can_lock - would write_trylock() succeed? */
-#define __raw_write_can_lock(x) ((x)->lock == 0x80000000)
+#define __raw_write_can_lock(x) ((x)->lock == 0)
/*
* Read locks are a bit more hairy:
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